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HX8369-A 480rgb x 864 dot, 16.7m color, with internal gram, tft mobile single chip driver preliminary version 01 july, 2010 ( doc no. HX8369-A-ds ) for truly only http://www..net/ datasheet pdf - http://www..net/
- p.2- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 1. general description ..........................................................................................................................10 2. features .............................................................................................................................................11 2.1 display........................................................................................................................................11 2.2 display module...........................................................................................................................11 2.3 display / control interface ..........................................................................................................12 2.4 input power.................................................................................................................................12 2.5 miscellaneous.............................................................................................................................12 3. device overview ...............................................................................................................................13 3.1 block diagram.............................................................................................................................13 3.2 pin description............................................................................................................................14 3.3 pin assignment...........................................................................................................................18 3.4 pad coordinates.........................................................................................................................19 3.4.1 bump arrangement ................................................................................................................27 4. interface .............................................................................................................................................29 4.1 system interface.........................................................................................................................29 4.1.1 mipi dbi-a / dbi-b interface..................................................................................................31 4.2 serial data transfer interface (mipi dbi-c) ................................................................................42 4.2.2 mipi dpi interface (display pixel interface)...........................................................................46 4.2.3 dsi system interface..............................................................................................................52 4.2.4 mddi interface (mobile display digital interface)..................................................................66 4.2.5 terminology............................................................................................................................67 4.2.6 order of data transmission.....................................................................................................68 4.2.7 data-stb encoding................................................................................................................68 5. function description ........................................................................................................................81 5.1 display data gram....................................................................................................................81 5.2 address counter (ac).................................................................................................................81 5.3 source, gate and memory map..................................................................................................82 5.3.1 480rgb x 864 resolution.......................................................................................................82 5.3.2 480rgb x 854 resolution.......................................................................................................83 5.3.3 480rgb x 800 resolution.......................................................................................................84 5.3.4 480rgb x 640 resolution.......................................................................................................85 5.3.5 360rgb x 640 resolution.......................................................................................................86 5.3.6 480rgb x 720 resolution.......................................................................................................87 5.4 mcu to memory write / read direction........................................................................................88 5.5 fully display, partial display, vertical scrolling display ................................................................90 5.5.1 fully display ...........................................................................................................................90 5.5.2 vertical scrolling display.........................................................................................................96 5.5.3 tearing effect output line........................................................................................................99 5.6 color depth conversion ............................................................................................................103 5.6.1 color depth conversion look-up tables ...............................................................................103 5.7 oscillator...................................................................................................................................109 5.8 source driver ............................................................................................................................110 5.9 lcd power generation scheme................................................................................................ 111 5.10 dc/dc converter circuit............................................................................................................112 5.10.1 use pfm dc/dc converter .............................................................................................112 5.10.2 use hx5186-a.................................................................................................................113 5.11 idle display ...............................................................................................................................114 5.12 gamma characteristic correction function................................................................................115 HX8369-A 480rgb x 864 dot, 16.7m color, with internal gram, tft mobile single chip driver l ist of contents july, 2010 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.3- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.13 characteristics of i/o................................................................................................................157 5.13.1 output or bi-directional (i/o) pins ....................................................................................157 5.13.2 input pins .........................................................................................................................157 5.14 gip control singal .....................................................................................................................158 5.15 sleep out Ccommand and self-diagnostic functions of the display module.............................159 5.15.1 register loading detection ...............................................................................................159 5.15.2 functionality detection .....................................................................................................160 5.16 power on/off sequence.............................................................................................................161 5.16.1 case 1: resx line is held high or unstable by host at power on ....................................162 5.16.2 case 2: resx line is held low by host at power on ........................................................163 5.17 uncontrolled power off .............................................................................................................163 5.18 content adaptive brightness control (cabc) function .............................................................164 5.18.1 module architectures .......................................................................................................165 5.18.2 cabc block .....................................................................................................................166 5.18.3 brightness control block ..................................................................................................167 5.18.4 minimum brightness setting of cabc function ................................................................168 5.19 otp programing .......................................................................................................................169 5.19.1 otp table.........................................................................................................................169 5.19.2 otp programming flow....................................................................................................172 5.19.3 programming sequence ..................................................................................................173 5.19.4 otp programming example of vcmc_f1 and vcmc_b1 .............................................174 5.19.5 otp programming example of id1, id2 and id3 ............................................................175 5.19.6 otp read example of 0x1bh (vcom setting re-load) .....................................................176 5.19.7 otp read example of vcmc_f1.....................................................................................177 5.20 temperature sensor control......................................................................................................178 6. command.........................................................................................................................................179 6.1 command list ...........................................................................................................................179 6.1.1 standard command..............................................................................................................179 6.1.2 user define command list table............................................................................................183 6.2 command description ..............................................................................................................187 6.2.1 nop (00h) ............................................................................................................................187 6.2.2 software reset (01h) ............................................................................................................188 6.2.3 rdnumpe: read number of the parity errors (05h) ...........................................................189 6.2.4 get_red_channel (06h) ........................................................................................................190 6.2.5 get_green_channel (07h) ....................................................................................................191 6.2.6 get_blue_channel (08h) ......................................................................................................192 6.2.7 get_power_mode (0ah).......................................................................................................193 6.2.8 read display madctl (0bh)...............................................................................................194 6.2.9 get_pixel_format (0ch)........................................................................................................196 6.2.10 get_display_mode (0dh).................................................................................................198 6.2.11 get_signal_mode (0eh)...................................................................................................199 6.2.12 get_diagnostic_result (0fh) ............................................................................................200 6.2.13 enter_sleep_mode (10h) .................................................................................................201 6.2.14 exit_sleep_omde (11h) ....................................................................................................202 6.2.15 enter_partial_mode (12h) ................................................................................................203 6.2.16 enter_normal_mode (13h)...............................................................................................204 6.2.17 exit_inversion_mode (20h)..............................................................................................205 6.2.18 enter_inversion_mode (21h) ...........................................................................................206 6.2.19 set_gamma_curve (26h) .................................................................................................207 6.2.20 set_display_off (28h).......................................................................................................208 6.2.21 set_display_on (29h).......................................................................................................209 6.2.22 set_clumn_address (2ah) ...............................................................................................210 6.2.23 set_page_address (2bh).................................................................................................211 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.4- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 6.2.24 write_memory_start (2ch) ..............................................................................................212 6.2.25 colour set (2dh)..............................................................................................................213 6.2.26 raed_memory_start (2eh) ..............................................................................................216 6.2.27 set_partial_area (30h) .....................................................................................................217 6.2.28 set_scroll_area (33h) ......................................................................................................219 6.2.29 tearing effect line off (34h) ..............................................................................................222 6.2.30 set_tear_on (35h)............................................................................................................223 6.2.31 set_address_mode (36h) ................................................................................................224 6.2.32 set_scroll_start (37h).......................................................................................................226 6.2.33 idle mode off (38h)...........................................................................................................227 6.2.34 enter_idle_mode (39h) ....................................................................................................228 6.2.35 set_pixel_format (3ah) ....................................................................................................229 6.2.36 write_memory_contiune (3ch)........................................................................................230 6.2.37 raed_memory_continue (3eh)........................................................................................231 6.2.38 set tear scan lines (44h)..................................................................................................232 6.2.39 get the current scanline(45h) ..........................................................................................233 6.2.40 write display brightness (51h) .........................................................................................234 6.2.41 read display brightness value (52h) ...............................................................................235 6.2.42 write ctrl display (53h) ................................................................................................236 6.2.43 read ctrl value display (54h) ......................................................................................237 6.2.44 write content adaptive brightness control (55h) ..............................................................238 6.2.45 read content adaptive brightness control (56h)..............................................................239 6.2.46 write cabc minimum brightness (5eh) ..........................................................................240 6.2.47 read cabc minimum brightness (5fh) ..........................................................................241 6.2.48 read automatic brightness control self-diagnostic result (68h) ......................................242 6.2.49 read_ddb_start (a1h)....................................................................................................243 6.2.50 read_ddb_continue (a8h) .............................................................................................245 6.2.51 read id1 (dah) ...............................................................................................................246 6.2.52 read id2 (dbh) ...............................................................................................................247 6.2.53 read id3 (dch) ...............................................................................................................248 6.2.54 setosc: set internal oscillator (b0h).............................................................................249 6.2.55 setpower: set power (b1h) ........................................................................................250 6.2.56 setdisp: set display related register (b2h)...................................................................259 6.2.57 setrgbif: set rgb interface related register (b3h).....................................................262 6.2.58 setcyc: set display waveform cycle (b4h)...................................................................263 6.2.59 setvcom: set vcom voltage (b6h) .............................................................................266 6.2.60 setextc: set extension command (b9h) .....................................................................269 6.2.61 setmipi: (bah) ...............................................................................................................270 6.2.62 setotp: set otp (bbh) ................................................................................................272 6.2.63 setdgclut: set dgc lut (c1h) .................................................................................273 6.2.64 setid: set id (c3h) ........................................................................................................275 6.2.65 setpanel (cch)............................................................................................................276 6.2.66 setgip (d5h)..................................................................................................................277 6.2.67 settpsnr (d8h)............................................................................................................284 6.2.68 setgamma: set gamma curve related setting (e0h) ....................................................289 6.2.69 setotpkey (e9h) .........................................................................................................291 6.2.70 gethxid (f4h) ...............................................................................................................292 6.2.71 setcncd/getcncd (fdh) ..........................................................................................293 6.2.72 set spi read index (feh) ..........................................................................................294 6.2.73 getspiread : read command data (ffh) ....................................................................295 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- p.5- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 7. power supply ..................................................................................................................................296 7.1 power supply setup ..................................................................................................................296 7.1.1 architecture 1 with pfm circuit ............................................................................................296 7.1.2 architecture 2 with hx5186-a..............................................................................................297 7.2 voltage configuration................................................................................................................298 8. electrical characteristics ...............................................................................................................299 8.1 absolute maximum ratings .......................................................................................................299 8.2 esd protection level.................................................................................................................299 8.3 dc characteristics ....................................................................................................................300 8.4 ac characteristics ....................................................................................................................301 8.4.1 dbi type a interface characteristics ....................................................................................301 8.4.2 dbi type b interface characteristics ....................................................................................302 8.4.3 dbi type c interface characteristics....................................................................................303 8.4.4 dpi interface characteristics ................................................................................................304 8.4.5 reset input timing ................................................................................................................308 8.4.6 mddi electrical characteristics.............................................................................................309 9. layout recommendation ...............................................................................................................312 10. maximum layout resistance.........................................................................................................313 11. ordering information ......................................................................................................................314 12. revision history..............................................................................................................................314 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.6- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.1: dbi-a system interface protocol, write to register or gram ...................................31 figure 4.2: dbi-a system interface protocol, read from register or gram................................31 figure 4.3: dbi-b system interface protocol, write to register or gram ...................................32 figure 4.4: dbi-b system interface protocol, read from register or gram................................32 figure 4.5 example of dbi-b system 18-bit parallel bus interface.............................................33 figure 4.6: write data for rgb 8-8-8 (16.7m colours) bit input in 24-bit parallel interface........33 figure 4.7: example of dbi-a- / dbi-b system 18-bit parallel bus interface..............................34 figure 4.8: write data for rgb 5-6-5 (65k colours) bit input in 18-bit parallel interface ............34 figure 4.9: write data for rgb 6-6-6(262k colours) bit input in 18-bit parallel interface ...........35 figure 4.10: write data for rgb 8-8-8 (16.7m colours) bit input in 18-bit parallel interface......35 figure 4.11: example of dbi-a- / dbi-b system 16-bit bus interface.........................................36 figure 4.12: write data for rgb 5-6-5 (65k colours) bit input in 16-bit parallel interface ..........36 figure 4.13: write data for rgb 6-6-6 (262k colours) bit input in 16-bit parallel interface ........37 figure 4.14: write data for rgb 8-8-8-bit (16.7m colours) input in 16-bit parallel interface......37 figure 4.15: example of dbi-a- / dbi-b- system 9-bit bus interface .........................................38 figure 4.16: write data for rgb 5-6-5(65k colours) bit input in 9-bit parallel interface .............38 figure 4.17: write data for rgb 6-6-6-bit (262k colours) input in 9-bit parallel interface..........39 figure 4.18: write data for rgb 8-8-8-bit (16.7 m colours) input in 9-bit parallel interface.......39 figure 4.19: example of dbi-a- / dbi-b-system 8-bit bus interface ..........................................40 figure 4.20: write data for rgb 5-6-5 (65k colours) bit input in 8-bit parallel interface ............40 figure 4.21: write data for rgb 6-6-6-bit (262k colours) input in 8-bit parallel interface..........41 figure 4.22: write data for rgb 8-8-8-bit (16.7 m colours) input in 8-bit parallel interface.......41 figure 4.23: serial data stream, write mode ..............................................................................42 figure 4.24: dbi type c: serial interface protocol 3-wire/4-wire, write mode ...........................43 figure 4.25: type c:serial interface protocol 3-wire/4-wire read mode.....................................44 figure 4.26: display module data transfer recovery ..................................................................45 figure 4.27: pclk cycle.............................................................................................................46 figure 4.28: general timing diagram..........................................................................................47 figure 4.29: dpi (480rgb x 864) timing diagram .....................................................................47 figure 4.30: 16-bit / pixel 65k colours order on the dpi i/f.......................................................49 figure 4.31: 18-bit / pixel: 262k colours order on the dpi i/f ....................................................50 figure 4.32: 24-bit / pixel color order on the rgb i/f ................................................................51 figure 4.33: dsi transmitter and receiver interface ...................................................................52 figure 4.34: dsi transmitter and receiver interface ...................................................................53 figure 4.35: multiple hs transmission packets ..........................................................................54 figure 4.36: structure of the short packet..................................................................................54 figure 4.37: structure of the long packet ...................................................................................55 figure 4.38: the format of data id. ............................................................................................55 figure 4.39: show short- / long-packet transmission command sequence ..............................56 figure 4.40: physical connection of mddi host and client.........................................................66 figure 4.41: mddi terminology ..................................................................................................67 figure 4.42: example of bi-directional mddi communication....................................................67 figure 4.43: transmission bit ordering for each type.................................................................68 figure 4.44: data-stb encoding................................................................................................69 figure 4.45: data / stb generation & recovery circuit...............................................................69 figure 4.46: differential connection between host and client ....................................................70 figure 4.47 mddi packet structure ............................................................................................71 figure 4.48: mddi transceiver / receiver state in hibernation .................................................78 figure 4.49: host-initiated link wakeup sequence .....................................................................79 figure 4.50: mddi operation mode............................................................................................80 figure 5.1: mcu to memory write / read direction .....................................................................88 figure 5.2: my, mx, mv setting of 480rgb x 864 dot ..............................................................88 figure 5.3: my, mx, mv setting of 480rgb x 864 dot ..............................................................88 figure 5.4: address direction settings........................................................................................89 figure 5.5: 480rgb x 864 resolution.........................................................................................90 HX8369-A 480rgb x 864 dot, 16.7m color, with internal gram, tft mobile single chip driver l ist of figure s july, 2010 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.7- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 5.6: 480rgb x 854 resolution................. ........................................................................91 figure 5.7: 480rgb x 800 resolution.........................................................................................92 figure 5.8: 480rgb x 640 resolution.........................................................................................93 figure 5.9: 360rgb x 640 resolution.........................................................................................94 figure 5.10: 480rgb x 720 resolution.......................................................................................95 figure 5.11: vertical scrolling .....................................................................................................96 figure 5.12: memory map of vertical scrolling 1 ........................................................................96 figure 5.13: memory map of vertical scrolling 2 ........................................................................97 figure 5.14: vertical scroll example 1 ........................................................................................98 figure 5.15: vertical scroll example 2 ........................................................................................98 figure 5.16: tearing effect output lineCmode 1..........................................................................99 figure 5.17: tearing effect output lineCmode 2..........................................................................99 figure 5.18: tearing effect output lineCtiming diagrm ................................................................99 figure 5.19: tearing effect output line Ctearing effect line timing.............................................100 figure 5.20: tearing effect output lineCdefinition of tf, tr ..........................................................100 figure 5.21: tearing effect output lineCexample 1 (timing) .....................................................101 figure 5.22: tearing effect output lineCexample 1 (image)......................................................101 figure 5.23: tearing effect output lineCexample 2 (timing) .....................................................102 figure 5.24: tearing effect output lineCexample 2 (image)......................................................102 figure 5.25: osc aritecture .....................................................................................................109 figure 5.26: lcd power generation scheme ........................................................................... 111 figure 5.27: dc/dc converter circuit (pfm type c)Cpccs=10..............................................112 figure 5.28: dc/dc converter circuit (hx5186-a) ...................................................................113 figure 5.29: idle mode grayscale control .................................................................................114 figure 5.30: grayscale control .................................................................................................115 figure 5.31: gamma resister stream and gamma reference voltage ......................................117 figure 5.32: gamma resister stream .......................................................................................118 figure 5.33: sleep out flow chartCcommand and self-diagnostic functions.............................159 figure 5.34: sleep out flow chart internal function detection ...................................................160 figure 5.35: case 1: resx line is held high or unstable by host at power on ........................162 figure 5.36: case 2: resx line is held low by host at power on.............................................163 figure 5.37: cabc block diagram............................................................................................164 figure 5.38: module architecture .............................................................................................165 figure 5.39: cabc gain / cabc duty generation ....................................................................166 figure 5.40: cabc_pwm_out output duty............................................................................167 figure 5.41: otp programming sequence...............................................................................172 figure 5.42: otp programming sequence example 1. ............................................................174 figure 5.43: otp programming sequence example 2. ............................................................175 figure 5.44: otp programming sequence index 0x1bh read flow. .........................................176 figure 5.45: otp programming sequence read flow. ..............................................................177 figure 5.46: temperature sensor .............................................................................................178 figure 7.1: power supply with pfm circuit ...............................................................................296 figure 7.2: power supply with hx5186-a ................................................................................297 figure 8.1: dbi type a interface characteristics(clk-e mode) ...............................................301 figure 8.2: dbi type b interface characteristics ......................................................................302 figure 8.3: dbi type c interface characteristics......................................................................303 figure 8.4: dpi interface characteristics ..................................................................................304 figure 8.5: vertical timings for rgb i/f...................................................................................306 figure 8.6: horizontal timing for rgb i/f ................................................................................307 figure 8.7: reset input timing ..................................................................................................308 figure 9.1: layout recommendation ........................................................................................312 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.8- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 table 4.1: interface selection .....................................................................................................29 table 4.2: pin connection based on different interface ..............................................................30 table 4.3: data types for processor-sourced packets................................................................57 table 4.4: shows the error report bit definitions.........................................................................64 table 4.5: the complete set of peripheral-to-processor data types...........................................65 table 4.6: list of supported mddi packet ..................................................................................72 table 4.7: operation mode list ...................................................................................................80 table 5.1: addresses counter range...........................................................................................81 table 5.2: memory map of 480rgb x 864 resolution ................................................................82 table 5.3: memory map of 480rgb x 854 resolution ................................................................83 table 5.4: memory map of 480rgb x 800 resolution ................................................................84 table 5.5: memory map of 480rgb x 640 resolution ................................................................85 table 5.6: memory map of 360rgb x640 resolution .................................................................86 table 5.7: memory map of 480rgb x 720 resolution ................................................................87 table 5.8: 480rgb x 864 resolution (sram assignment) .........................................................90 table 5.9: 480rgb x 854 resolution (sram assignment) .........................................................91 table 5.10: 480rgb x 800 resolution (sram assignment) .......................................................92 table 5.11: 480rgb x 640 resolution (sram assignment) .......................................................93 table 5.12: 360rgb x 640 resolution (sram assignment) .......................................................94 table 5.13: 480rgb x 720 resolution (sram assignment) .......................................................95 table 5.14: ac characteristics of tearing effect signal .............................................................100 table 5.15: look-up tables-1 ....................................................................................................103 table 5.16: look-up tables-2 ....................................................................................................104 table 5.17: look-up tables-3 ....................................................................................................105 table 5.18: look-up tables-4 ....................................................................................................106 table 5.19: look-up tables-5 ....................................................................................................107 table 5.20: look-up tables-6 ....................................................................................................108 table 5.21: gamma-adjustment registers................................................................................116 table 5.22: offset adjustment 0~5 ...........................................................................................119 table 5.23: center adjustment .................................................................................................119 table 5.24: vinp0 .....................................................................................................................120 table 5.25: vinp1 .....................................................................................................................121 table 5.26: vinp2 .....................................................................................................................122 table 5.27: vinp14 ...................................................................................................................123 table 5.28: vinp15 ...................................................................................................................124 table 5.29: vinp16 ...................................................................................................................125 table 5.30: vinp5 .....................................................................................................................127 table 5.31: vinp11 ...................................................................................................................129 table 5.32: vinp3 .....................................................................................................................130 table 5.33: vinp4 .....................................................................................................................131 table 5.34: vinp6 .....................................................................................................................131 table 5.35: vinp7 .....................................................................................................................132 table 5.36: vinp8 .....................................................................................................................132 table 5.37: vinp9 .....................................................................................................................133 table 5.38: vinp10 ...................................................................................................................133 table 5.39: vinp12 ...................................................................................................................134 table 5.40: vinp13 ...................................................................................................................134 table 5.41: vinn0 .....................................................................................................................135 table 5.42: vinn1 .....................................................................................................................136 table 5.43: vinn2 .....................................................................................................................137 table 5.44: vinn14 ...................................................................................................................138 table 5.45: vinn15 ...................................................................................................................139 table 5.46: vinn16 ...................................................................................................................140 table 5.47: vinn5 .....................................................................................................................142 table 5.48: vinn11 ...................................................................................................................144 HX8369-A 480rgb x 864 dot, 16.7m color, with internal gram, tft mobile single chip drive r l ist of table s july, 2010 for truly only http://www..net/ datasheet pdf - http://www..net/
- p.9- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 table 5.49: vinn3 ................................... ..................................................................................145 table 5.50: vinn4 .....................................................................................................................146 table 5.51: vinn6 .....................................................................................................................146 table 5.52: vinn7 .....................................................................................................................147 table 5.53: vinn8 .....................................................................................................................147 table 5.54: vinn9 .....................................................................................................................148 table 5.55: vinn10 ...................................................................................................................148 table 5.56: vinn12 ...................................................................................................................149 table 5.57: vinn13 ...................................................................................................................149 table 5.58: voltage calculation formula of 64-grayscale voltage (positive polarity).................151 table 5.59: voltage calculation formula of 64-grayscale voltage (negative polarity) ...............153 table 5.60: voltage calculation formula of 256-grayscale voltage (positive/negative polarity)156 table 5.61 characteristics of output or bi-directional (i/o) pins ...............................................157 table 5.62 characteristics of input pins ...................................................................................157 table 5.63 cabc timing table ..................................................................................................167 table 5.64: otp programming sequence ................................................................................173 table 7.1: adoptability of component .......................................................................................298 table 8.1: absolute maximum rating ........................................................................................299 table 8.2: esd protection level ................................................................................................299 table 8.3: dc characteristic .....................................................................................................300 table 8.4: dbi type a interface characteristics ........................................................................301 table 8.5: dbi type b interface characteristics........................................................................302 table 8.6: dbi type c interface characteristics .......................................................................303 table 8.7: dpi interface characteristics....................................................................................305 table 8.8 vertical timings for rgb i/f .....................................................................................306 table 8.9 horizontal timings for rgb i/f.................................................................................307 table 8.10: reset timing...........................................................................................................308 table 10.1: maximum layout resistance ...................................................................................313 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.10- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 1. general description this document describes himaxs HX8369-A supports wvga resolution driving controller. the HX8369-A is designed to provide a single-chip solution that combines a source driver, power supply circuit to drive a tft dot matrix lcd with 480rgbx864 dots at maximum. the HX8369-A can be operated in low-voltage condition for the interface and integrated internal boosters that produce the liquid crystal voltage, breeder resistance and the voltage follower circuit for liquid crystal driver. in addition, the HX8369-A also supports various functions to reduce the power consumption of a lcd system via software control. the HX8369-A supports several interface modes, including mpu mipi dbi type a/type b interface mode, mipi dpi/dbi type c interface mode, mipi dsi (display serial interface) interface mode and mddi (mobile display digital interface) interface mode. the interface mode is selected by the external hardware pins bs3~0. the HX8369-A is suitable for any small portable battery-driven and long-term driving products, such as small pdas, digital cellular phones and bi-directional pagers. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.11- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 2. features 2.1 display single chip solution for a wvga gip (gate in panel) type tft lcd display resolution: 480rgb x 864 480rgb x 854 480rgb x 800 480rgb x 640 480rgb x 720 360rgb x 640 display color modes full color mode: 16.7m colours (24-bit 8(r):8(g):8(b)) reduce color mode: 262k colours (18-bit 6(r):6(g):6(b)) 65k colours (16-bit 5(r):6(g):5(b)) 8 colors (idle mode on): 8 colors (3-bit binary mode) 2.2 display module support 1440 source channel outputs internal level shifter for gip gate control supports 1-dot / 2-dot / column / zig-zag inversion gamma correction (1 preset gamma curve) on module vcom control (-2 to 0v common electrode output voltage range) on module dc/dc converter vsp=4.7 to 5.5v vsn=-5.5 to -4.7v positive source output voltage level: vspr=3.5v to 5v negative source output voltage level: vsnr=-5v to - 3.5v positive gate driver output voltage level: vgh=+9v to +20v negative gate driver output voltage level: vgl=-6v to -13.5v gip most negative reference voltage: lvgl=vgl Cvdd3 vcom=-2.0v to 0v, a step=16mv frame memory area 480 (h) x 864 (v) x 24-bit for truly only http://www..net/ datasheet pdf - http://www..net/
-p.12- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 2.3 display / control interface display interface types supported mpu mode mipi-dbi type b (80 system) interface (16- / 18- / 24-bit bus) mipi-dbi type a (68 system) interface (16- / 18- bit bus) mipi-dbi type c (serial data transfer interface) interface mipi-dsi (display serial interface) interface support dsi version 1.01 support d-phy version 0.90 mddi (mobile display digital interface) interface support vesa mobile display digital interface standard version 1.2 rgb mode 16 bit/pixel r(5), g(6), b(5) 18 bit/pixel r(6), g(6), b(6) 24 bit/pixel r(8), g(8), b(8) 2.4 input power i/o and interface power supply (vdd1): 1.65v to 3.3v analog power supply (vdd2): 2.3v to 4.8v logic power supply (vdd3): 2.3v to 4.8v dsi power supply (dsi_vcc): 1.65v to 3.3v mddi power supply (dsi_vcc): 2.3v to 3.3v otp programming voltage (vpp): 7.5v 0.2v 2.5 miscellaneous partial display mode software programmable color depth mode oscillator for display clock generation low power consumption, suitable for battery operated systems cmos compatible inputs proprietary multi phase driving for lower power consumption gas function for preventing image sticking when abnormal power off optimized layout for cog assembly temperature range: -40 to +85 c hbm esd (human body mode)>2kv, mm(machine mode)>200v and latch up>200ma support inversion mode dc/dc converter for source support dc com driving vcom voltage generator on-chip otp program voltage generator otp memory to store initialization register settings 3 times mtp for vcom setting ,id setting support cabc (content adaptive brightness control) function support dgc (digital gamma correction) function temperature sensor control for truly only http://www..net/ datasheet pdf - http://www..net/
-p.13- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 3. device overview 3.1 block diagram spii/f 3wire rgbi/f 16bit 18bit 24bit gate control unit grayscalevoltage generator gammaadjustingcircuit source driver d/aconverter circuit datalatch s1~s1441 internal register otp gram control gram timing control dc/dcconverter mode selection c21ap/c21an v gh v gl vcomcricuit v com r v com goutl_1~ goutl_10 goutr1~ goutr_10 bs30 4 vssd vssa 24bit 18bit 16bit 9bit 8bit vdd2 vdd1 digital gamma correction pwm_out abcfunction te 24bit display data cabcfunction 24bit display data note: mpui/fdisplaydatapath rgbi/fdisplaydatapath vci mpui/f dsi/mddi interface dsi_d0p (mddi_d1p)/ dsi_d0n (mddi_d1n) 2 vgs generator timing osc rcosc test2~1 resx dsi_vss/ mddi_vss dsi_vcc/ mddi_vcc csx rdx_e wrx_dcx dcx_scl 24 db23~0 sdo 2 dsi_clkp (mddi_stbp)/ dsi_clkn (mddi_stbn) 2 sdi vsync_te hsync pclk de vdd3 vtestoutp/ vtestoutn 2 vpp v0~255 c22ap/c22an pfm vsp vsn vcsw1 vcsw2 vssac 20 voltagereference vspr vsnr vref vddd vdddn dsi_ldo lvgl c41ap/c41an dsi_d1p (mddi_d0p)/ dsi_d1n (mddi_d0n) c23ap/c23an c24ap/c24an dsi_ldo_enb/ mddi_ldo_enb temperature sensorcontrol for truly only http://www..net/ datasheet pdf - http://www..net/
-p.14- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 3.2 pin description host interface pins signals i/o pin no. connected with description bs3 ~ bs0 i 4 vssd / vdd1 select the mpu interface mode as listed below: bs3 bs2 bs1 bs0 mpu interface mode db pins display mode 0 0 0 0 dbi type-a 8-bit (clk-e) db23-db8: unused, db7-db0: data type 1 0 0 0 1 dbi type-a 9-bit (clk-e) db23-db9:unused, db8-db0: data type 1 0 0 1 0 dbi type-a 16-bit (clk-e) db23-db16: unused, db15-db0: data type 1 0 0 1 1 dbi type-a 18-bit (clk-e) db23-db18: unused, db17-db0: data type 1 0 1 0 0 dbi type-b 8-bit db23-db8: unused db7-db0: data type 1 0 1 0 1 dbi type-b 9-bit db23-db9:unused, db8-db0: data type 1 0 1 1 0 dbi type-b 16-bit db23-db16: unused, db15-db0: data type 1 0 1 1 1 dbi type-b 18-bit db23-db18: unused, db17-db0: data type 1 1 0 0 0 dsi (command mode) dsi_clkp, dsi_clkn, dsi_d0p, dsi_d0n, dsi_d1p, dsi_d1n type 1 1 0 0 1 3-wire serial + mddi interface (note 1) mddi _stbp, mddi _stbn, mddi _d0p, mddi _d0n, mddi _d1p, mddi _d1n, - 1 0 1 0 dbi type-b 24-bit db23-db0: data type 1 1 1 0 0 dsi (video mode) dsi_clkp, dsi_clkn, dsi_d0p, dsi_d0n, dsi_d1p, dsi_d1n type 3 1 1 0 1 dpi/dbi type-c option 1 sdi/sdo, db23-db0 type 3 1 1 1 0 dpi/dbi type-c option 2 sdi/sdo, db23-db0 type 3 1 1 1 1 dpi/dbi type-c option 3 sdi/sdo, db23-db0 type 3 pixel format (rgb565 / rgb666 / rgb888) is selected by dcs command (0x3ah) note 1: 3-wire serial interface only active on mddi / hibernation mode. must be connected to vssd or vdd1. csx i 1 mpu chip select signal. low: chip can be accessed; high: chip cannot be accessed. if this pin is not used, please connect it to vssd or vdd1. resx i 1 mpu or reset circuit reset pin. setting either pin low initializes the lsi. must be reset after power is supplied (must be connected to vssd or vdd1). rdx_e i 1 mpu dbi type-a: 0: read/write disable, 1: read / write enable. dbi type-b: serves as a read signal and read data at the low level. if not use, let it open or connected to vdd1. dcx_scl i 1 mpu dbi type-a/b: data / command selection pin dbi type-c: it servers as scl (serial clock) if not use, let it open or connected to vdd1. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.15- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 wrx_dcx i 1 mpu dbi type-b mode: serves as a write signal and write data at the low level. dbi type-a mode: 0: read/write disable, 1: read / write enable. if not use, let it open or connected to vdd1. db23~0 i/o 24 mpu rgb interface data bus used unused 16-bit bus db21-17, db13-8, db5-1 db23-22, db116-14, db7-6, db0 18-bit bus db21-16, db13-8, db5-0 db22-21, db15-14, db7-6 24-bit bus db23-d0 - let the unused pins open for each mode. sdo o 1 mpu serial data output. let it to open in mpu interface mode. sdi i 1 mpu serial data input pin in serial interface operation. clock input and rgb interface hsync i 1 mpu line synchronizing signal. must be connected to vssd or vdd1 if not used. de i 1 mpu a data enable signal in rgb i/f mode. has to be fixed to vssd level in mpu interface mode. vsync i 1 mpu serves vs signal pin on rgb interface. (input pad). must be connected to vssd or vdd1 if not used. pclk i 1 mpu dot clock signal. must be connected to vssd or vdd1 if not used. source driver output pins s1 to s1441 o 1441 lcd output voltages applied to the liquid crystal. rgb resolution source channels 360rgb s1 ~ s540, s901 ~ s1440 480rgb s1 to s1440 480rgb+z inversion s1 to s1441 te o 1 mpu serves te (tearing effect ) pin on mpu interface. gip control singal and bias voltage cgout1_l cgout2_l cgout3_l cgout4_l cgout5_l cgout6_l cgout7_l cgout8_l cgout9_l cgout10_l o 14 gip signals for right side gip on panel view (left side in ic bump view), unused pins should be left open. cgout1_r cgout2_r cgout3_r cgout4_r cgout5_r cgout6_r cgout7_r cgout8_r cgout9_r cgout10_r o 14 gip signals for right side gip on panel view (right side in ic bump view), unused pins should be left open. vbias o 2 gip bias voltage for some special gip circuits. if not used, leave this pin open. power supply pins pccs0 ~ pccs1 i 2 vssd / vdd3 select the vsp/vsn bumping method as listed below: pccs1 pccs0 driving mode 0 0 setting invalid 0 1 setting invalid 1 0 pfm one inductor mode (type c) 1 1 charge bump mode(use hx5186-a) must be connected to vssd or vdd3. vdd1 i 5 power supply a power supply for the i/o circuit. vdd1=1.65 to 3.3v vdd2 i 6 power supply a power supply for the analog power. vdd2=2.3 to 4.8v vdd2 input level should be same as vdd3 input level to avoid the level-mismatching at internal level shifter circuit. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.16- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 vdd3 i 6 power supply a power supply for the logic power, dc/dc converter vdd3=2.3 to 4.8v. vssa p 6 power supply analoge ground. vssa=0v. when using the cog method, connect to vssd on the fpc to prevent noise. vssac p 2 power supply analoge ground. must connect to vssa on the fpc. vssd p 16 power supply ground for the internal logic. vssd=0v. when using the cog method, connect to vssa on the fpc to prevent noise. vpp i 2 power supply external high voltage pin used in otp mode and operates at 7.5v. if not used, let it open. output pins of power and reference voltage vsp i 7 stabilizing capacitor input voltage from the set-up circuit (4.7v to 5.5v). i t is generated from vdd3. vsn i 6 stabilizing capacitor input voltage from the set-up circuit (-4.7v to - 5.5v). it is generated from vdd3. vspc i 1 vsp positive boosting reference voltage input. vsnc i 1 vsn negative boosting reference voltage input. vspr o 2 stabilizing capacitor positive regulated voltage output (3.5v to vsp - 0.5) vsnr o 2 stabilizing capacitor positive regulated voltage output (-3.5v to vsn + 0.5) vddd o 19 stabilizing capacitor internal logic voltage output vdddn o 5 stabilizing capacitor internal logic voltage output (-2.5v fixed) vref o 2 stabilizing capacitor reference voltage from internal band gap circuit. the t olerance of vref voltage is 3 .(1.8v fixed) vgh o 10 stabilizing capacitor output voltage from the step-up circuit, it is generated from vsp and vsn. connect to a stabilizing capacitor between vssa and vgh. vgl o 10 stabilizing capacitor output voltage from the step-up circuit, it is generated from vsp and vsn. connect to a stabilizing capacitor between vssa and vgl. place a schottkey barrier diode between vssa and vgl. lvgl o 15 stabilizing capacitor most negative voltage for some special gip circuits. if not used, connect to vgl. vcom o 14 stabilizing capacitor the power supply of common voltage in dc com driving. the voltage range is set between -2v to 0v. it must be connected a stabilizing capacitor 2.2u to vssd. vcomr i 1 input the input pad of external vcom voltage. dc/dc pumping c21ap, c21an c22ap, c22an i/o 16 step-up capacitor connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vgl voltage. c23ap, c23an c24ap, c24an i/o 16 step-up capacitor connect to the step-up capacitors according to the dc/dc pumping factor by pumping the vgh voltage. c41ap, c41an i/o 6 step-up capacitor connect to the step-up capacitors according to the dc/dc pumping factor by pumping the lvgl voltage. vcsw1 o 4 - boosting control output1, it needs to connect to the gate pin of nmos on external dc/dc converter circuit. (0 to vdd3) vcsw2 o 4 - boosting control output2, it needs to connect to the gate pin of pmos on external dc/dc converter circuit. (0 to vdd3) cabc & abc & ambient light sensor cabc_pwm_out o 1 - backlight on/fff control pin. if use cabc function, the pin can connect to external led driver ic. the output voltage range=0 to vdd1. test pins osc i 1 open oscillator input for test purpose. if not used, please let it open or connected to vssd.(weak pull low) test1 i 1 open a test pin. this pin is by internal logic function test.this pin can output on fpc. if not used, let it open or connected to vssd.(weak pull low) test2 i 1 open a test pin. this pin is by internal logic function test.this pin can output on fpc. if not used, let it open or connected to vssd.(weak pull low) vtestoutp o 1 open a test pin. disconnect it. this pin will output gamma voltage. this pin can output on fpc. vtestoutn o 1 open a test pin. disconnect it. this pin will output gamma voltage. this pin can output on fpc. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.17- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 dummyr1 dummyr2 - 2 open dummy pads. available for measuring the cog contact resistance. they are short-circuited within the chip. dummy17~1 - 17 open not used. let it open. iognddum - 3 open dummy pad. connect to grand internally. mipi-dsi interface parts dsi_d0p, dsi_d0n i/o 6 dsi host mipi-dsi data differential signal input pins. (data lane 0) dsi_cp, dsi_cn i 6 dsi host mipi-dsi clock differential signal input pins. dsi_d1p, dsi_d1n i 6 dsi host mipi-dsi data differential signal input pins. (data lane 1) dsi_vcc p 5 power supply power supply for the mipi dsi analog power.dsi_vcc=1.65v to 3.3v dsi_vss p 9 ground mipi dsi analogy ground. dsi_vss=0v. when using the cog meth od, connect to vssa on the fpc to prevent noise. dsi_ldo o 2 capacitor dsi: dsi regulator output pin. (1.2v to 1.3v) connect to a stabilizing capacitor between dsi_vss and dsi_ldo if not used, please open these pins. dsi_ldo_enb i 1 input dsi i/f: control signal of dsi_ldo. the default setting of dsi_ldo_enb is low. high: disable the dsi_ldo. low: enable the dsi_ldo. it must be connected to vdd1 or vssd. (latch type) mddi interface parts mddi_stbp, mddi _stbn - 6 high speed interface host high speed interface clock differential signal input pins. connect to a terminal resistance (100 ) between mddi_stbp and mddi_stbn. if not used, please let it connected to vssd. mddi _d0p, mddi _d0n - 6 high speed interface host high speed interface data differential signal input pins (data lane 0). connect to a terminal resistance (100 ) between mddi_d0p and mddi_d0n. if not used, please let it connected to vssd. mddi _d1p, mddi _d1n - 6 high speed interface host high speed interface data differential signal input pins. (data lane 1) connect to a terminal resistance (100 ) between mddi_d1p and mddi_d1n. if not used, please let it connected to vssd. mddi _vcc p 5 power supply or capacitor high speed interface i/o power supply pin, 2.3v to 3.3v. mddi _vss p 9 ground high speed interface i/o ground pin. mddi _ldo o 2 capacitor high speed interface regulator output pin. connect to a stabilizing capacitor between mddi_vss and mddi_ldo. if not used, please open these pins. mddi_ldo_enb i 1 input mddi i/f: control signal of mddi_ldo. the default setting of mddi_ldo_enb is low. high: disable the mddi _ldo. low: enable the mddi _ldo. it must be connected to vdd1 or vssd. (latch type) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.18- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 3.3 pin assignment y x HX8369-A pin assignment (bump view) face up dummy1 cgout1_l no.1 no.313 (a2) chip size : 22430 x 1701 um chip thickness: 250 um 25 um pad location: pad center coordinate origin: chip center au bump size: 1. 50 um x 80 um input: no.1 ~ no.312 au bump pitch: refer to pad coordinate. au bump height : 15 um 3 um numbers in the figure corresponds to pad coordinate numbers. the chip size includes the core size seal ring size, and scribe line size c21ap vpp vref db23/ts7 resx db14 (a1) vdddn vssa te vsnr vgl vbias dummy2 bs0 db9 dummy7 vtestoutp vbias vgl cgout10_r lvgl lvgl lvgl vcom vcom dummyr1 dummy3 vcom dummy4 lvgl vgl lvgl lvgl vcom lvgl lvgl c41an vgh c41ap s1 s2 s1438 s1439 s1440 no.1760 2. 15 um x 95 um staggered lcd output side no.313 ~ no.1760 cgout2_l cgout3_l cgout4_l cgout5_l cgout6_l cgout7_l cgout8_l cgout9_l cgout10_l vgl vgl dummyr2 vgl vgl vcom vcom vcom c41ap c41ap c41an c41an vgh vgh vgh vgh vgh c21ap c21ap c21ap c21an c21an c21an c21an c23ap c23ap c23ap c23ap c23an c23an c23an c23an c22ap c22ap c22ap c22ap c22an c22an c22an c22an c24ap c24ap c24ap c24ap c24an c24an c24an c24an vpp vdddn vdddn vdddn vdddn vdd2 vdd2 vdd2 vdd2 vdd2 vdd2 vref vssa vssa vssa vssa vssa vssd vssd vssd vssd vssd vssd vssd vssd vddd vddd vddd vddd vddd vddd vdd1 vdd1 vdd1 vdd1 vdd1 cabc_pwm_out test1 test2 bs1 bs2 bs3 iognddum db22/ts6 db21/ts5 db20/ts4 db19/ts3 db18/ts2 db17/ts1 db16/ts0 db15 db13 db12 db11 db10 db8 db7 db6 db5 db4 db3 db2 db1 db0 iognddum rdx_e wrx_dcx dcx_scl csx iognddum sdi sdo vsync hsync de pclk dsi_ldo_enb/mddi_ldo_enb dummy5 osc pccs0 pccs1 dsi_vss/mddi_vss dsi_d0n/mddi_d1n dsi_d0n/mddi_d1n dsi_d0n/mddi_d1n dsi_d0p/mddi_d1p dsi_d0p/mddi_d1p dsi_d0p/mddi_d1p dsi_vss/mddi_vss dsi_clkn/mddi_stbn dsi_clkn/mddi_stbn dsi_clkn/mddi_stbn dsi_clkp/mddi_stbp dsi_clkp/mddi_stbp dsi_clkp/mddi_stbp dsi_vss/mddi_vss dsi_d1n/mddi_d0n dsi_d1n/mddi_d0n dsi_d1n/mddi_d0n dsi_d1p/mddi_d0p dsi_d1p/mddi_d0p dsi_d1p/mddi_d0p dsi_vss/mddi_vss dsi_ldo/mddi_ldo dsi_ldo/mddi_ldo dsi_vcc/mddi_vcc dsi_vcc/mddi_vcc dsi_vcc/mddi_vcc dsi_vcc/mddi_vcc dsi_vcc/mddi_vcc dsi_vss/mddi_vss dsi_vss/mddi_vss dsi_vss/mddi_vss dsi_vss/mddi_vss dsi_vss/mddi_vss vssac vssac vssd vssd vssd vssd vssd vssd vddd vddd vddd vddd vddd vddd vdddc vdddc vdddc vdddc vdddc vspr vspr vspc vsp vsp vsp vsp vsp vsp vsp vcsw1 vcsw1 vcsw1 vcsw1 vcsw2 vcsw2 vcsw2 vcsw2 vsnr vsnc vsn vsn vsn vsn vsn vsn vdd3 vdd3 vdd3 vdd3 vdd3 vdd3 vgh vgh vgh vgh vcom vcom vcom vcom lvgl lvgl lvgl lvgl dummy6 vcomr vtestoutn vcom vcom vcom dummy8 lvgl lvgl lvgl vgl vgl vgl cgout9_r cgout8_r cgout8_r cgout7_r cgout7_r cgout6_r cgout6_r cgout5_r cgout5_r cgout4_r cgout3_r cgout2_r cgout1_r dummy9 dummy10 cgout8_l cgout7_l cgout6_l cgout5_l vssd vssd vddd vddd s2 s719 s720 dummy11 dummy12 dummy13 dummy14 s721 s722 no.1033 no.312 dummy15 dummy16 s1441 dummy17 chip bump top view for truly only http://www..net/ datasheet pdf - http://www..net/
-p.19- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 3.4 pad coordinates no. name x y no. name x y no. name x y no. name x y 1 dummy1 -10885 -672 61 c21an -6685 -672 121 vddd -2485 -672 181 dsi_d0n / mddi_d1n 1715 -672 2 cgout1_l -10815 -672 62 c21an -6615 -672 122 vdd1 -2415 -672 182 dsi_d0p / mddi_d1p 1785 -672 3 cgout2_l -10745 -672 63 c23ap -6545 -672 123 vdd1 -2345 -672 183 dsi_d0p / mddi_d1p 1855 -672 4 cgout3_l -10675 -672 64 c23ap -6475 -672 124 vdd1 -2275 -672 184 dsi_d0p / mddi_d1p 1925 -672 5 cgout4_l -10605 -672 65 c23ap -6405 -672 125 vdd1 -2205 -672 185 dsi_vss / mddi_vss 1995 -672 6 cgout5_l -10535 -672 66 c23ap -6335 -672 126 vdd1 -2135 -672 186 dsi_cn / mddi_stbn 2065 -672 7 cgout5_l -10465 -672 67 c23an -6265 -672 127 cabc_pwm_out -2065 -672 187 dsi_cn / mddi_stbn 2135 -672 8 cgout6_l -10395 -672 68 c23an -6195 -672 128 te -1995 -672 188 dsi_cn / mddi_stbn 2205 -672 9 cgout6_l -10325 -672 69 c23an -6125 -672 129 test1 -1925 -672 189 dsi_cp / mddi_stbp 2275 -672 10 cgout7_l -10255 -672 70 c23an -6055 -672 130 test2 -1855 -672 190 dsi_cp / mddi_stbp 2345 -672 11 cgout7_l -10185 -672 71 c22ap -5985 -672 131 bs0 -1785 -672 191 dsi_cp / mddi_stbp 2415 -672 12 cgout8_l -10115 -672 72 c22ap -5915 -672 132 bs1 -1715 -672 192 dsi_vss / mddi_vss 2485 -672 13 cgout8_l -10045 -672 73 c22ap -5845 -672 133 bs2 -1645 -672 193 dsi_d1n / mddi_d0n 2555 -672 14 cgout9_l -9975 -672 74 c22ap -5775 -672 134 bs3 -1575 -672 194 dsi_d1n / mddi_d0n 2625 -672 15 cgout10_l -9905 -672 75 c22an -5705 -672 135 resx -1505 -672 195 dsi_d1n / mddi_d0n 2695 -672 16 vgl -9835 -672 76 c22an -5635 -672 136 iognddum -1435 -672 196 dsi_d1p / mddi_d0p 2765 -672 17 vgl -9765 -672 77 c22an -5565 -672 137 db23 -1365 -672 197 dsi_d1p / mddi_d0p 2835 -672 18 vgl -9695 -672 78 c22an -5495 -672 138 db22 -1295 -672 198 dsi_d1p / mddi_d0p 2905 -672 19 vbias -9625 -672 79 c24ap -5425 -672 139 db21 -1225 -672 199 dsi_vss / mddi_vss 2975 -672 20 lvgl -9555 -672 80 c24ap -5355 -672 140 db20 -1155 -672 200 dsi_ldo / mddi_ldo 3045 -672 21 lvgl -9485 -672 81 c24ap -5285 -672 141 db19 -1085 -672 201 dsi_ldo / mddi_ldo 3115 -672 22 lvgl -9415 -672 82 c24ap -5215 -672 142 db18 -1015 -672 202 dsi_vcc / mddi_vcc 3185 -672 23 dummy2 -9345 -672 83 c24an -5145 -672 143 db17 -945 -672 203 dsi_vcc / mddi_vcc 3255 -672 24 vcom -9275 -672 84 c24an -5075 -672 144 db16 -875 -672 204 dsi_vcc / mddi_vcc 3325 -672 25 vcom -9205 -672 85 c24an -5005 -672 145 db15 -805 -672 205 dsi_vcc / mddi_vcc 3395 -672 26 vcom -9135 -672 86 c24an -4935 -672 146 db14 -735 -672 206 dsi_vcc / mddi_vcc 3465 -672 27 dummy3 -9065 -672 87 vpp -4865 -672 147 db13 -665 -672 207 dsi_vss / mddi_vss 3535 -672 28 dummyr1 -8995 -672 88 vpp -4795 -672 148 db12 -595 -672 208 dsi_vss / mddi_vss 3605 -672 29 dummyr2 -8925 -672 89 vdddn -4725 -672 149 db11 -525 -672 209 dsi_vss / mddi_vss 3675 -672 30 dummy4 -8855 -672 90 vdddn -4655 -672 150 db10 -455 -672 210 dsi_vss / mddi_vss 3745 -672 31 vgl -8785 -672 91 vdddn -4585 -672 151 db9 -385 -672 211 dsi_vss / mddi_vss 3815 -672 32 vgl -8715 -672 92 vdddn -4515 -672 152 db8 -315 -672 212 vssac 3885 -672 33 vgl -8645 -672 93 vdddn -4445 -672 153 db7 -245 -672 213 vssac 3955 -672 34 lvgl -8575 -672 94 vdd2 -4375 -672 154 db6 -175 -672 214 vssd 4025 -672 35 lvgl -8505 -672 95 vdd2 -4305 -672 155 db5 -105 -672 215 vssd 4095 -672 36 lvgl -8435 -672 96 vdd2 -4235 -672 156 db4 -35 -672 216 vssd 4165 -672 37 lvgl -8365 -672 97 vdd2 -4165 -672 157 db3 35 -672 217 vssd 4235 -672 38 lvgl -8295 -672 98 vdd2 -4095 -672 158 db2 105 -672 218 vssd 4305 -672 39 vcom -8225 -672 99 vdd2 -4025 -672 159 db1 175 -672 219 vssd 4375 -672 40 vcom -8155 -672 100 vref -3955 -672 160 db0 245 -672 220 vssd 4445 -672 41 vcom -8085 -672 101 vref -3885 -672 161 iognddum 315 -672 221 vssd 4515 -672 42 vcom -8015 -672 102 vssa -3815 -672 162 rdx_e 385 -672 222 vddd 4585 -672 43 c41ap -7945 -672 103 vssa -3745 -672 163 wrx_dcx 455 -672 223 vddd 4655 -672 44 c41ap -7875 -672 104 vssa -3675 -672 164 dcx_scl 525 -672 224 vddd 4725 -672 45 c41ap -7805 -672 105 vssa -3605 -672 165 csx 595 -672 225 vddd 4795 -672 46 c41an -7735 -672 106 vssa -3535 -672 166 iognddum 665 -672 226 vddd 4865 -672 47 c41an -7665 -672 107 vssa -3465 -672 167 sdi 735 -672 227 vddd 4935 -672 48 c41an -7595 -672 108 vssd -3395 -672 168 sdo 805 -672 228 vddd 5005 -672 49 vgh -7525 -672 109 vssd -3325 -672 169 vsync 875 -672 229 vddd 5075 -672 50 vgh -7455 -672 110 vssd -3255 -672 170 hsync 945 -672 230 vddd 5145 -672 51 vgh -7385 -672 111 vssd -3185 -672 171 de 1015 -672 231 vddd 5215 -672 52 vgh -7315 -672 112 vssd -3115 -672 172 pclk 1085 -672 232 vddd 5285 -672 53 vgh -7245 -672 113 vssd -3045 -672 173 dsi_ldo_enb 1155 -672 233 vddd 5355 -672 54 vgh -7175 -672 114 vssd -2975 -672 174 dummy5 1225 -672 234 vddd 5425 -672 55 c21ap -7105 -672 115 vssd -2905 -672 175 osc 1295 -672 235 vspr 5495 -672 56 c21ap -7035 -672 116 vddd -2835 -672 176 pccs0 1365 -672 236 vspr 5565 -672 57 c21ap -6965 -672 117 vddd -2765 -672 177 pccs1 1435 -672 237 vspc 5635 -672 58 c21ap -6895 -672 118 vddd -2695 -672 178 dsi_vss / mddi_vss 1505 -672 238 vsp 5705 -672 59 c21an -6825 -672 119 vddd -2625 -672 179 dsi_d0n / mddi_d1n 1575 -672 239 vsp 5775 -672 60 c21an -6755 -672 120 vddd -2555 -672 180 dsi_d0n / mddi_d1n 1645 -672 240 vsp 5845 -672 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.20- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 241 vsp 5915 -672 301 cgout7_r 10115 -672 361 s47 10230 500 421 s107 9330 500 242 vsp 5985 -672 302 cgout7_r 10185 -672 362 s48 10215 613 422 s108 9315 613 243 vsp 6055 -672 303 cgout6_r 10255 -672 363 s49 10200 500 423 s109 9300 500 244 vsp 6125 -672 304 cgout6_r 10325 -672 364 s50 10185 613 424 s110 9285 613 245 vcsw1 6195 -672 305 cgout5_r 10395 -672 365 s51 10170 500 425 s111 9270 500 246 vcsw1 6265 -672 306 cgout5_r 10465 -672 366 s52 10155 613 426 s112 9255 613 247 vcsw1 6335 -672 307 cgout4_r 10535 -672 367 s53 10140 500 427 s113 9240 500 248 vcsw1 6405 -672 308 cgout3_r 10605 -672 368 s54 10125 613 428 s114 9225 613 249 vcsw2 6475 -672 309 cgout2_r 10675 -672 369 s55 10110 500 429 s115 9210 500 250 vcsw2 6545 -672 310 cgout1_r 10745 -672 370 s56 10095 613 430 s116 9195 613 251 vcsw2 6615 -672 311 dummy9 10815 -672 371 s57 10080 500 431 s117 9180 500 252 vcsw2 6685 -672 312 dummy10 10885 -672 372 s58 10065 613 432 s118 9165 613 253 vsnr 6755 -672 313 dummy15 10950 500 373 s59 10050 500 433 s119 9150 500 254 vsnr 6825 -672 314 dummy16 10935 613 374 s60 10035 613 434 s120 9135 613 255 vsnc 6895 -672 315 s1 10920 500 375 s61 10020 500 435 s121 9120 500 256 vsn 6965 -672 316 s2 10905 613 376 s62 10005 613 436 s122 9105 613 257 vsn 7035 -672 317 s3 10890 500 377 s63 9990 500 437 s123 9090 500 258 vsn 7105 -672 318 s4 10875 613 378 s64 9975 613 438 s124 9075 613 259 vsn 7175 -672 319 s5 10860 500 379 s65 9960 500 439 s125 9060 500 260 vsn 7245 -672 320 s6 10845 613 380 s66 9945 613 440 s126 9045 613 261 vsn 7315 -672 321 s7 10830 500 381 s67 9930 500 441 s127 9030 500 262 vdd3 7385 -672 322 s8 10815 613 382 s68 9915 613 442 s128 9015 613 263 vdd3 7455 -672 323 s9 10800 500 383 s69 9900 500 443 s129 9000 500 264 vdd3 7525 -672 324 s10 10785 613 384 s70 9885 613 444 s130 8985 613 265 vdd3 7595 -672 325 s11 10770 500 385 s71 9870 500 445 s131 8970 500 266 vdd3 7665 -672 326 s12 10755 613 386 s72 9855 613 446 s132 8955 613 267 vdd3 7735 -672 327 s13 10740 500 387 s73 9840 500 447 s133 8940 500 268 vgh 7805 -672 328 s14 10725 613 388 s74 9825 613 448 s134 8925 613 269 vgh 7875 -672 329 s15 10710 500 389 s75 9810 500 449 s135 8910 500 270 vgh 7945 -672 330 s16 10695 613 390 s76 9795 613 450 s136 8895 613 271 vgh 8015 -672 331 s17 10680 500 391 s77 9780 500 451 s137 8880 500 272 vcom 8085 -672 332 s18 10665 613 392 s78 9765 613 452 s138 8865 613 273 vcom 8155 -672 333 s19 10650 500 393 s79 9750 500 453 s139 8850 500 274 vcom 8225 -672 334 s20 10635 613 394 s80 9735 613 454 s140 8835 613 275 vcom 8295 -672 335 s21 10620 500 395 s81 9720 500 455 s141 8820 500 276 lvgl 8365 -672 336 s22 10605 613 396 s82 9705 613 456 s142 8805 613 277 lvgl 8435 -672 337 s23 10590 500 397 s83 9690 500 457 s143 8790 500 278 lvgl 8505 -672 338 s24 10575 613 398 s84 9675 613 458 s144 8775 613 279 lvgl 8575 -672 339 s25 10560 500 399 s85 9660 500 459 s145 8760 500 280 vtestoutp 8645 -672 340 s26 10545 613 400 s86 9645 613 460 s146 8745 613 281 dummy6 8715 -672 341 s27 10530 500 401 s87 9630 500 461 s147 8730 500 282 vcomr 8785 -672 342 s28 10515 613 402 s88 9615 613 462 s148 8715 613 283 vtestoutn 8855 -672 343 s29 10500 500 403 s89 9600 500 463 s149 8700 500 284 vcom 8925 -672 344 s30 10485 613 404 s90 9585 613 464 s150 8685 613 285 vcom 8995 -672 345 s31 10470 500 405 s91 9570 500 465 s151 8670 500 286 vcom 9065 -672 346 s32 10455 613 406 s92 9555 613 466 s152 8655 613 287 dummy7 9135 -672 347 s33 10440 500 407 s93 9540 500 467 s153 8640 500 288 dummy8 9205 -672 348 s34 10425 613 408 s94 9525 613 468 s154 8625 613 289 lvgl 9275 -672 349 s35 10410 500 409 s95 9510 500 469 s155 8610 500 290 lvgl 9345 -672 350 s36 10395 613 410 s96 9495 613 470 s156 8595 613 291 lvgl 9415 -672 351 s37 10380 500 411 s97 9480 500 471 s157 8580 500 292 vbias 9485 -672 352 s38 10365 613 412 s98 9465 613 472 s158 8565 613 293 vgl 9555 -672 353 s39 10350 500 413 s99 9450 500 473 s159 8550 500 294 vgl 9625 -672 354 s40 10335 613 414 s100 9435 613 474 s160 8535 613 295 vgl 9695 -672 355 s41 10320 500 415 s101 9420 500 475 s161 8520 500 296 vgl 9765 -672 356 s42 10305 613 416 s102 9405 613 476 s162 8505 613 297 cgout10_r 9835 -672 357 s43 10290 500 417 s103 9390 500 477 s163 8490 500 298 cgout9_r 9905 -672 358 s44 10275 613 418 s104 9375 613 478 s164 8475 613 299 cgout8_r 9975 -672 359 s45 10260 500 419 s105 9360 500 479 s165 8460 500 300 cgout8_r 10045 -672 360 s46 10245 613 420 s106 9345 613 480 s166 8445 613 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.21- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 481 s167 8430 500 541 s227 7530 500 601 s287 6630 500 661 s347 5730 500 482 s168 8415 613 542 s228 7515 613 602 s288 6615 613 662 s348 5715 613 483 s169 8400 500 543 s229 7500 500 603 s289 6600 500 663 s349 5700 500 484 s170 8385 613 544 s230 7485 613 604 s290 6585 613 664 s350 5685 613 485 s171 8370 500 545 s231 7470 500 605 s291 6570 500 665 s351 5670 500 486 s172 8355 613 546 s232 7455 613 606 s292 6555 613 666 s352 5655 613 487 s173 8340 500 547 s233 7440 500 607 s293 6540 500 667 s353 5640 500 488 s174 8325 613 548 s234 7425 613 608 s294 6525 613 668 s354 5625 613 489 s175 8310 500 549 s235 7410 500 609 s295 6510 500 669 s355 5610 500 490 s176 8295 613 550 s236 7395 613 610 s296 6495 613 670 s356 5595 613 491 s177 8280 500 551 s237 7380 500 611 s297 6480 500 671 s357 5580 500 492 s178 8265 613 552 s238 7365 613 612 s298 6465 613 672 s358 5565 613 493 s179 8250 500 553 s239 7350 500 613 s299 6450 500 673 s359 5550 500 494 s180 8235 613 554 s240 7335 613 614 s300 6435 613 674 s360 5535 613 495 s181 8220 500 555 s241 7320 500 615 s301 6420 500 675 s361 5520 500 496 s182 8205 613 556 s242 7305 613 616 s302 6405 613 676 s362 5505 613 497 s183 8190 500 557 s243 7290 500 617 s303 6390 500 677 s363 5490 500 498 s184 8175 613 558 s244 7275 613 618 s304 6375 613 678 s364 5475 613 499 s185 8160 500 559 s245 7260 500 619 s305 6360 500 679 s365 5460 500 500 s186 8145 613 560 s246 7245 613 620 s306 6345 613 680 s366 5445 613 501 s187 8130 500 561 s247 7230 500 621 s307 6330 500 681 s367 5430 500 502 s188 8115 613 562 s248 7215 613 622 s308 6315 613 682 s368 5415 613 503 s189 8100 500 563 s249 7200 500 623 s309 6300 500 683 s369 5400 500 504 s190 8085 613 564 s250 7185 613 624 s310 6285 613 684 s370 5385 613 505 s191 8070 500 565 s251 7170 500 625 s311 6270 500 685 s371 5370 500 506 s192 8055 613 566 s252 7155 613 626 s312 6255 613 686 s372 5355 613 507 s193 8040 500 567 s253 7140 500 627 s313 6240 500 687 s373 5340 500 508 s194 8025 613 568 s254 7125 613 628 s314 6225 613 688 s374 5325 613 509 s195 8010 500 569 s255 7110 500 629 s315 6210 500 689 s375 5310 500 510 s196 7995 613 570 s256 7095 613 630 s316 6195 613 690 s376 5295 613 511 s197 7980 500 571 s257 7080 500 631 s317 6180 500 691 s377 5280 500 512 s198 7965 613 572 s258 7065 613 632 s318 6165 613 692 s378 5265 613 513 s199 7950 500 573 s259 7050 500 633 s319 6150 500 693 s379 5250 500 514 s200 7935 613 574 s260 7035 613 634 s320 6135 613 694 s380 5235 613 515 s201 7920 500 575 s261 7020 500 635 s321 6120 500 695 s381 5220 500 516 s202 7905 613 576 s262 7005 613 636 s322 6105 613 696 s382 5205 613 517 s203 7890 500 577 s263 6990 500 637 s323 6090 500 697 s383 5190 500 518 s204 7875 613 578 s264 6975 613 638 s324 6075 613 698 s384 5175 613 519 s205 7860 500 579 s265 6960 500 639 s325 6060 500 699 s385 5160 500 520 s206 7845 613 580 s266 6945 613 640 s326 6045 613 700 s386 5145 613 521 s207 7830 500 581 s267 6930 500 641 s327 6030 500 701 s387 5130 500 522 s208 7815 613 582 s268 6915 613 642 s328 6015 613 702 s388 5115 613 523 s209 7800 500 583 s269 6900 500 643 s329 6000 500 703 s389 5100 500 524 s210 7785 613 584 s270 6885 613 644 s330 5985 613 704 s390 5085 613 525 s211 7770 500 585 s271 6870 500 645 s331 5970 500 705 s391 5070 500 526 s212 7755 613 586 s272 6855 613 646 s332 5955 613 706 s392 5055 613 527 s213 7740 500 587 s273 6840 500 647 s333 5940 500 707 s393 5040 500 528 s214 7725 613 588 s274 6825 613 648 s334 5925 613 708 s394 5025 613 529 s215 7710 500 589 s275 6810 500 649 s335 5910 500 709 s395 5010 500 530 s216 7695 613 590 s276 6795 613 650 s336 5895 613 710 s396 4995 613 531 s217 7680 500 591 s277 6780 500 651 s337 5880 500 711 s397 4980 500 532 s218 7665 613 592 s278 6765 613 652 s338 5865 613 712 s398 4965 613 533 s219 7650 500 593 s279 6750 500 653 s339 5850 500 713 s399 4950 500 534 s220 7635 613 594 s280 6735 613 654 s340 5835 613 714 s400 4935 613 535 s221 7620 500 595 s281 6720 500 655 s341 5820 500 715 s401 4920 500 536 s222 7605 613 596 s282 6705 613 656 s342 5805 613 716 s402 4905 613 537 s223 7590 500 597 s283 6690 500 657 s343 5790 500 717 s403 4890 500 538 s224 7575 613 598 s284 6675 613 658 s344 5775 613 718 s404 4875 613 539 s225 7560 500 599 s285 6660 500 659 s345 5760 500 719 s405 4860 500 540 s226 7545 613 600 s286 6645 613 660 s346 5745 613 720 s406 4845 613 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.22- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 721 s407 4830 500 781 s467 3930 500 841 s527 3030 500 901 s587 2130 500 722 s408 4815 613 782 s468 3915 613 842 s528 3015 613 902 s588 2115 613 723 s409 4800 500 783 s469 3900 500 843 s529 3000 500 903 s589 2100 500 724 s410 4785 613 784 s470 3885 613 844 s530 2985 613 904 s590 2085 613 725 s411 4770 500 785 s471 3870 500 845 s531 2970 500 905 s591 2070 500 726 s412 4755 613 786 s472 3855 613 846 s532 2955 613 906 s592 2055 613 727 s413 4740 500 787 s473 3840 500 847 s533 2940 500 907 s593 2040 500 728 s414 4725 613 788 s474 3825 613 848 s534 2925 613 908 s594 2025 613 729 s415 4710 500 789 s475 3810 500 849 s535 2910 500 909 s595 2010 500 730 s416 4695 613 790 s476 3795 613 850 s536 2895 613 910 s596 1995 613 731 s417 4680 500 791 s477 3780 500 851 s537 2880 500 911 s597 1980 500 732 s418 4665 613 792 s478 3765 613 852 s538 2865 613 912 s598 1965 613 733 s419 4650 500 793 s479 3750 500 853 s539 2850 500 913 s599 1950 500 734 s420 4635 613 794 s480 3735 613 854 s540 2835 613 914 s600 1935 613 735 s421 4620 500 795 s481 3720 500 855 s541 2820 500 915 s601 1920 500 736 s422 4605 613 796 s482 3705 613 856 s542 2805 613 916 s602 1905 613 737 s423 4590 500 797 s483 3690 500 857 s543 2790 500 917 s603 1890 500 738 s424 4575 613 798 s484 3675 613 858 s544 2775 613 918 s604 1875 613 739 s425 4560 500 799 s485 3660 500 859 s545 2760 500 919 s605 1860 500 740 s426 4545 613 800 s486 3645 613 860 s546 2745 613 920 s606 1845 613 741 s427 4530 500 801 s487 3630 500 861 s547 2730 500 921 s607 1830 500 742 s428 4515 613 802 s488 3615 613 862 s548 2715 613 922 s608 1815 613 743 s429 4500 500 803 s489 3600 500 863 s549 2700 500 923 s609 1800 500 744 s430 4485 613 804 s490 3585 613 864 s550 2685 613 924 s610 1785 613 745 s431 4470 500 805 s491 3570 500 865 s551 2670 500 925 s611 1770 500 746 s432 4455 613 806 s492 3555 613 866 s552 2655 613 926 s612 1755 613 747 s433 4440 500 807 s493 3540 500 867 s553 2640 500 927 s613 1740 500 748 s434 4425 613 808 s494 3525 613 868 s554 2625 613 928 s614 1725 613 749 s435 4410 500 809 s495 3510 500 869 s555 2610 500 929 s615 1710 500 750 s436 4395 613 810 s496 3495 613 870 s556 2595 613 930 s616 1695 613 751 s437 4380 500 811 s497 3480 500 871 s557 2580 500 931 s617 1680 500 752 s438 4365 613 812 s498 3465 613 872 s558 2565 613 932 s618 1665 613 753 s439 4350 500 813 s499 3450 500 873 s559 2550 500 933 s619 1650 500 754 s440 4335 613 814 s500 3435 613 874 s560 2535 613 934 s620 1635 613 755 s441 4320 500 815 s501 3420 500 875 s561 2520 500 935 s621 1620 500 756 s442 4305 613 816 s502 3405 613 876 s562 2505 613 936 s622 1605 613 757 s443 4290 500 817 s503 3390 500 877 s563 2490 500 937 s623 1590 500 758 s444 4275 613 818 s504 3375 613 878 s564 2475 613 938 s624 1575 613 759 s445 4260 500 819 s505 3360 500 879 s565 2460 500 939 s625 1560 500 760 s446 4245 613 820 s506 3345 613 880 s566 2445 613 940 s626 1545 613 761 s447 4230 500 821 s507 3330 500 881 s567 2430 500 941 s627 1530 500 762 s448 4215 613 822 s508 3315 613 882 s568 2415 613 942 s628 1515 613 763 s449 4200 500 823 s509 3300 500 883 s569 2400 500 943 s629 1500 500 764 s450 4185 613 824 s510 3285 613 884 s570 2385 613 944 s630 1485 613 765 s451 4170 500 825 s511 3270 500 885 s571 2370 500 945 s631 1470 500 766 s452 4155 613 826 s512 3255 613 886 s572 2355 613 946 s632 1455 613 767 s453 4140 500 827 s513 3240 500 887 s573 2340 500 947 s633 1440 500 768 s454 4125 613 828 s514 3225 613 888 s574 2325 613 948 s634 1425 613 769 s455 4110 500 829 s515 3210 500 889 s575 2310 500 949 s635 1410 500 770 s456 4095 613 830 s516 3195 613 890 s576 2295 613 950 s636 1395 613 771 s457 4080 500 831 s517 3180 500 891 s577 2280 500 951 s637 1380 500 772 s458 4065 613 832 s518 3165 613 892 s578 2265 613 952 s638 1365 613 773 s459 4050 500 833 s519 3150 500 893 s579 2250 500 953 s639 1350 500 774 s460 4035 613 834 s520 3135 613 894 s580 2235 613 954 s640 1335 613 775 s461 4020 500 835 s521 3120 500 895 s581 2220 500 955 s641 1320 500 776 s462 4005 613 836 s522 3105 613 896 s582 2205 613 956 s642 1305 613 777 s463 3990 500 837 s523 3090 500 897 s583 2190 500 957 s643 1290 500 778 s464 3975 613 838 s524 3075 613 898 s584 2175 613 958 s644 1275 613 779 s465 3960 500 839 s525 3060 500 899 s585 2160 500 959 s645 1260 500 780 s466 3945 613 840 s526 3045 613 900 s586 2145 613 960 s646 1245 613 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.23- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 961 s647 1230 500 1021 s707 330 500 1081 s763 -765 613 1141 s823 -1665 613 962 s648 1215 613 1022 s708 315 613 1082 s764 -780 500 1142 s824 -1680 500 963 s649 1200 500 1023 s709 300 500 1083 s765 -795 613 1143 s825 -1695 613 964 s650 1185 613 1024 s710 285 613 1084 s766 -810 500 1144 s826 -1710 500 965 s651 1170 500 1025 s711 270 500 1085 s767 -825 613 1145 s827 -1725 613 966 s652 1155 613 1026 s712 255 613 1086 s768 -840 500 1146 s828 -1740 500 967 s653 1140 500 1027 s713 240 500 1087 s769 -855 613 1147 s829 -1755 613 968 s654 1125 613 1028 s714 225 613 1088 s770 -870 500 1148 s830 -1770 500 969 s655 1110 500 1029 s715 210 500 1089 s771 -885 613 1149 s831 -1785 613 970 s656 1095 613 1030 s716 195 613 1090 s772 -900 500 1150 s832 -1800 500 971 s657 1080 500 1031 s717 180 500 1091 s773 -915 613 1151 s833 -1815 613 972 s658 1065 613 1032 s718 165 613 1092 s774 -930 500 1152 s834 -1830 500 973 s659 1050 500 1033 s719 150 500 1093 s775 -945 613 1153 s835 -1845 613 974 s660 1035 613 1034 s720 135 613 1094 s776 -960 500 1154 s836 -1860 500 975 s661 1020 500 1035 dummy11 90 613 1095 s777 -975 613 1155 s837 -1875 613 976 s662 1005 613 1036 dummy12 30 613 1096 s778 -990 500 1156 s838 -1890 500 977 s663 990 500 1037 dummy13 -30 613 1097 s779 -1005 613 1157 s839 -1905 613 978 s664 975 613 1038 dummy14 -90 613 1098 s780 -1020 500 1158 s840 -1920 500 979 s665 960 500 1039 s721 -135 613 1099 s781 -1035 613 1159 s841 -1935 613 980 s666 945 613 1040 s722 -150 500 1100 s782 -1050 500 1160 s842 -1950 500 981 s667 930 500 1041 s723 -165 613 1101 s783 -1065 613 1161 s843 -1965 613 982 s668 915 613 1042 s724 -180 500 1102 s784 -1080 500 1162 s844 -1980 500 983 s669 900 500 1043 s725 -195 613 1103 s785 -1095 613 1163 s845 -1995 613 984 s670 885 613 1044 s726 -210 500 1104 s786 -1110 500 1164 s846 -2010 500 985 s671 870 500 1045 s727 -225 613 1105 s787 -1125 613 1165 s847 -2025 613 986 s672 855 613 1046 s728 -240 500 1106 s788 -1140 500 1166 s848 -2040 500 987 s673 840 500 1047 s729 -255 613 1107 s789 -1155 613 1167 s849 -2055 613 988 s674 825 613 1048 s730 -270 500 1108 s790 -1170 500 1168 s850 -2070 500 989 s675 810 500 1049 s731 -285 613 1109 s791 -1185 613 1169 s851 -2085 613 990 s676 795 613 1050 s732 -300 500 1110 s792 -1200 500 1170 s852 -2100 500 991 s677 780 500 1051 s733 -315 613 1111 s793 -1215 613 1171 s853 -2115 613 992 s678 765 613 1052 s734 -330 500 1112 s794 -1230 500 1172 s854 -2130 500 993 s679 750 500 1053 s735 -345 613 1113 s795 -1245 613 1173 s855 -2145 613 994 s680 735 613 1054 s736 -360 500 1114 s796 -1260 500 1174 s856 -2160 500 995 s681 720 500 1055 s737 -375 613 1115 s797 -1275 613 1175 s857 -2175 613 996 s682 705 613 1056 s738 -390 500 1116 s798 -1290 500 1176 s858 -2190 500 997 s683 690 500 1057 s739 -405 613 1117 s799 -1305 613 1177 s859 -2205 613 998 s684 675 613 1058 s740 -420 500 1118 s800 -1320 500 1178 s860 -2220 500 999 s685 660 500 1059 s741 -435 613 1119 s801 -1335 613 1179 s861 -2235 613 1000 s686 645 613 1060 s742 -450 500 1120 s802 -1350 500 1180 s862 -2250 500 1001 s687 630 500 1061 s743 -465 613 1121 s803 -1365 613 1181 s863 -2265 613 1002 s688 615 613 1062 s744 -480 500 1122 s804 -1380 500 1182 s864 -2280 500 1003 s689 600 500 1063 s745 -495 613 1123 s805 -1395 613 1183 s865 -2295 613 1004 s690 585 613 1064 s746 -510 500 1124 s806 -1410 500 1184 s866 -2310 500 1005 s691 570 500 1065 s747 -525 613 1125 s807 -1425 613 1185 s867 -2325 613 1006 s692 555 613 1066 s748 -540 500 1126 s808 -1440 500 1186 s868 -2340 500 1007 s693 540 500 1067 s749 -555 613 1127 s809 -1455 613 1187 s869 -2355 613 1008 s694 525 613 1068 s750 -570 500 1128 s810 -1470 500 1188 s870 -2370 500 1009 s695 510 500 1069 s751 -585 613 1129 s811 -1485 613 1189 s871 -2385 613 1010 s696 495 613 1070 s752 -600 500 1130 s812 -1500 500 1190 s872 -2400 500 1011 s697 480 500 1071 s753 -615 613 1131 s813 -1515 613 1191 s873 -2415 613 1012 s698 465 613 1072 s754 -630 500 1132 s814 -1530 500 1192 s874 -2430 500 1013 s699 450 500 1073 s755 -645 613 1133 s815 -1545 613 1193 s875 -2445 613 1014 s700 435 613 1074 s756 -660 500 1134 s816 -1560 500 1194 s876 -2460 500 1015 s701 420 500 1075 s757 -675 613 1135 s817 -1575 613 1195 s877 -2475 613 1016 s702 405 613 1076 s758 -690 500 1136 s818 -1590 500 1196 s878 -2490 500 1017 s703 390 500 1077 s759 -705 613 1137 s819 -1605 613 1197 s879 -2505 613 1018 s704 375 613 1078 s760 -720 500 1138 s820 -1620 500 1198 s880 -2520 500 1019 s705 360 500 1079 s761 -735 613 1139 s821 -1635 613 1199 s881 -2535 613 1020 s706 345 613 1080 s762 -750 500 1140 s822 -1650 500 1200 s882 -2550 500 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.24- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 1201 s883 -2565 613 1261 s943 -3465 613 1321 s1003 -4365 613 1381 s1063 -5265 613 1202 s884 -2580 500 1262 s944 -3480 500 1322 s1004 -4380 500 1382 s1064 -5280 500 1203 s885 -2595 613 1263 s945 -3495 613 1323 s1005 -4395 613 1383 s1065 -5295 613 1204 s886 -2610 500 1264 s946 -3510 500 1324 s1006 -4410 500 1384 s1066 -5310 500 1205 s887 -2625 613 1265 s947 -3525 613 1325 s1007 -4425 613 1385 s1067 -5325 613 1206 s888 -2640 500 1266 s948 -3540 500 1326 s1008 -4440 500 1386 s1068 -5340 500 1207 s889 -2655 613 1267 s949 -3555 613 1327 s1009 -4455 613 1387 s1069 -5355 613 1208 s890 -2670 500 1268 s950 -3570 500 1328 s1010 -4470 500 1388 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s1059 -5205 613 1437 s1119 -6105 613 1258 s940 -3420 500 1318 s1000 -4320 500 1378 s1060 -5220 500 1438 s1120 -6120 500 1259 s941 -3435 613 1319 s1001 -4335 613 1379 s1061 -5235 613 1439 s1121 -6135 613 1260 s942 -3450 500 1320 s1002 -4350 500 1380 s1062 -5250 500 1440 s1122 -6150 500 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.25- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y no. name x y no. name x y 1441 s1123 -6165 613 1501 s1183 -7065 613 1561 s1243 -7965 613 1621 s1303 -8865 613 1442 s1124 -6180 500 1502 s1184 -7080 500 1562 s1244 -7980 500 1622 s1304 -8880 500 1443 s1125 -6195 613 1503 s1185 -7095 613 1563 s1245 -7995 613 1623 s1305 -8895 613 1444 s1126 -6210 500 1504 s1186 -7110 500 1564 s1246 -8010 500 1624 s1306 -8910 500 1445 s1127 -6225 613 1505 s1187 -7125 613 1565 s1247 -8025 613 1625 s1307 -8925 613 1446 s1128 -6240 500 1506 s1188 -7140 500 1566 s1248 -8040 500 1626 s1308 -8940 500 1447 s1129 -6255 613 1507 s1189 -7155 613 1567 s1249 -8055 613 1627 s1309 -8955 613 1448 s1130 -6270 500 1508 s1190 -7170 500 1568 s1250 -8070 500 1628 s1310 -8970 500 1449 s1131 -6285 613 1509 s1191 -7185 613 1569 s1251 -8085 613 1629 s1311 -8985 613 1450 s1132 -6300 500 1510 s1192 -7200 500 1570 s1252 -8100 500 1630 s1312 -9000 500 1451 s1133 -6315 613 1511 s1193 -7215 613 1571 s1253 -8115 613 1631 s1313 -9015 613 1452 s1134 -6330 500 1512 s1194 -7230 500 1572 s1254 -8130 500 1632 s1314 -9030 500 1453 s1135 -6345 613 1513 s1195 -7245 613 1573 s1255 -8145 613 1633 s1315 -9045 613 1454 s1136 -6360 500 1514 s1196 -7260 500 1574 s1256 -8160 500 1634 s1316 -9060 500 1455 s1137 -6375 613 1515 s1197 -7275 613 1575 s1257 -8175 613 1635 s1317 -9075 613 1456 s1138 -6390 500 1516 s1198 -7290 500 1576 s1258 -8190 500 1636 s1318 -9090 500 1457 s1139 -6405 613 1517 s1199 -7305 613 1577 s1259 -8205 613 1637 s1319 -9105 613 1458 s1140 -6420 500 1518 s1200 -7320 500 1578 s1260 -8220 500 1638 s1320 -9120 500 1459 s1141 -6435 613 1519 s1201 -7335 613 1579 s1261 -8235 613 1639 s1321 -9135 613 1460 s1142 -6450 500 1520 s1202 -7350 500 1580 s1262 -8250 500 1640 s1322 -9150 500 1461 s1143 -6465 613 1521 s1203 -7365 613 1581 s1263 -8265 613 1641 s1323 -9165 613 1462 s1144 -6480 500 1522 s1204 -7380 500 1582 s1264 -8280 500 1642 s1324 -9180 500 1463 s1145 -6495 613 1523 s1205 -7395 613 1583 s1265 -8295 613 1643 s1325 -9195 613 1464 s1146 -6510 500 1524 s1206 -7410 500 1584 s1266 -8310 500 1644 s1326 -9210 500 1465 s1147 -6525 613 1525 s1207 -7425 613 1585 s1267 -8325 613 1645 s1327 -9225 613 1466 s1148 -6540 500 1526 s1208 -7440 500 1586 s1268 -8340 500 1646 s1328 -9240 500 1467 s1149 -6555 613 1527 s1209 -7455 613 1587 s1269 -8355 613 1647 s1329 -9255 613 1468 s1150 -6570 500 1528 s1210 -7470 500 1588 s1270 -8370 500 1648 s1330 -9270 500 1469 s1151 -6585 613 1529 s1211 -7485 613 1589 s1271 -8385 613 1649 s1331 -9285 613 1470 s1152 -6600 500 1530 s1212 -7500 500 1590 s1272 -8400 500 1650 s1332 -9300 500 1471 s1153 -6615 613 1531 s1213 -7515 613 1591 s1273 -8415 613 1651 s1333 -9315 613 1472 s1154 -6630 500 1532 s1214 -7530 500 1592 s1274 -8430 500 1652 s1334 -9330 500 1473 s1155 -6645 613 1533 s1215 -7545 613 1593 s1275 -8445 613 1653 s1335 -9345 613 1474 s1156 -6660 500 1534 s1216 -7560 500 1594 s1276 -8460 500 1654 s1336 -9360 500 1475 s1157 -6675 613 1535 s1217 -7575 613 1595 s1277 -8475 613 1655 s1337 -9375 613 1476 s1158 -6690 500 1536 s1218 -7590 500 1596 s1278 -8490 500 1656 s1338 -9390 500 1477 s1159 -6705 613 1537 s1219 -7605 613 1597 s1279 -8505 613 1657 s1339 -9405 613 1478 s1160 -6720 500 1538 s1220 -7620 500 1598 s1280 -8520 500 1658 s1340 -9420 500 1479 s1161 -6735 613 1539 s1221 -7635 613 1599 s1281 -8535 613 1659 s1341 -9435 613 1480 s1162 -6750 500 1540 s1222 -7650 500 1600 s1282 -8550 500 1660 s1342 -9450 500 1481 s1163 -6765 613 1541 s1223 -7665 613 1601 s1283 -8565 613 1661 s1343 -9465 613 1482 s1164 -6780 500 1542 s1224 -7680 500 1602 s1284 -8580 500 1662 s1344 -9480 500 1483 s1165 -6795 613 1543 s1225 -7695 613 1603 s1285 -8595 613 1663 s1345 -9495 613 1484 s1166 -6810 500 1544 s1226 -7710 500 1604 s1286 -8610 500 1664 s1346 -9510 500 1485 s1167 -6825 613 1545 s1227 -7725 613 1605 s1287 -8625 613 1665 s1347 -9525 613 1486 s1168 -6840 500 1546 s1228 -7740 500 1606 s1288 -8640 500 1666 s1348 -9540 500 1487 s1169 -6855 613 1547 s1229 -7755 613 1607 s1289 -8655 613 1667 s1349 -9555 613 1488 s1170 -6870 500 1548 s1230 -7770 500 1608 s1290 -8670 500 1668 s1350 -9570 500 1489 s1171 -6885 613 1549 s1231 -7785 613 1609 s1291 -8685 613 1669 s1351 -9585 613 1490 s1172 -6900 500 1550 s1232 -7800 500 1610 s1292 -8700 500 1670 s1352 -9600 500 1491 s1173 -6915 613 1551 s1233 -7815 613 1611 s1293 -8715 613 1671 s1353 -9615 613 1492 s1174 -6930 500 1552 s1234 -7830 500 1612 s1294 -8730 500 1672 s1354 -9630 500 1493 s1175 -6945 613 1553 s1235 -7845 613 1613 s1295 -8745 613 1673 s1355 -9645 613 1494 s1176 -6960 500 1554 s1236 -7860 500 1614 s1296 -8760 500 1674 s1356 -9660 500 1495 s1177 -6975 613 1555 s1237 -7875 613 1615 s1297 -8775 613 1675 s1357 -9675 613 1496 s1178 -6990 500 1556 s1238 -7890 500 1616 s1298 -8790 500 1676 s1358 -9690 500 1497 s1179 -7005 613 1557 s1239 -7905 613 1617 s1299 -8805 613 1677 s1359 -9705 613 1498 s1180 -7020 500 1558 s1240 -7920 500 1618 s1300 -8820 500 1678 s1360 -9720 500 1499 s1181 -7035 613 1559 s1241 -7935 613 1619 s1301 -8835 613 1679 s1361 -9735 613 1500 s1182 -7050 500 1560 s1242 -7950 500 1620 s1302 -8850 500 1680 s1362 -9750 500 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.26- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 no. name x y no. name x y alignment mark x y 1681 s1363 -9765 613 1741 s1423 -10665 613 a1 -11060 600 1682 s1364 -9780 500 1742 s1424 -10680 500 a2 11060 600 1683 s1365 -9795 613 1743 s1425 -10695 613 1684 s1366 -9810 500 1744 s1426 -10710 500 1685 s1367 -9825 613 1745 s1427 -10725 613 1686 s1368 -9840 500 1746 s1428 -10740 500 1687 s1369 -9855 613 1747 s1429 -10755 613 1688 s1370 -9870 500 1748 s1430 -10770 500 1689 s1371 -9885 613 1749 s1431 -10785 613 1690 s1372 -9900 500 1750 s1432 -10800 500 1691 s1373 -9915 613 1751 s1433 -10815 613 1692 s1374 -9930 500 1752 s1434 -10830 500 1693 s1375 -9945 613 1753 s1435 -10845 613 1694 s1376 -9960 500 1754 s1436 -10860 500 1695 s1377 -9975 613 1755 s1437 -10875 613 1696 s1378 -9990 500 1756 s1438 -10890 500 1697 s1379 -10005 613 1757 s1439 -10905 613 1698 s1380 -10020 500 1758 s1440 -10920 500 1699 s1381 -10035 613 1759 s1441 (for zig-zag) -10935 613 1700 s1382 -10050 500 1760 dummy17 -10950 500 1701 s1383 -10065 613 1702 s1384 -10080 500 1703 s1385 -10095 613 1704 s1386 -10110 500 1705 s1387 -10125 613 1706 s1388 -10140 500 1707 s1389 -10155 613 1708 s1390 -10170 500 1709 s1391 -10185 613 1710 s1392 -10200 500 1711 s1393 -10215 613 1712 s1394 -10230 500 1713 s1395 -10245 613 1714 s1396 -10260 500 1715 s1397 -10275 613 1716 s1398 -10290 500 1717 s1399 -10305 613 1718 s1400 -10320 500 1719 s1401 -10335 613 1720 s1402 -10350 500 1721 s1403 -10365 613 1722 s1404 -10380 500 1723 s1405 -10395 613 1724 s1406 -10410 500 1725 s1407 -10425 613 1726 s1408 -10440 500 1727 s1409 -10455 613 1728 s1410 -10470 500 1729 s1411 -10485 613 1730 s1412 -10500 500 1731 s1413 -10515 613 1732 s1414 -10530 500 1733 s1415 -10545 613 1734 s1416 -10560 500 1735 s1417 -10575 613 1736 s1418 -10590 500 1737 s1419 -10605 613 1738 s1420 -10620 500 1739 s1421 -10635 613 1740 s1422 -10650 500 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.27- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 3.4.1 bump arrangement 95 95 18 15 15 15 15 15 113 bump area = 1425 um 2 80 50 70 bump area = 4000 um 2 i/o pins ( no. 1-312) i/o pins ( no. 313-1760 ) 208 15 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.28- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.29- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4. interface 4.1 system interface the HX8369-A supports mddi (mobile display digital interface) and mipi interfaces: dbi (display bus interface), dpi (display pixel interface), dsi (display serial interface). where dbi supports (16-/9-/8-bit interface) parallel interface (type a, type b) and serial interface (type c). the interface mode can be selected by bs3-0 pins setting as show in table 4.1. bs3 bs2 bs1 bs0 interface display data display mode 0 0 0 0 dbi type-a 8-bit (clk-e) gram type 1 0 0 0 1 dbi type-a 9-bit (clk-e) gram type 1 0 0 1 0 dbi type-a 16-bit (clk-e) gram type 1 0 0 1 1 dbi type-a 18-bit (clk-e) gram type 1 0 1 0 0 dbi type-b 8-bit gram type 1 0 1 0 1 dbi type-b 9-bit gram type 1 0 1 1 0 dbi type-b 16-bit gram type 1 0 1 1 1 dbi type-b 18-bit gram type 1 1 0 0 0 dsi (command mode) gram type 1 1 0 0 1 mddi ( 3-wire serial + mddi interface) gram - 1 0 1 0 dbi type-b 24-bit gram type 1 1 1 0 0 dsi (video mode) dsi i/f type 3 1 1 0 1 dpi / dbi type-c option 1 dpi / gram type 3 1 1 1 0 dpi / dbi type-c option 2 dpi / gram type 3 1 1 1 1 dpi / dbi type-c option 3 dpi / gram type 3 table 4.1: interface selection the HX8369-A includes an index register (ir), which is stored the index data of internal control register and gram. when dcx=l, the command via dbi interface write into register. when dcx=h, gram data via r2ch register can be written through data bus. when the data is written into the gram from the mpu, it is first written into the write-data latch and then automatically written into the gram by internal operation. data is read through the read-data latch when reading from the gram. when data is read from the gram to the mpu, it is first read from gram to the read-data latch and then data is read to mpu through the read-data latch in next read operation. therefore, the read data in data bus in first read operation is invalid, and the read data in data bus in second and the following read operation is valid. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.30- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 interface rdx_e wrx_dcx dcx_scl d23Cd0 or other input pin dbi type c 3-wire serial interface + dpi interface unused unused scl db23Cdb0: 18-bit data bus sdi/sdo dbi type a 8-bit parallel e rw dcx db23Cdb8: unused, db7Cdb0: 8-bit data bus dbi type a 9-bit parallel e rw dcx db23Cdb9: unused, db8Cdb0: 9-bit data bus dbi type a 16-bit parallel e rw dcx db23Cdb16: unused, db15Cdb0: 16-bit data bus dbi type a 18-bit parallel e rw dcx db23Cdb18: unused, db17Cdb0: 18-bit data bus dbi type c 4-wire serial interface + dpi interface unused dcx scl db23Cdb0: 18-bit data bus sdi/sdo dbi type b 8-bit parallel rdx wrx dcx db23Cdb8: unused, d7Cd0: 8-bit data bus dbi type b 9-bit parallel rdx wrx dcx db23Cdb9: unused, db8Cdb0: 9-bit data bus dbi type b 16-bit parallel rdx wrx dcx db23Cdb16: unused, db15Cdb0: 16-bit data bus dbi type b 18-bit parallel rdx wrx dcx db23Cdb18: unused, db17Cdb0: 18-bit data bus dbi type b 24-bit parallel rdx wrx dcx db23Cdb0: 24-bit data bus display serial interface unused unused unused dsi_clkp, dsi_clkn, dsi_d0p, dsi_d0n, mddi (mobile display digital interface) unused unused unused mddi_stbp, mddi_stbn, mddi_datap, mddi_datan, table 4.2: pin connection based on different interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.31- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1 mipi dbi-a / dbi-b interface the selection of dbi interface is by bs3 pin. when this pin is low state (vssd), the interface is use dbi system. and use bs2 to bs0 pins to selsect dbi interfacr mode. the parallel interface timing diagram is described in figure 4.1 to figure 4.4. figure 4.1: dbi-a system interface protocol, write to register or gram figure 4.2: dbi-a system interface protocol, read from register or gram for truly only http://www..net/ datasheet pdf - http://www..net/
-p.32- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.3: dbi-b system interface protocol, write to register or gram figure 4.4: dbi-b system interface protocol, read from register or gram for truly only http://www..net/ datasheet pdf - http://www..net/
-p.33- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1.1 24-bit parallel bus system interface the dbi-b system 24-bit bus parallel data transfer can be used by setting bs3-0 pins to 1010. the figure 4.5 is the example of interface with 18-bit dbi-a / dbi-b microcomputer system interface. figure 4.5 example of dbi-b system 18-bit parallel bus interface there are one type data format to write display data at 24-bit bus interface. see figure 4.6. figure 4.6: write data for rgb 8-8-8 (16.7m colours) bit input in 24-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.34- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1.2 18-bit parallel bus system interface the dbi-a system 18-bit bus parallel data transfer can be used by setting bs3-0 pins to 0011. and the dbi-b system 18-bit bus parallel data transfer can be used by setting bs3-0pins to 0111. the figure 4.7 is the example of interface with 18-bit dbi-a / dbi-b microcomputer system interface. figure 4.7: example of dbi-a- / dbi-b system 18-bit parallel bus interface there are three types data format to write display data at 18-bit bus interface. see figure 4.8 to figure 4.10. under this type, the data format can select as 16- / 18- / 24-bit by register r3ah. (set_pixel_format) 65k color data memwr 1st write 2nd write dcx 0 1 1 d17 x x d16 x x d15 d14 d13 d12 d11 r13 r23 d10 r12 r22 d9 r11 r21 d8 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) 16-bit 16-bit r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 look-up table for 65k color data mapping (16-bit to 24-bit) figure 4.8: write data for rgb 5-6-5 (65k colours) bit input in 18-bit parallel interface 262k color data memwr 1st write 2nd write dcx 0 1 1 d17 d16 d15 d14 d13 d12 d11 r13 r23 d10 r12 r22 d9 r11 r21 d8 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) 18-bit 18-bit r14 b14 g15 g14 r24 g25 g24 b24 r15 r25 b15 b25 r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram look-up table for 262k color data mapping (18-bit to 24-bit) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.35- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.9: write data for rgb 6-6-6(262k colours) bit input in 18-bit parallel interface 16.7m color data memwr 1st write 2nd write dcx 0 1 1 d17 x d16 x d15 d14 d13 d12 d11 r1 3 r23 d10 r1 2 r22 d9 r1 1 r21 d8 r1 0 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g2 0 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r1 4 b14 g15 g14 r24 g2 5 g2 4 b24 r1 5 r25 b15 b25 r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r1 6 r17 g17 g16 g2 7 g2 6 3rd write 1 b16 b17 x x x x r26 r27 b26 b27 x 16.7m color data memwr 1st write 2nd write dcx 0 1 1 d17 x d16 x d15 d14 d13 d12 d11 r13 r23 d10 r12 r22 d9 r11 r21 d8 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g2 3 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r14 b14 g15 g14 r24 g2 5 g2 4 b24 r15 r25 b15 b25 r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r16 r17 g17 g16 g2 7 g2 6 3rd write 1 b16 b17 x x x x r26 r27 b26 b27 - memwr 0 gram write command code - - 0 the other command - r2 3 r2 2 r2 1 r2 0 r2 4 r2 5 r2 6 r2 7 1st write 2nd write 1 1 x x x x r32 r3 1 r3 0 g32 g30 b30 b31 3rd pixel (r3/g3/b3) r3 3 b33 b32 g33 g31 r27 ~ r20 will be neglected and are not used r3 6 r3 5 r3 4 r3 7 g36 g34 g37 g35 b34 b35 b37 b36 - figure 4.10: write data for rgb 8-8-8 (16.7m colours) bit input in 18-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.36- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1.3 16-bit parallel bus system interface the dbi-a system 16-bit bus parallel data transfer can be used by setting bs3-0 pins to 0010. and the dbi-b system 16-bit bus parallel data transfer can be used by setting bs3-0 pins to 0110. the figure 4.11 is the example of interface with 16-bit dbi-a / dbi-b microcomputer system interface. figure 4.11: example of dbi-a- / dbi-b system 16-bit bus interface there are three types data format to write display data at 16-bit bus interface. see figure 4.12 to figure 4. 14. under this type, the data format can select as 16- / 18- / 24-bit by register r3ah. (set_pixel_format) 65k color data memwr 1st write 2nd write dcx 0 1 1 d15 d14 d13 d12 d11 r13 r23 d10 r12 r22 d9 r11 r21 d8 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) 16-bit 16-bit r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 look-up table for 65k color data mapping (16-bit to 24-bit) figure 4.12: write data for rgb 5-6-5 (65k colours) bit input in 16-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.37- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.13: write data for rgb 6-6-6 (262k colours) bit input in 16-bit parallel interface figure 4.14: write data for rgb 8-8-8-bit (16.7m colours) input in 16-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.38- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1.4 9-bit parallel bus system interface the dbi-a system 9-bit bus parallel data transfer can be used by setting bs3-0 pins to 0001. and the dbi-b system 9-bit bus parallel data transfer can be used by setting bs3-0 pins to 0101. the figure 4.15 is the example of interface with 9-bit dbi-a / dbi-b microcomputer system interface. figure 4.15: example of dbi-a- / dbi-b- system 9-bit bus interface there are three types data format to write display data at 9-bit bus interface. see figure 4.16 to figure 4. 18. under this type, the data format can select as 16-/18-/ 24-bit by register r3ah. (set_pixel_format) 65k color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) 16-bit 16-bit look-up table for 65k color data mapping ( 16-bit to 24-bit ) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 - - 3rd write 4th write 1 1 d8 x x x x figure 4.16: write data for rgb 5-6-5(65k colours) bit input in 9-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.39- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 262k color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r14 b14 g15 g14 r24 g25 g24 b24 - 3rd write 4th write 1 1 - - r15 b15 r25 b25 18-bit 18-bit look-up table for 262k color data mapping ( 18-bit to 24-bit ) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram d8 figure 4.17: write data for rgb 6-6-6-bit (262k colours) input in 9-bit parallel interface 16.7m color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 - - 3rd write 4th write 1 1 - - r15 b15 r25 b25 5th write 6th write 1 1 r16 b16 g17 g16 r26 g27 g26 b26 r17 b17 r27 b27 x x x x x x d8 figure 4.18: write data for rgb 8-8-8-bit (16.7 m colours) input in 9-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.40- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.1.1.5 8-bit parallel bus system interface the dbi-a system 8-bit bus parallel data transfer can be used by setting bs3-0 pins to 0000. and the dbi-b system 8-bit bus parallel data transfer can be used by setting bs3-0 pins to 0100. the figure 4.19 is the example of interface with 8-bit dbi-a / dbi-b microcomputer system interface. figure 4.19: example of dbi-a- / dbi-b-system 8-bit bus interface there are three types data format to write display data at 8-bit bus interface. see figure 4. 20 to figure 4. 22. under this type, the data format can select as 16-/18-/ 24-bit by register r3ah. (set_pixel_format) 65k color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) 16-bit 16-bit look-up table for 65k color data mapping ( 16-bit to 24-bit ) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 - - 3rd write 4th write 1 1 figure 4.20: write data for rgb 5-6-5 (65k colours) bit input in 8-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.41- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 262k color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r14 b14 g15 g14 r24 g25 g24 b24 - - 3rd write 4th write 1 1 - - x x x x x x x x x x x x r15 b15 r25 b25 5th write 6th write 1 1 18-bit 18-bit look-up table for 262k color data mapping ( 18-bit to 24-bit ) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram figure 4.21: write data for rgb 6-6-6-bit (262k colours) input in 8-bit parallel interface 16.7m color data memwr 1st write 2nd write dcx 0 1 1 r13 r23 r12 r22 r11 r21 r10 r20 d7 gram write command code g13 d6 d5 d4 d3 d2 d1 d0 b13 b12 g12 g11 g10 b10 b11 g23 b23 b22 g22 g21 g20 b20 b21 gram write - 1st pixel (r1/g1/b1) 2nd pixel (r2/g2/b2) r1 g1 b1 r2 g2 b2 r3 g3 b3 24-bit 24-bit gram r14 b14 g15 g14 r24 g25 g24 b24 - - 3rd write 4th write 1 1 - - r15 b15 r25 b25 5th write 6th write 1 1 r16 b16 g17 g16 r26 g27 g26 b26 r17 b17 r27 b27 figure 4.22: write data for rgb 8-8-8-bit (16.7 m colours) input in 8-bit parallel interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.42- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2 serial data transfer interface (mipi dbi-c) t he HX8369-A supports three type serial data transfer interface, the interface selection by setting bs3-0 pins. the bs3-0 set 1101 is select 3-wire option 1 serial bus. the bs3-0 set 1110 is select 3-wire option 2 serial bus. the bs3-0 is set 1111 when select 4-wire option 3 serial bus. the 3-wire serial bus is use: chip select line (csx), serial input/output data (sdi and sdo) and the serial transfer clock line (dcx_scl).the 4-wire serial bus is use: chip select line (csx), data/command select (wrx_dcx), serial input/output data (sdi and sdo) and the serial transfer clock line (dcx_scl). 4.2.1.1 serial data write mode the 3-pin serial data packet contains a control bit d/cx and a transmission byte and in 4-pin serial case, data packet contains just transmission byte and control signal d/cx is transferred by wrx_dcx pin. if dcx is low, the transmission byte is command byte. if d/cx is high, the transmission byte is stored in to command register or gram. the msb is transmitted first. the serial interface is initialized when csx is high. in this state, scl clock pulse or serial input/output data (sdi and sdo) have no effect. a falling edge on csx enables the serial interface and indicates the start of data transmission. where 3-wire serial write format include two types (8-/16-bit) is according command code. figure 4.23: serial data stream, write mode for truly only http://www..net/ datasheet pdf - http://www..net/
-p.43- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.24: dbi type c: serial interface protocol 3-wire/4-wire, write mode for truly only http://www..net/ datasheet pdf - http://www..net/
-p.44- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.1.2 serial data read mode the micro-controller first has to send a command and then the following byte is transmitted in the opposite direction. the 3-wire serial read data format which just needs 8-bit. figure 4.25: type c:serial interface protocol 3-wire/4-wire read mode for truly only http://www..net/ datasheet pdf - http://www..net/
-p.45- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 if there is a break on data transmission when transmit a command before a whole byte has been completed, then the display module will have reset the interface such that it will be ready to receive the same byte re-transmitted when the chip select line (csx) is next activated. see the following figure. figure 4.26: display module data transfer recovery for truly only http://www..net/ datasheet pdf - http://www..net/
-p.46- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.2 mipi dpi interface (display pixel interface) the HX8369-A uses 16 or 18-bit or 24-bit parallel rgb interface which includes: hs, vsync, de, pclk, db23~db0. the interface is active after power on sequence. pixel clock (pclk) is running all the time without stopping and it is used to entering hsync, vsync, de and db23~db0C lines states when there is a rising edge of the pclk. the pclk cannot be used as continue internal clock for other functions of the display module e.g. sleep inC mode etc. vertical synchronization (vsync) is used to tell when there is received a new frame of the display. this is negative (-, 0, low) active and its state is read to the display module by a rising edge of the pclk-line. horizontal synchronization (hsync) is used to tell when there is received a new line of the frame. this is negative (-, 0, low) active and its state is read to the display module by a rising edge of the pclk- line. data enable (de) is used to tell when there is received rgb information that should be transferred on the display. this is positive (+, 1, high) active and its state is read to the display module by a rising edge of the pclk-line. db23~db0 (24 bit: r7-r0, g7-g0 and b7-b0; 18 bit: r5- r0, g5-g0 and b5-b0; 16 bit: r4- r0, g5-g0 and b4-b0) are used to tell what is the information of the image that is transferred on the display (when de=1 and there is a rising edge of pclk). db23~db0C lines can be set to 0 (low) or 1 (high). these lines are read by a rising edge of the pclk-line. the pixel clock cycle is described in the following figure. note: pclk is an unsynchronized signal (it can be stopped). figure 4.27: pclk cycle for truly only http://www..net/ datasheet pdf - http://www..net/
-p.47- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.2.1 general timing diagram hsync hbp hp verticalsync. vbp vsync 0 1 0 1 vadr vfp horizontalsync. hadr hfp (vadr+hadr)Cperiod whenvaliddisplaydataare transferredfromhostto displaymodule de=1(high) displayarea invisbleimage = timinginformationwhatisnotpossibletoseeonthedisplay =blankingtime de=0(low) figure 4.28: general timing diagram figure 4.29: dpi (480rgb x 864) timing diagram the image information must be correct on the display, when the timings are in range on the interface. however, the image information can be incorrect on the display, when timings are out of the range on the interface (out of the range timings cannot cause any damage on the display module or it cannot cause any damage on the host side). the correct image information must be displayed automatically (by the display module) on the next frame (vertical sync.), when there is returned from out of the range to in range interface timings. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.48- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 the mipi dpi interface includes two types which are 16-/18-/24-bit data format by register 3ah (set_pixel_format) to select. dpi interface displaying moving pictures can be selected to rewrite into the gram or not through gram. the selection is set by register dm[1:0] and rm. rm the bit is used to select an interface for the frame memory access operation. the frame memory is accessed only via the interface defined by rm bit. because the interface can be selected separately from display operation mode, writing data to the frame memory is possible via system interface when rm = 0, even in the dpi display operation. rm setting is enabled from the next frame. wait 1 frame to transfer data after setting. rm interface for ram access 0 dbi interface (cpu) 1 dpi interface (rgb) dm[1:0] the bit is used to select display operation mode. the setting allows switching between display operation in synchronization with internal oscillation clock, vsync, or dpi signal. note that switching between vsync and dpi operation is prohibited. dm 1 dm 0 display mode 0 0 internal oscillation clock 0 1 dpi signal 1 0 vsync signal only 1 1 rgb data bypass gram mode operation mode frame memory access setting (rm) display operation mode (dm[1:0]) internal clock operation (displaying still pictures) mpu interface (rm=0) internal clock operation (dm[1:0]=00) rgb interface : capture mode 1 (displaying moving pictures) rgb interface (rm=1) rgb interface : vs & hs (dm[1:0]=01) rgb interface : capture mode 2 (rewriting still pictures while displaying moving pictures) mpu interface (rm=0) rgb interface : vs & hs (dm[1:0]=01) rgb interface : through mode (displaying moving pictures) bypass frame memory rgb interface : vs & hs (dm[1:0]=11) internal clock operation rgb data format rgb interface (rm=1) internal clock operation (dm[1:0]=00) note: rgb interface capture mode is only for 24-bit / pixel color order. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.49- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 4.2.2.2 16-bit / pixel color order on the dpi i/f note: the data order is shown as follows, msb=db23, lsb=db0 and picture data is msb=bit5, lsb=bit0 for green data and msb=bit4, lsb=bit0 for red and blue data. db23, db22, db16, db15, db14, db7, db6 and db0 are set to high or low. figure 4.30: 16-bit / pixel 65k colours order on the dpi i/f for truly only http://www..net/ datasheet pdf - http://www..net/
-p.50- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.2.3 18 - - - - bit / pixel color order on the dpi i/f note: the data order is shown as follows, msb = db23, lsb = db0 and picture data is msb = bit5, lsb = bit0 for red, green and blue data. db23, db22, db15, db14, db7 and db6 are set to high or low. figure 4.31: 18-bit / pixel: 262k colours order on the dpi i/f for truly only http://www..net/ datasheet pdf - http://www..net/
-p.51- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.2.4 24 - - - - bit / pixel color order on the rgb i/f note: the data order is shown as follows, msb = db23, lsb = db0 and picture data is msb = bit7, lsb = bit0 for red, green and blue data. figure 4.32: 24-bit / pixel color order on the rgb i/f for truly only http://www..net/ datasheet pdf - http://www..net/
-p.52- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.3 dsi system interface the selection of interface is by bs(3-0) =1000 or 1100, the dsi specifies the interface between a host processor and a peripheral such as a display module. figure 4.33 shows a simplified dsi interface. from a conceptual viewpoint, a dsi-compliant interface also sends pixels or commands to the peripheral, and can read back status or pixel information from the peripheral. the main difference is that dsi serializes all pixel data, commands, and events that. dsi-compliant peripherals support command mode. which mode is used depends on the architecture and capabilities of the peripheral. the mode definitions reflect the primary intended use of dsi for display. command mode refers to operation in which transactions primarily take the form of sending commands and data to a peripheral, such as a display module, that incorporates a display controller. the display controller may include local registers and a frame buffer. systems using command mode write to, and read from, the registers and frame buffer memory. the host processor indirectly controls activity at the peripheral by sending commands, parameters and data to the display controller. the host processor can also read display module status information or the contents of the frame memory. command mode operation requires a bidirectional interface. figure 4.33: dsi transmitter and receiver interface please refer to draft mipi alliance standard for dsi for dsi detailed specifications. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.53- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.3.1 dsi layer definitions according figure 4.34 dsi transmitter and receiver interface to understand simple interface block diagram. then under diagram is internal block for dsi which include four types: phy layer, lane management layer, low level protocol and application layer. the phy layer specifies the characteristics of transmission medium and electrical parameters for signaling the timing relationship between clock and data lanes. the lane management layer specifies dsi is lane-scalable for increased performance. the data signals maybe transmission through one or more channel depending on the bandwidth requirements of the application. the protocol layer specifies at the lowest level, dsi protocol specifies the sequence and value of bits and bytes traversing the interface. it specifies how bytes are organized into defined groups called packets. the application layer describes higher-level encoding and interpretation of data contained in the data stream. the dsi specification describes the mapping of pixel values, commands and commands parameters to bytes in the packet assembly. figure 4.34: dsi transmitter and receiver interface for truly only http://www..net/ datasheet pdf - http://www..net/
-p.54- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.3.2 dsi protocol the protocol layer appends packet-protocol information and headers. the receiver side of a dsi link performs the converse of the transmitter side, decomposing the packet into parallel data, signal events and commands. the dsi protocol permits multiple packets which is useful for events such as peripheral initialization, where many registers may be loaded separate write commands at system startup. figure 4.35 illustrates multiple hs transmission packets. lps low power state s ot start of transmission s p short packet l p long packet e ot end of transmission figure 4.35: multiple hs transmission packets the packet includes two types which are long packet and short packet. the first byte of the packet, the data identifier (di), includes information specifying the length of the packet. command mode systems send commands and an associated set of parameters, with the number of parameters depending on the command type. short packets specify the payload length using the data type field and are from two to nine bytes in length. short packet is used for most command mode commands and associated parameters. where short packets format include an 8-bit data id followed by zero to seven bytes and an 8-bit ecc. figure 4.36 shows the structure of the short packet. di(data id) contain virtual channel identifier and data type. e cc(error correction code) the error correction code allows single-bit errors t o be corrected and 2-bit errors to be detected in the packet header. figure 4.36: structure of the short packet for truly only http://www..net/ datasheet pdf - http://www..net/
-p.55- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 long packets specify the payload length using a two-byte word count field and then the payload maybe from 0 to 65,541 bytes in length. long packets permit transmission of large blocks of pixel or other data.. figure 4.37 shows the structure of the long packet. long packet header composed of three elements: an 8-bit data identifier, a 16-bit word count, and 8-bit ecc. the packet footer has one element, a 16-bit checksum. long packets can be from 6 to 65,541 bytes in length. where 65,541 bytes = (2 16 -1) + 4 bytes ph + 2 bytes pf di (data id) contain virtual channel identifier and data type. w c (word count) the receiver use wc to define packet end. e cc (error correction code) the error correction code allows single-bit errors t o be corrected and 2-bit errors to be detected in the packet header. pf(packet footer) mean 16-bit checksum. figure 4.37: structure of the long packet according to packet form, basic elements include di and ecc. figure 4.38 the shows format of data id. di7 di6 di5 di4 di3 di2 di1 di0 vc (virtual channel) dt (data type) di[7:6] these two bits identify the data as directed to one of four virtual channels. di[5:0]: these six bits specify the data type, which specifies the size, format and, in some cases, the interpretation of the packet contents. figure 4.38: the format of data id. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.56- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 due to data type (dt) mean format of transmission type, figure 4.39 show short- / long-packet transmission command sequence. long packet write command / parameters / pixel datas short packet write command / parameters figure 4.39: show short- / long-packet transmission command sequence for truly only http://www..net/ datasheet pdf - http://www..net/
-p.57- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.3.3 processor to peripheral direction packets data types the set of transaction types sent from the host processor to a peripheral, such as a display module, are shown in table 4.3 data types for processor-sourced packets. data type, hex data type, binary description packet size 01h 00 0001 sync event, v sync start short 11h 01 0001 sync event, v sync end short 21h 10 0001 sync event, h sync start short 31h 11 0001 sync event, h sync end short 22h 10 0010 shut down peripheral command short 32h 11 0010 turn on peripheral command short 05h 000101 dcs write, no parameter short 15h 010101 dcs write, 1 parameter short 06h 00 0110 dcs read, no parameters short 37h 11 0111 set maximum return packet size short 09h 00 1001 null packet, no data long 19h 01 1001 blanking packet, no data long 39h 11 1001 dcs long write/write_lut command packet long 0eh 00 1110 packed pixel stream, 16-bit rgb, 5-6-5 format long 1eh 01 1110 packed pixel stream, 18-bit rgb, 6-6-6 format long 2eh 10 1110 loosely packed pixel stream, 18-bit rgb, 6-6-6 format long 3eh 11 1110 packed pixel stream, 24-bit rgb, 8-8-8 format (this project is not use) long x0h and xfh, unspecified xx 0000 xx 1111 do not use all unspecified codes are reserved - table 4.3: data types for processor-sourced packets for truly only http://www..net/ datasheet pdf - http://www..net/
-p.58- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 under tables list all detail function of all data types sync event (h start, h end, v start, v end), data type=xx 0001 (x1h) data type, hex function description number of bytes 01h v sync start, start of vsa pulse. 11h v sync end, end of vsa pulse. 21h h sync start, start of hsa pulse. 31h h sync end, end of hsa pulse. 4 bytes (di+data0+data1+ecc) note: v sync start and v sync end event represents the start and end of the vsa, respectively. similarly h sync start and h sync end event represents the start and end of the hsa, respectively. display status (shutdown command, turn-on command ) data type, hex function description number of bytes 22h shutdown peripheral command that turns off the display in a video mode display for power saving. 32h turn on peripheral command that turns on the display in video mode display for normal display. 4 bytes (di+data0+data1+ecc) note : when use shutdown command, interface shall remain powered in order to receive the turn-on, or wake-up, command. color mode status (color mode on, color mode off) data type, hex function description number of bytes 05h and 15h dcs short write command, 0 or 1 parameter, data types = 00 0101(05h), 01 0101 (15h), respectively. 4 bytes (di+data0+data1+ecc) note: (1) for write part, if dcs short write command, followed by bta, the peripheral shall respond with ack when without error was detected in the transmission (host slave). unless an error was detected, the peripheral shall respond with acknowledge with error report . for example: 05h dcs write for no parameter command set. for example: 15h dcs write for only one parameter command set. dcs command setting data type, hex function description number of bytes 06h dcs read command, the returned data may be of short or long packet format. 4 bytes (di+data0+data1+ecc) 39h dcs long write/ write _ lut command is used to send larger blocks of data to a display module that implements the display command set. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: (1) when use dcs read command, the set max return packet size command will limit the size of returning packets. (2) the peripheral shall respond to dcs read command request in one of the following ways: if an error was detected by the peripheral, it shall send acknowledge with error report . so the peripheral shall transmit the requested read data packet with suitable ecc in the same transmission. if no error was detected by the peripheral, it shall send the requested read packet (short or long) with appropriate ecc and checksum, if either or both features are enabled. (3) one byte <= length of payload data <= 2 wc -1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.59- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 return packet size setting data type, hex function description number of bytes 37h set maximum return packet size that specifies the maximum size of the payload in a long packet transmitted from peripheral back to the host processor. 4 bytes (di + wc + ecc) note: the two-byte value is transmitted with ls byte first. and during a power-on or reset sequence, the maximum return packet size shall be set by the peripheral to a default value of one. variable data packet data type, hex function description number of bytes 09h null packet is a mechanism for keeping the serial data lane(s) in high-speed mode while sending dummy data. 19h blanking packet is used to convey blanking timing information in a long packet. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: (1) when null packet , the payload data belong null data, actual data values sent are irrelevant because the peripheral does not capture or store the data. (2) when blanking packet , the packet represents a period between active scan lines of a video mode display, data stream format data type, hex function description number of bytes 0eh packed pixel stream 16-bit format is used to transmit image data formatted as 16-bit pixels to a video mode display module. pixel format is (5 bits) red, (6 bits) green and (5 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last . word count ecc data type virtual channel 5b 6b 5b 5b 6b 5b checksum 1 byte 2 bytes 1 byte 1 byte 1 byte 1 byte 1 byte 2 bytes ph (packet header) variable payload data pf (packet footer) pixel 1 pixel n 5b 6b 5b pixel 1 r0 r4 g0 g5 b0 b4 d0 d7d0 d7 1 byte 1 byte for truly only http://www..net/ datasheet pdf - http://www..net/
-p.60- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 data stream format data type, hex function description number of bytes 1eh packed pixel stream 18-bit format is used to transmit image data formatted as 18-bit pixels to a video mode display module. pixel format is (6 bits) red, (6 bits) green and (6 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first and the msb last and pixel boundaries only line up with byte boundaries every four pixels (nine bytes). preferably, display modules employing this format have a horizontal extent (width in pixels) evenly divisible by four, so no partial bytes remain at the end of the display line data. it is possible to send pixel data that represent a line width that is not a multiple of four pixels, but display logic on the receiver end shall dispose of the extra bits of the partial byte at the end of active display and ensure a clean start for the next line. word count ecc data type virtual channel 6b 6b 6b 6b 6b 6b 1 byte 2 bytes 1 byte 1 byte 1 byte ph (packet header) variable payload data (first 4 pixels packed at 9 bytes) pixel 1 pixel 4 6b 6b 6b pixel 1 r0 r5 g0 g5 b0 b5 d0 d7 d0 d7 1 byte 1 byte 6b 6b 6b pixel 2 6b 6b 6b pixel 3 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte checksum 2 bytes pf (packet footer) 6b 6b 6b 6b 6b 6b 1 byte 1 byte variable payload data (first 4 pixels packed at 9 bytes) pixel n-3 6b 6b 6b 6b 6b 6b 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte pixel n-2 pixel n-1 pixel n for truly only http://www..net/ datasheet pdf - http://www..net/
-p.61- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 data stream format data type, hex function description number of bytes 2eh packed pixel stream 18-bit format, each r, g, or b color component is one byte form, but the valid pixel bits occupy bits [7:2] and bits [1:0] of are ignored. pixel format is (6 bits) red, (6 bits) green and (6 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last and with this format, pixel boundaries line up with byte boundaries every three bytes. word count ecc data type virtual channel 6b 6b 6b 1 byte 2 bytes 1 byte ph (packet header) variable payload data pf (packet footer) pixel 1 checksum 2 bytes 6b 6b 6b pixel n 1 byte 1 byte 1 byte pixel 1 r0 r5 g0 g5 b0 b5 d0 6b 6b 6b 1 byte 1 byte 1 byte d7 d0 d7 d0 d7 1 byte 1 byte 1 byte for truly only http://www..net/ datasheet pdf - http://www..net/
-p.62- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 packed pixel stream, 24-bit format data type, hex function description number of bytes 3eh packed pixel stream 24-bit format is used to transmit image data formatted as 24-bit pixels to a video mode display module. pixel format is (8 bits) red, (8 bits) green and (8 bits) blue. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: within a color component, the lsb is sent first, the msb last and with this format, pixel boundaries line up with byte boundaries every three bytes. word count ecc data type virtual channel 8b 8b 8b 1 byte 2 bytes 1 byte ph (packet header) variable payload data pf (packet footer) pixel 1 checksum 2 bytes 8b 8b 8b pixel n 1 byte 1 byte 1 byte pixel 1 r0 r7g0 g7 b0 b7 d0 8b 8b 8b 1 byte 1 byte 1 byte d7d0 d7d0 d7 1 byte 1 byte 1 byte for truly only http://www..net/ datasheet pdf - http://www..net/
-p.63- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.3.4 peripheral to processor (reverse direction) all command mode systems require bidirectional capability for returning read data, ack or error information to the host processor. command mode that use dcs shall have a bidirectional data path. short packets and the header of long packets may use ecc and checksum to provide a higher level of data integrity. the checksum feature enables detection of errors in the payload of long packets. the packet structure for peripheral-to-processor transactions is the same as for the processor-to-peripheral direction. peripheral-to-processor transactions are of four basic types: a. tearing effect is a trigger message sent to convey display timing information to the host processor. trigger messages ate signal byte packets sent by a peripherals phy layer in response to a signal form the dsi protocol layer. b. acknowledge is a trigger message sent when the current transmission, as well as all preceding transmissions since the last peripheral to host communication. c. acknowledge and error report is a short packet sent if any errors were detected in preceding transmission from the host processor. once reported, accumulated errors in the error register are cleared. d. response to read request may be short or long packet that returns data requested by the preceding read command from the processor. in general, if the host processor completes a transmission to the peripheral with bta asserted, the peripheral shall respond with one or more appropriate packet(s), and then return bus ownership to the host processor. if bta is not asserted following a transmission from the host processor, the peripheral shall not communicate an acknowledge or other error information back to the host processor. the processor-to-peripheral transactions with bta asserted, can contain under form. a. following a non-read command in which no error was detected, the peripheral shall respond with acknowledge. b. following a read request in which no error was detected, the peripheral shall send the requested read data. c. following a read request in which the ecc error was detected and corrected, the peripheral shall send the requested read data in a long or short packet, followed by a 4-byte (acknowledge with error report ) packet in the same lp transmission. the error report shall have the ecc error flag set. d. following a non-read command in which the ecc error was detected and corrected, the peripheral shall proceed to execute the command, and shall respond to bta by sending a 4-byte (acknowledge with error report ) packet, the error report shall have the ecc error flag set. e. following any command in which sot error, sot sync error, eot sync error, lp transmit sync error, checksum error or dsi vc id invalid was detected, or the dsi command was not recognized, the peripheral shall send a 4-byte acknowledge with error report response, with the appropriate error flags set in the two-byte error field. only the ack/error report packet shall be transmitted; no read or write accesses shall take place on the peripheral in response. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.64- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 which, a. acknowledge includes 2 bytes which are di (vc + acknowledge data type) and ecc. b. acknowledge with error report include 4 bytes which are di, 2 bytes error report and ecc. c. response to read request contains 2 types which are short packet and long packet. an error report is comprised of two bytes following the di byte, with an ecc byte following the error report bytes. table 4.4 shows the error report bit definitions. and table 4.5 list complete set of peripheral-to-processor data types. bit description 0 sot error 1 sot sync error 2 reserved 3 escape mode entry command error 4 low-power transmit sync error 5 lp-tx timeout error 6 reserved 7 reserved 8 ecc error, single-bit (detected and corrected) 9 ecc error, multi-bit (detected, not corrected) 10 checksum error (long packet only) 11 dsi data type not recognized 12 dsi vc id invalid 13 reserved 14 reserved 15 reserved table 4.4: shows the error report bit definitions. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.65- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 data type, hex data type, binary description packet size 02h 00 0010 acknowledge with error report short 1ch 01 1100 dcs long read response long others (00h 3fh) reserved - table 4.5: the complete set of peripheral-to-processor data types. acknowledge types data type, hex function description number of bytes 02 get acknowledge with error report when error occurs from processor transmission. 4 bytes note: when processor transmits complete payload, following signal by bta, peripheral must respond to processor. with error acknowledge with error report, without error acknowledge. dcs read types data type, hex function description number of bytes 1ch this is the long-packet response to dcs long read request. up to 65541 bytes ( di + wc + ecc + dcs cmd. + payload data + pf ) note: if the peripheral is checksum capable, is shall return a calculated two-byte checksum appended to the n-byte payload data. if the peripheral does not support checksum, it shall return 0000h. if the dcs command itself is possibly corrupt, due to an uncorrectable ecc error, sot or sot sync error, the requested read data packet shall not be sent after the acknowledge with error report packet be sent. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.66- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.4 mddi interface (mobile display digital interface) 4.2.4.1 introduction of mddi the HX8369-A support mddi, which is a differential serial interface with high-speed low voltage swing characteristics. both command and display image data can be transferred by mddi. the devices connected by data and stb link are host and client part. host transfer data to client in forward direction, client transfer data to host in reverse direction. the data line is dual direction, both command and image data are all send through the data line. the stb line send strobe signal from host to client. data transferred in mddi link are encoded as packet type. figure 4.40: physical connection of mddi host and client for truly only http://www..net/ datasheet pdf - http://www..net/
-p.67- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.5 terminology the devices connected by the mddi link are called the host and client. data going from the host to the client travels in the forward direction, and data from the client to the host travels in the reverse direction. figure 4.41: mddi terminology figure 4.42: example of bi-directional mddi communication for truly only http://www..net/ datasheet pdf - http://www..net/
-p.68- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.6 order of data transmission all fields are transmitted with the lsb first and the msb transmitted last. parameters that are more than one byte in length are transmitted in little-endian format, i.e. the least significant byte first. the data fields of each packet are transmitted in the exact order that they are defined in the subsequent sections below, with the first field listed being transmitted first, and the last field described being transmitted last. mddi_data0 is always aligned with bit 0 of bytes transmitted on the interface in any mode: type 1, type 2, type 3, or type 4. figure 4.43: transmission bit ordering for each type 4.2.7 data-stb encoding data is encoded using a data-stb format. data is carried over a bi-directional differential cable, while stb is carried over a unidirectional differential cable driven only by the host. figure 4.44 illustrates how the data sequence 1110001011 is transmitted by using data-stb encoding. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.69- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 figure 4.44: data-stb encoding figure 4.45 shows a sample circuit to generate data and stb from input data, and then decodes the data and stb to the output data. figure 4.45: data / stb generation & recovery circuit for truly only http://www..net/ datasheet pdf - http://www..net/
-p.70- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.7.1 mddi data / stb the data (mdp/mdn) and stb (msp/msn) signals are always operated in a differential mode to maximize noise immunity. each differential pair is parallel-terminated with the characteristic impedance of the cable. all parallel-terminations are in the client device. figure below illustrates the configuration of the drivers, receivers, and terminations. the driver of each signal pair has a differential current output. while receiving mddi packets the mddi_data and mddi_stb pairs use a conventional differential receiver with a differential voltage threshold of zero volts. in the hibernation state the driver outputs are disabled and the parallel termination resistors pull the differential voltage on each signal pair to zero volts. during hibernation a special receiver on the mddi_data pairs has an offset input differential voltage threshold of positive 125 mv, which causes the hibernation line receiver to interpret the un-driven signal pair as logic-zero level. figure 4.46: differential connection between host and client for truly only http://www..net/ datasheet pdf - http://www..net/
-p.71- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.7.2 mddi packet data transmission over the mddi link is grouped into packets. several packets format is supported in HX8369-A. most packets are in forward direction, transferred from host to client; reverse encapsulation packet is in reverse direction, transferred from mddi client to host. a number of packets, started by sub-frame header packet, construct one sub frame. figure 4.47 mddi packet structure refer to mddi frame structure, sub-frame header packet is placed in front of a sub-frame, and some sub-frames make up a media-frame. the length of sub-frame has three mode fixed, flexible and unlimited. fixed sub-frame length means the total byte in a sub-frame will meet the value which defined in the sub-frame header packet in front of a sub-frame. in flexible sub-frame when a packet is requested to be transmitted, it will never be blocked. this may cause a packet to cross a sub-frame boundary. the host therefore must maintain the sub-frame timing within its core to keep track of sub-frames that havelengths greater than the target length, to then transmit a matched number and length of sub-frames that are for truly only http://www..net/ datasheet pdf - http://www..net/
-p.72- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 less than the target sub-frame length to ensure an average sub-frame length that matches the target length. hibernation to help the client sync up with the unique word pattern. the mddi host is allowed to transmit a sub-frame at any time if it wishes, however it is not required. HX8369-A support these packets, which described in the table below. packet function direction sub-frame header packet header of each sub frame forward register access packet register setting forward video stream packet video data transfer forward windowless video stream packet video data transfer forward flexible video stream packet video data transfer forward filler packet fill empty packet space forward reverse link encapsulation packet reverse data packet reverse round-trip delay measurement packet host->client->host delay check forward/reverse enhanced round-trip delay measurement packet host->client->host delay check forward/reverse client capability packet capability of client check reverse client request and status packet information about client status reverse forward link skew calibration packet use to calibrate the delay skew forward perform type handoff packet change operate type forward link shutdown packet end of frame forward table 4.6: list of supported mddi packet for truly only http://www..net/ datasheet pdf - http://www..net/
-p.73- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 sub-frame header packet packet length total number of bytes in the packet not including the packet length field, always 20 packet type packet type, 0x3bffh for sub-frame header packet unique word link packet type to form a 32-bit unique word for good autocorrelation. reserved 1 not used(all zero) sub-frame length in fixed sub-frame mode, this value specifies number of bytes per sub-frame. in the flexible sub-frame mode ,this value represents the target length. in the unlimited sub-frame mode, the value is set to zero all zero define the length of the sub-frame is undefined. protocol version set all zero sub-frame count specifies number of sub-frame header packet. media frame count specifies number of media frame crc error check register access packet packet length ? total number of bytes in the packet not including the packet length field packet type ? packet type, 146(decimal) for register access packet bclient id ? set all zero ? when write value to register, bit[15:14] = 00 when request data from register, bit[15:14]=10 when data from client, bit[15:14] = 11 bit[13:0] ? a 14-bit unsigned integer that specifies the number of 32-bit register data list items to be transferred in the register data list field register address ? register address is set written here. parameter crc ? to error check from packet length to register address register data list ? a list of 4-byte register data values. read/write info for truly only http://www..net/ datasheet pdf - http://www..net/
-p.74- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 video stream packet bclientid videodata format descriptor pixeldata attributes packettype =16 packet length 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes totalnumberofbytesinthepacketnotincludingthepacketlengthfield packettype,16(decimal)forregisteraccesspacket setallzero bits[15:13]=010,rawrgbformat(fixedvalue) bit[12]=1,onlypackedtypeisavailable(fixedvalue) bits[11:0]=numberofbitsperpixel, bits[11:8]=forred,bits[7:4]=forgreen,bits[3:0]=forblue bits[1:0]=11,displayedbotheyes(fixedvalue) othersareallzero xcoordinateoftheleftedgeoftheactivewindowfilledbythepixeldatafield. ycoordinateofthetopedgeoftheactivewindowfilledbythepixeldatafield xcoordinateoftherightedgeoftheactivewindowfilledbythepixeldatafield. ycoordinateofthebottomedgeoftheactivewindowfilledbythepixeldatafield. xcoordinateofthefirstpixelinthepixeldatafieldbelow xcoordinateofthefirstpixelinthepixeldatafieldbelow writenumberofpixel toerrorcheckfrompacketlengthtopixelcount pixeldatainfo.numberofpixeldatamustnotbeover65509 topixeldataerrorcheck. packetlength packettype bclientid videodataformatdescriptor pixeldataattributes xleftedge xtopedge xrightedge ybottomedge xstart ystart pixelcount patametercrc pixeldata pixeldatacrc xleft edge pixel count parameter crc pixeldata pixeldata crc ytop edge xright edge ybottom dedge xstart ystart 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes packetlength 26bytes windowless video stream packet for truly only http://www..net/ datasheet pdf - http://www..net/
-p.75- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 flexible video stream packet bclientid videodata format descriptor pixeldata attributes packettype =20 packet length 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes xleft edge pixel count parameter crc pixeldata pixeldata crc ytop edge xright edge ybottom dedge xstart ystart 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes 2bytes packetlength C presentheaderbytes fieldpresent flags packet length total number of bytes in the packet not including the packet length field packet type packet type, 16 (decimal) for register access packet bclient id set all zero field present flags a value of '1' for each bit indicates that the field is present in the packet. a value of '0' for the bit indicates that the field is not present. o bit 0 indicates the presence of the video data format descriptor field. o bit 1 indicates the presence of the pixel data attributes field. o bit 2 indicates the presence of the x left edge field. o bit 3 indicates the presence of the y top edge field. o bit 4 indicates the presence of the x right edge field. o bit 5 indicates the presence of the y bottom edge field. o bit 6 indicates the presence of the x start field. o bit 7 indicates the presence of the y start field. o bit 8 indicates the presence of the pixel count field. o bits [15:9] must be set to 0. video data format descriptor bits[15:13]=010, raw rgb format (fixed value) bit[12]=1,only packed type is available (fixed value) bits[11:0]=number of bits per pixel, bits[11:8]=for red,bits[7:4]=for green,bits[3:0]=for blue pixel data attributes bits[1:0]=11, displayed both eyes (fixed value) others are all zero x left edge x coordinate of the left edge of the active window filled by the pixel data field. x top edge y coordinate of the top edge of the active window filled by the pixel data field x right edge x coordinate of the right edge of the active window filled by the pixel data field. y bottom edge y coordinate of the bottom edge of the active window filled by the pixel data field. x start x coordinate of the first pixel in the pixel data field below y start x coordinate of the first pixel in the pixel data field below pixel count write number of pixel patameter crc to error check from packet length to pixel count pixel data pixel data info. number of pixel data must not be over 65509 pixel data crc to pixel data error check. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.76- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 perform type handoff packet packet length total number of bytes in the packet not including the packet length field packet type packet type, 77(decimal) for perform type handoff packet interface type contain the new type to be used. bit[2:0], define the forward link 1: handoff to type1 2: handoff to type2 others: not used. bit[5:3], define the reverse link 1: handoff to type1 others not used bit[7:6], set all zero. reserved1 set all zero delay filler set all zero forward link is type1, delay filler is 16byte forward link is type2, delay filler is 32byte crc to error check forward link skew calibration pack packet type =83 packet length 8 bytes packet length C 22 bytes 2 bytes 2 bytes all zero2 2 bytes hclient id 2 bytes crc calibration data sequence packet length total number of bytes in the packet not including the packet length field packet type packet type, 83(decimal) for perform type handoff packet hclient id contain the new type to be used. crc to error check all zero 1 set all zero calibration data sequence a data sequence that causes the mddi_data signals to toggle at every data period. o type 1 C (64 byte data sequence) aah, aah or 55h, 55h o type 2 C (128 byte data sequence) cch, cch or 33h, 33h all zero 2 set all zero all zero1 8 bytes for truly only http://www..net/ datasheet pdf - http://www..net/
-p.77- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 filler packet link shutdown packet for more information about mddi packet refer to vesa mddi spec. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.78- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.7.3 hibernation / wake up HX8369-A mddi provides the hibernation mode to reduce the power consumption. the mddi link can enter the hibernation state quickly and wake up from hibernation quickly. this allows the system to force the mddi link into hibernation frequently to reduce power consumption. in hibernation mode, hi-speed drivers and receivers are disabled and low-speed & low-power receivers are enabled to detect wake-up sequence. figure 4.48: mddi transceiver / receiver state in hibernation when the link wakes up from hibernation the host and client exchange a sequence of pulses. these pulses can be detected using low-speed line receivers that consume only a fraction of the current as the differential receivers required to receive the signals at the maximum link operating speed. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.79- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.7.4 mddi link wakeup sequence figure below provide a host-initiated wake-up is described below without contention from the client trying to wake up at the same time. the labeled events are figure 4.49: host-initiated link wakeup sequence an example of a typical client-initiated service request event with no contention is illustrated in below figure. the labeled events are a . the host sends a link shutdown packet to inform the client that the link will transition to the low-power hibernation state. b. following the crc of the link shutdown packet the host toggles mddi_stb for 64 cycles to allow processing in the client to finish before it stops mddi_stb from toggling which stops the recovered clock in the client device. also during this interval the host initially sets mddi_data0 to a logic-zero level, and then disables the mddi_data0 output in the range of 16 to 48 mddi_stb cycles (including output disable propagation delays) after the crc. it may be desirable for the client to place its high-speed receivers for mddi_data0 and mddi_stb into a low power state any time after 48 mddi_stb cycles after the crc and before point c. c. the host enters the low-power hibernation state by disabling the mddi_data0 and mddi_stb drivers and by placing the host controller into a low-power hibernation state. it is also allowable for mddi_stb to be driven to a logic-zero level or to continue toggling during hibernation. the client is also in the low-power hibernation state. d. after a while, the host begins the link restart sequence by enabling the mddi_data0 and mddi_stb driver outputs. the host drives mddi_data0 to a logic-one level and mddi_stb to a logic-zero level for at least the time it takes for the drivers to fully enable their outputs. the host shall wait at least 200 nsec after mddi_data0 reaches a valid logic-one level and mddi_stb reaches a valid logic-zero level before driving pulses on mddi_stb. this gives the client sufficient time to prepare to receive high-speed pulses on mddi_stb. the client first detects the wake-up pulse using a low-power differential receiver having a +125mv input offset voltage. e. the host drivers are fully enabled and mddi_data0 is being driven to a logic-one level. the host begins to toggle mddi_stb in a manner consistent with having a logic-zero level on mddi_data0 for a duration of 150 mddi_stb cycles. f. the host drives mddi_data0 to a logic-zero level for 50 mddi_stb cycles. the client begins to look for the sub-frame header packet after mddi_data0 is at a logic-zero level for 40 mddi_stb cycles. g. the host begins to transmit data on the forward link by sending a sub-frame header packet. beginning at point g the mddi host generates mddi_stb based on the logic level on mddi_data0 so that proper data-strobe encoding commences from point g. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.80- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 4.2.7.5 mddi operation mode the mddi link provides six operation modes, the mode flow is illustrated as below. figure 4.50: mddi operation mode the mddi link provides five operation modes that are listed in the table 4.7. function reset sleep wait normal idle mddi hibernation receiver off on off off on mddi normal receiver or normal driver off off on on off register and ram access disable disable enable enable disable internal oscillator(osc) off off on/off (1) on (2) on (2) booster(vsp,vsn,vgh,vgl) off off off on on regulator (vcom,vspr,vsnr) off off off on on note: (1) while osc_en = 0 is defined the operation as off, and osc_en = 1 is on. (2) do not set osc_en = 1 in normal mode, if osc stopped, indication also stops. table 4.7: operation mode list for truly only http://www..net/ datasheet pdf - http://www..net/
-p.81- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5. function description 5.1 display data gram HX8369-A support the display data ram that stores display dots and consists of 9,953,280 bits (480x864x24 bits). there is no restriction on access to the ram even when the display data on the same address is loaded to dac there will be no abnormal visible effect on the display when there is a simultaneous panel read and interface read or write to the same location of the frame memory. 5.2 address counter (ac) the HX8369-A contains an address counter (ac) which assigns address for writing/reading pixel data to/from gram. the address pointers set the position of gram whose addresses range: res_sel2 res_sel 1 res_sel 0 mv x range y range panel resolution 0 0~479d. 0~863d. 0 0 0 1 0~863d. 0~479d. 480rgbx864 dot 0 0~479d.. 0~853d. 0 0 1 1 0~853d. 0~479d. 480rgbx854 dot 0 0~479d. 0~799d. 0 1 0 1 0~799d. 0~479d. 480rgbx800 dot 0 0~479d. 0~639d. 0 1 1 1 0~639d. 0~479d. 480rgbx640 dot 0 0~359d. 0~639d. 1 0 0 1 0~639d. 0~359d. 360 rgbx640 dot 0 0~479d. 0~719d. 1 0 1 1 0~719d. 0~479d. 480rgbx720 dot table 5.1: addresses counter range every time when a pixel data is written into the gram, the x address or y address of ac will be automatically increased by 1 (or decreased by 1), which is decided by the register (mv, mx and my bit) setting. to simplify the address control of gram access, the window address function allows for writing data only to a window area of gram specified by registers. after data is written to the gram, the ac will be increased or decreased within setting window address-range which is specified by the column address register (start: sc, end: ec) or the row address register (start: sp, end: ep). therefore, the data can be written consecutively without thinking a data wrap by those bit function. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.82- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.3 source, gate and memory map 5.3.1 480rgb x 864 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 863 862 861 860 859 858 857 856 : : : : 0 1 2 3 4 5 6 7 8 9 8 63 862 861 860 859 858 857 856 : : : : 0 1 2 3 4 5 6 7 8 63 862 861 860 859 858 857 856 855 854 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 8 63 862 861 860 859 858 857 856 855 854 0 1 478 479 479 478 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r478 7-0 g478 7-0 b478 7-0 r479 7-0 g479 7-0 b479 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.2: memory map of 480rgb x 864 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.83- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.3.2 480rgb x 854 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 853 852 851 850 849 848 847 846 : : : : 0 1 2 3 4 5 6 7 8 9 8 53 852 851 850 849 848 847 846 : : : : 0 1 2 3 4 5 6 7 8 53 852 851 850 849 848 847 846 845 844 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 8 53 852 851 850 849 848 847 846 845 844 0 1 478 479 479 478 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r478 7-0 g478 7-0 b478 7-0 r479 7-0 g479 7-0 b479 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.3: memory map of 480rgb x 854 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.84- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.3.3 480rgb x 800 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 799 798 797 796 795 794 793 792 : : : : 0 1 2 3 4 5 6 7 8 9 7 99 798 797 796 795 794 793 792 : : : : 0 1 2 3 4 5 6 7 7 99 798 797 796 795 794 793 792 791 790 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 7 99 798 797 796 795 794 793 792 791 790 0 1 478 479 479 478 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r478 7-0 g478 7-0 b478 7-0 r479 7-0 g479 7-0 b479 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.4: memory map of 480rgb x 800 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.85- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.3.4 480rgb x 640 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 639 638 637 636 635 634 633 632 : : : : 0 1 2 3 4 5 6 7 8 9 6 39 638 637 636 635 634 633 632 : : : : 0 1 2 3 4 5 6 7 6 39 638 637 636 635 634 633 632 631 630 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 6 39 638 637 636 635 634 633 632 631 630 0 1 478 479 479 478 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r478 7-0 g478 7-0 b478 7-0 r479 7-0 g479 7-0 b479 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.5: memory map of 480rgb x 640 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.86- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.3.5 360rgb x 640 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 639 638 637 636 635 634 633 632 : : : : 0 1 2 3 4 5 6 7 8 9 6 39 638 637 636 635 634 633 632 : : : : 0 1 2 3 4 5 6 7 6 39 638 637 636 635 634 633 632 631 630 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 6 39 638 637 636 635 634 633 632 631 630 0 1 358 359 359 358 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r358 7-0 g358 7-0 b358 7-0 r359 7-0 g359 7-0 b359 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.6: memory map of 360rgb x640 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.87- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.3.6 480rgb x 720 resolution source out ra my=0 my=1 sa ml=0 ml=1 0 1 2 3 4 5 6 7 8 9 mx=0 mx=1 ca 719 718 717 716 715 714 713 712 : : : : 0 1 2 3 4 5 6 7 8 9 7 19 718 717 716 715 714 713 712 : : : : 0 1 2 3 4 5 6 7 7 19 718 717 716 715 714 713 712 711 710 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 0 1 2 3 4 5 6 7 7 19 718 717 716 715 714 713 712 711 710 0 1 478 479 479 478 1 0 s1 s2 s3 s4 s5 s6 s1435 s1436 s1437 s1438 s1439 s1440 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r g b = 0 r g b = 1 r0 7-0 g0 7-0 b0 7-0 r1 7-0 g1 7-0 b1 7-0 r478 7-0 g478 7-0 b478 7-0 r479 7-0 g479 7-0 b479 7-0 n ote:ra=row address ca=colum address sa=scan address mx=colum address direction parameter my=row address direction parameter ml=scan direction parameter rgb=red,green and blue pixel position change --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- table 5.7: memory map of 480rgb x 720 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.88- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.4 mcu to memory write / read direction b e data stream from mcu is like this figure figure 5.1: mcu to memory write / read direction the data is written in the order as illustrated above. the counter that dictates which physical memory the data is to be written is controlled by memory access control command, bits my, mx, mv as described below. my mx mv physical row pointer figure 5.2: my, mx, mv setting of 480rgb x 864 dot mv mx my caset paset 0 0 0 direct to physical column pointer direct to physical row pointer 0 0 1 direct to physical column pointer direct to (863-physical row pointer) with sc 0 1 0 direct to (479-physical column pointer) direct to physical row pointer 0 1 1 direct to (479-physical column pointer) direct to (863-physical row pointer) 1 0 0 direct to physical row pointer direct to physical column pointer 1 0 1 direct to (863-physical row pointer) direct to physical column pointer 1 1 0 direct to physical row pointer direct to (479-physical column pointer) 1 1 1 direct to (863-physical row pointer) direct to (479-physical column pointer) figure 5.3: my, mx, mv setting of 480rgb x 864 dot for truly only http://www..net/ datasheet pdf - http://www..net/
-p.89- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 the following figure depicts the update method set by mv, mx and my bit. memory access control display data direction mv mx my image in the host image in the driver (gram) normal 0 0 0 b e y-mirror 0 0 1 b e x,y address (0,0) x: caset y: raset b e h/w position (0,0) x-mirror 0 1 0 b e x-mirror y-mirror 0 1 1 b e x-y exchange 1 0 0 b e x,y address (0,0) x: caset y: raset b e h/w position (0,0) x-y exchange y-mirror 1 0 1 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e x-y exchange x-mirror 1 1 0 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e x-y exchange x-mirror y-mirror 1 1 1 b e x,y address (0,0) x: caset y: raset h/w position (0,0) b e figure 5.4: address direction settings for truly only http://www..net/ datasheet pdf - http://www..net/
-p.90- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.5 fully display, partial display, vertical scrolling display 5.5.1 fully display example: (1) 480rgbx864 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x1dfh (r2ah) and sp=0x000h, ep=0x35fh (r2bh), ml=0. 000h 001h --------- 1deh 1dfh gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 0001deh 0001dfh 001h 001000h 001001h --------- 0011deh 0011dfh 002h 002000h 002001h --------- 0021deh 0021dfh 003h 003000h 003001h --------- 0031deh 0031dfh 004h 004000h 004001h --------- 0041deh 0041dfh 005h 005000h 005001h --------- 0051deh 0051dfh ------- ------- ------- --------- ------- ------- 35ah 35a000h 35a001h --------- 35a1deh 35a1dfh 35bh 35b000h 35b001h --------- 35b1deh 35b1dfh 35ch 35c000h 35c001h --------- 35c1deh 35c1dfh 35dh 35d000h 35d001h --------- 35d1deh 35d1dfh 35eh 35e000h 35e001h --------- 35e1deh 35e1dfh 35fh 35f000h 35f001h --------- 35f1deh 35f1dfh table 5.8: 480rgb x 864 resolution (sram assignment) 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 480 columns 480 x 864 lcd panel 00h 01h 35dh 0v 11 12 13 21 22 23 31 32 14 1x 2x 2y 3y 1y x1 x2 y3 y1 y2 xx xy yx yy 01 02 03 04 0x 0y 05 z1 z2 z3 z4 zv zx zy z5 2z 3z 1z xz yz 0z zz 10 20 30 x0 y0 00 z0 00v w0 1ddh 480 x 864 x24bit frame memory 864lines 00h 01h 35eh 35fh 480 columns w1 0w 1w wx wy wz xw yw zw w0 w1 0w 1w wx wy wz xw yw zw 864lines 1dfh 1deh 1ddh 1dfh 1deh 00h 01h 35dh 00h 01h 35eh 35fh figure 5.5: 480rgb x 864 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.91- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example: (1) 480rgbx854 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x1dfh (r2ah) and sp=0x000h, ep=0x355h (r2bh), ml=0. 000h 001h --------- 1deh 1dfh gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 0001deh 0001dfh 001h 001000h 001001h --------- 0011deh 0011dfh 002h 002000h 002001h --------- 0021deh 0021dfh 003h 003000h 003001h --------- 0031deh 0031dfh 004h 004000h 004001h --------- 0041deh 0041dfh 005h 005000h 005001h --------- 0051deh 0051dfh ------- ------- ------- --------- ------- ------- 350h 350000h 350001h --------- 3501deh 3501dfh 351h 351000h 351001h --------- 3511deh 3511dfh 352h 352000h 352001h --------- 3521deh 3521dfh 353h 353000h 353001h --------- 3531deh 3531dfh 354h 354000h 354001h --------- 3541deh 3541dfh 355h 355000h 355001h --------- 3551deh 3551dfh table 5.9: 480rgb x 854 resolution (sram assignment) 00h 01h 1ddh 854 lines 854 lines 1dfh 1deh 1ddh 1dfh 1deh 00h 01h figure 5.6: 480rgb x 854 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.92- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example: (1) 480rgbx800 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x1dfh (r2ah) and sp=0x000h, ep=0x31fh (r2bh), ml=0. 000h 001h --------- 1deh 1dfh gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 0001deh 0001dfh 001h 001000h 001001h --------- 0011deh 0011dfh 002h 002000h 002001h --------- 0021deh 0021dfh 003h 003000h 003001h --------- 0031deh 0031dfh 004h 004000h 004001h --------- 0041deh 0041dfh 005h 005000h 005001h --------- 0051deh 0051dfh ------- ------- ------- --------- ------- ------- 31ah 31a000h 31a001h --------- 31a1deh 31a1dfh 31bh 31b000h 31b001h --------- 31b1deh 31b1dfh 31ch 31c000h 31c001h --------- 31c1deh 31c1dfh 31dh 31d000h 31d001h --------- 31d1deh 31d1dfh 31eh 31e000h 31e001h --------- 31e1deh 31e1dfh 31fh 31f000h 31f001h --------- 31f1deh 31f1dfh table 5.10: 480rgb x 800 resolution (sram assignment) figure 5.7: 480rgb x 800 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.93- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example: (1) 480rgbx640 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x1dfh (r2ah) and sp=0x000h, ep=0x27fh (r2bh), ml=0. 000h 001h --------- 1deh 1dfh gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 0001deh 0001dfh 001h 001000h 001001h --------- 0011deh 0011dfh 002h 002000h 002001h --------- 0021deh 0021dfh 003h 003000h 003001h --------- 0031deh 0031dfh 004h 004000h 004001h --------- 0041deh 0041dfh 005h 005000h 005001h --------- 0051deh 0051dfh ------- ------- ------- --------- ------- ------- 27ah 27a000h 27a001h --------- 27a1deh 27a1dfh 27bh 27b000h 27b001h --------- 27b1deh 27b1dfh 27ch 27c000h 27c001h --------- 27c1deh 27c1dfh 27dh 27d000h 27d001h --------- 27d1deh 27d1dfh 27eh 27e000h 27e001h --------- 27e1deh 27e1dfh 27fh 27f000h 27f001h --------- 27f1deh 27f1dfh table 5.11: 480rgb x 640 resolution (sram assignment) 00h 01h 1ddh 640lines 640lines 1dfh 1deh 1ddh 1dfh 1deh 00h 01h figure 5.8: 480rgb x 640 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.94- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example: (1) 360rgbx640 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x167h (r2ah) and sp=0x000h, ep=0x27fh (r2bh), ml=0. 000h 001h --------- 166h 167h gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 000166h 000167h 001h 001000h 001001h --------- 001166h 001167h 002h 002000h 002001h --------- 002166h 002167h 003h 003000h 003001h --------- 003166h 003167h 004h 004000h 004001h --------- 004166h 004167h 005h 005000h 005001h --------- 005166h 005167h ------- ------- ------- --------- ------- ------- 27ah 27a000h 27a001h --------- 27a166h 27a167h 27bh 27b000h 27b001h --------- 27b166h 27b167h 27ch 27c000h 27c001h --------- 27c166h 27c167h 27dh 27d000h 27d001h --------- 27d166h 27d167h 27eh 27e000h 27e001h --------- 27e166h 27e167h 27fh 27f000h 27f001h --------- 27f166h 27f167h table 5.12: 360rgb x 640 resolution (sram assignment) figure 5.9: 360rgb x 640 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.95- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 example: (1) 480rgbx720 dot display mode. (2) noron (normal display mode on) instruction (r13h). (3) sc=0x000h, ec=0x1dfh (r2ah) and sp=0x000h, ep=0x2cfh (r2bh), ml=0. 000h 001h --------- 1deh 1dfh gram db---db 23 ---0 db---db 23 ---0 --------- db---db 23 ---0 db---db 23 ---0 000h 000000h 000001h --------- 0001deh 0001dfh 001h 001000h 001001h --------- 0011deh 0011dfh 002h 002000h 002001h --------- 0021deh 0021dfh 003h 003000h 003001h --------- 0031deh 0031dfh 004h 004000h 004001h --------- 0041deh 0041dfh 005h 005000h 005001h --------- 0051deh 0051dfh ------- ------- ------- --------- ------- ------- 2cah 2ca000h 2ca001h --------- 2ca1deh 2ca1dfh 2cbh 2cb000h 2cb001h --------- 2cb1deh 2cb1dfh 2cch 2cc000h 2cc001h --------- 2cc1deh 2cc1dfh 2cdh 2cd000h 2cd001h --------- 2cd1deh 2cd1dfh 2ceh 2ce000h 2ce001h --------- 2ce1deh 2ce1dfh 2cfh 2cf000h 2cf001h --------- 2cf1deh 2cf1dfh table 5.13: 480rgb x 720 resolution (sram assignment) figure 5.10: 480rgb x 720 resolution for truly only http://www..net/ datasheet pdf - http://www..net/
-p.96- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.5.2 vertical scrolling display the vertical scrolling display is specified by vscrdef instruction (r33h) and vscrsadd instruction (r37h). figure 5.11: vertical scrolling when vertical scrolling definition parameters (tfa+vsa+bfa)=panel total scan lines. in this case, scrolling is applied as shown below. 5.5.2.1 example: 480rgb x 864 when vertical scrolling definition parameters (tfa+vsa+bfa)=864. in this case, scrolling is applied as shown below. example (1) tfa=2, vsa=862, bfa=0 when madctl b4=0 figure 5.12: memory map of vertical scrolling 1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.97- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example (2) tfa=2, vsa=860, bfa=2 when madctl b4=0 figure 5.13: memory map of vertical scrolling 2 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.98- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.5.2.2 vertical scroll example there are 2 types of vertical scrolling, which are determined by the commands vertical scrolling definition (33h) and vertical scrolling start address (37h). case 1: tfa + vsa + bfa 864 d o not set tfa + vsa + bfa 864. in that case, unexpected picture will be shown. case 2: tfa + vsa + bfa=864 (scrolling) example (1) when tfa=0, vsa=864, bfa=0 and vscrsadd=40.madctl parameter b4=0 v s c r s a d d p h y s ic a l l in e p o in t e r 2 1 2 1 d is p la y in cr e m e n t v s c r s a d d v s c r s a d d p h y s ic a l l in e p o in t e r 2 1 2 1 d is p la y d isp la y a xis ( 0 ,0 ) m e m o r y p h ysica l a x is (0 ,0 ) d isp la y a xis ( 0 , 0 ) f ra m e f ra m e m e m o ry m e m o ry figure 5.14: vertical scroll example 1 example (2) tfa=30, vsa=834, bfa=0 and vscrsadd =80. madctrl parameter b4=1 vscrsadd physical line pointer 2 1 display display axis (0,0) increment tfa 3 2 1 3 tfa memory physical axis (0,0) vscrsadd physical line pointer 2 1 display display axis (0,0) tfa 3 2 1 3 tfa memory physical axis (0,0) frame memory frame memory vscrsadd figure 5.15: vertical scroll example 2 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.99- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.5.3 tearing effect output line the tearing effect output line supplies to the mpu a panel synchronization signal. this signal can be enabled or disabled by the tearing effect line off & on commands. the mode of the tearing effect signal is defined by the parameter of the tearing effect line on command. the signal can be used by the mpu to synchronize frame memory writing when displaying video images. tearing effect line modes mode 1 , the tearing effect output signal consists of v-blanking information only: t vdl t vdh figure 5.16: tearing effect output lineCmode 1 tvdh=the lcd display is not updated from the frame memory tvdl=the lcd display is updated from the frame memory (except invisible line C see below) mode 2 , the tearing effect output signal consists of v-blanking and h-blanking information, there is one v-sync and n h-sync pulses per field. n: if res_sel [2:0] set to = 3b000, the resolution is 480 rgb x 864, the n=864. figure 5.17: tearing effect output lineCmode 2 thdh=the lcd display is not updated from the frame memory thdl=the lcd display is updated from the frame memory (except invisible line C see above) te(mode1) te(mode2) 2ndline topline bottom line t vdh note: during sleep in mode, the tearing output pin is active low. figure 5.18: tearing effect output lineCtiming diagrm for truly only http://www..net/ datasheet pdf - http://www..net/
-p.100- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.5.3.1 tearing effect line timing the tearing effect signal is described below: t hdl t hdh t vdh t vdl vertical timing horizontal timing figure 5.19: tearing effect output line Ctearing effect line timing idle mode off (resolution 480x800 rgb, frame rate = 60.5 hz) symbol parameter min. max. unit tvdl vertical timing low duration 15 - ms tvdh vertical timing high duration 1000 - us thdl horizontal timing low duration 18 - us thdh horizontal timing high duration 0.13 500 us tr rise time - 15 ns tf fall time - 15 ns note: the timings in table 5.13 apply when madctl ml=0 and ml=1 table 5.14: ac characteristics of tearing effect signal the signals rise and fall times (tf, tr) are stipulated to be equal to or less than 15ns. tr tf 0.8*vdd1 0.8*vdd1 0.2*vdd1 0.2*vdd1 figure 5.20: tearing effect output lineCdefinition of tf, tr for truly only http://www..net/ datasheet pdf - http://www..net/
-p.101- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 the tearing effect output line is fed back to the mpu and should be used as shown below to avoid tearing effect. example 1: mpu write is faster than panel read. figure 5.21: tearing effect output lineCexample 1 (timing) data write to frame memory is now synchronized to the panel scan. it should be written during the vertical sync pulse of the tearing effect output line. this ensures that data is always written ahead of the panel scan and each panel frame refresh has a complete new image: data to be sent image on lcd a b c d figure 5.22: tearing effect output lineCexample 1 (image) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.102- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 example 2: mpu write is slower than panel read. time time time mcu to memory te output signal memory to lcd image on lcd a b c d 1st 864th 1st 864th e f figure 5.23: tearing effect output lineCexample 2 (timing) the mpu to frame memory write begins just after panel read has commenced i.e. after one horizontal sync pulse of the tearing effect output line. this allows time for the image to download behind the panel read pointer and finishing download during the subsequent frame before the read pointer catches the mpu to frame memory write position. data to be sent image on lcd e f a b c d figure 5.24: tearing effect output lineCexample 2 (image) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.103- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.6 color depth conversion 5.6.1 color depth conversion look-up tables r input (5-bit) r input (6-bit) r output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter 00000 000000 r 007 r 006 r 005 r 004 r 003 r 002 r 001 r 000 1 00001 000001 r 017 r 016 r 015 r 014 r 013 r 012 r 011 r 010 2 00010 000010 r 027 r 026 r 025 r 024 r 023 r 022 r 021 r 020 3 00011 000011 r 037 r 036 r 035 r 034 r 033 r 032 r 031 r 030 4 00100 000100 r 047 r 046 r 045 r 044 r 043 r 042 r 041 r 040 5 00101 000101 r 057 r 056 r 055 r 054 r 053 r 052 r 051 r 050 6 00110 000110 r 067 r 066 r 065 r 064 r 063 r 062 r 061 r 060 7 00111 000111 r 077 r 076 r 075 r 074 r 073 r 072 r 071 r 070 8 01000 001000 r 087 r 086 r 085 r 084 r 083 r 082 r 081 r 080 9 01001 001001 r 097 r 096 r 095 r 094 r 093 r 092 r 091 r 090 10 01010 001010 r 107 r 106 r 105 r 104 r 103 r 102 r 101 r 100 11 01011 001011 r 117 r 116 r 115 r 114 r 113 r 112 r 111 r 110 12 01100 001100 r 127 r 126 r 125 r 124 r 123 r 122 r 121 r 120 13 01101 001101 r 137 r 136 r 135 r 134 r 133 r 132 r 131 r 130 14 01110 001110 r 147 r 146 r 145 r 144 r 143 r 142 r 141 r 140 15 01111 001111 r 157 r 156 r 155 r 154 r 153 r 152 r 151 r 150 16 10000 010000 r 167 r 166 r 165 r 164 r 163 r 162 r 161 r 160 17 10001 010001 r 177 r 176 r 175 r 174 r 173 r 172 r 171 r 170 18 10010 010010 r 187 r 186 r 185 r 184 r 183 r 182 r 181 r 180 19 10011 010011 r 197 r 196 r 195 r 194 r 193 r 192 r 191 r 190 20 10100 010100 r 207 r 206 r 205 r 204 r 203 r 202 r 201 r 200 21 10101 010101 r 217 r 216 r 215 r 214 r 213 r 212 r 211 r 210 22 10110 010110 r 227 r 226 r 225 r 224 r 223 r 222 r 221 r 220 23 10111 010111 r 237 r 236 r 235 r 234 r 233 r 232 r 231 r 230 24 11000 011000 r 247 r 246 r 245 r 244 r 243 r 242 r 241 r 240 25 11001 011001 r 257 r 256 r 255 r 254 r 253 r 252 r 251 r 250 26 11010 011010 r 267 r 266 r 265 r 264 r 263 r 262 r 261 r 260 27 11011 011011 r 277 r 276 r 275 r 274 r 273 r 272 r 271 r 270 28 11100 011100 r 287 r 286 r 285 r 284 r 283 r 282 r 281 r 280 29 11101 011101 r 297 r 296 r 295 r 294 r 293 r 292 r 291 r 290 30 11110 011110 r 307 r 306 r 305 r 304 r 303 r 302 r 301 r 300 31 11111 011111 r 317 r 316 r 315 r 314 r 313 r 312 r 311 r 310 32 table 5.15: look-up tables-1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.104- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 r input (5-bit) r input (6-bit) r output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter no input 100000 r 327 r 326 r 325 r 324 r 323 r 322 r 321 r 320 33 no input 100001 r 337 r 336 r 335 r 334 r 333 r 332 r 331 r 330 34 no input 100010 r 347 r 346 r 345 r 344 r 343 r 342 r 341 r 340 35 no input 100011 r 357 r 356 r 355 r 354 r 353 r 352 r 351 r 350 36 no input 100100 r 367 r 366 r 365 r 364 r 363 r 362 r 361 r 360 37 no input 100101 r 377 r 376 r 375 r 374 r 373 r 372 r 371 r 370 38 no input 100110 r 387 r 386 r 385 r 384 r 383 r 382 r 381 r 380 39 no input 100111 r 397 r 396 r 395 r 394 r 393 r 392 r 391 r 390 40 no input 101000 r 407 r 406 r 405 r 404 r 403 r 402 r 401 r 400 41 no input 101001 r 417 r 416 r 415 r 414 r 413 r 412 r 411 r 410 42 no input 101010 r 427 r 426 r 425 r 424 r 423 r 422 r 421 r 420 43 no input 101011 r 437 r 436 r 435 r 434 r 433 r 432 r 431 r 430 44 no input 101100 r 447 r 446 r 445 r 444 r 443 r 442 r 441 r 440 45 no input 101101 r 457 r 456 r 455 r 454 r 453 r 452 r 451 r 450 46 no input 101110 r 467 r 466 r 465 r 464 r 463 r 462 r 461 r 460 47 no input 101111 r 477 r 476 r 475 r 474 r 473 r 472 r 471 r 470 48 no input 110000 r 487 r 486 r 485 r 484 r 483 r 482 r 481 r 480 49 no input 110001 r 497 r 496 r 495 r 494 r 493 r 492 r 491 r 490 50 no input 110010 r 507 r 506 r 505 r 504 r 503 r 502 r 501 r 500 51 no input 110011 r 517 r 516 r 515 r 514 r 513 r 512 r 511 r 510 52 no input 110100 r 527 r 526 r 525 r 524 r 523 r 522 r 521 r 520 53 no input 110101 r 537 r 536 r 535 r 534 r 533 r 532 r 531 r 530 54 no input 110110 r 547 r 546 r 545 r 544 r 543 r 542 r 541 r 540 55 no input 110111 r 557 r 556 r 555 r 554 r 553 r 552 r 551 r 550 56 no input 111000 r 567 r 566 r 565 r 564 r 563 r 562 r 561 r 560 57 no input 111001 r 577 r 576 r 575 r 574 r 573 r 572 r 571 r 570 58 no input 111010 r 587 r 586 r 585 r 584 r 583 r 582 r 581 r 580 59 no input 111011 r 597 r 596 r 595 r 594 r 593 r 592 r 591 r 590 60 no input 111100 r 607 r 606 r 605 r 604 r 603 r 602 r 601 r 600 61 no input 111101 r 617 r 616 r 615 r 614 r 613 r 612 r 611 r 610 62 no input 111110 r 627 r 626 r 625 r 624 r 623 r 622 r 621 r 620 63 no input 111111 r 637 r 636 r 635 r 634 r 633 r 632 r 631 r 630 64 table 5.16: look-up tables-2 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.105- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 g input (5-bit) g input (6-bit) g output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter 000000 000000 g 007 g 006 g 005 g 004 g 003 g 002 g 001 g 000 65 000001 000001 g 017 g 016 g 015 g 014 g 013 g 012 g 011 g 010 66 000010 000010 g 027 g 026 g 025 g 024 g 023 g 022 g 021 g 020 67 000011 000011 g 037 g 036 g 035 g 034 g 033 g 032 g 031 g 030 68 000100 000100 g 047 g 046 g 045 g 044 g 043 g 042 g 041 g 040 69 000101 000101 g 057 g 056 g 055 g 054 g 053 g 052 g 051 g 050 70 000110 000110 g 067 g 066 g 065 g 064 g 063 g 062 g 061 g 060 71 000111 000111 g 077 g 076 g 075 g 074 g 073 g 072 g 071 g 070 72 001000 001000 g 087 g 086 g 085 g 084 g 083 g 082 g 081 g 080 73 001001 001001 g 097 g 096 g 095 g 094 g 093 g 092 g 091 g 090 74 001010 001010 g 107 g 106 g 105 g 104 g 103 g 102 g 101 g 100 75 001011 001011 g 117 g 116 g 115 g 114 g 113 g 112 g 111 g 110 76 001100 001100 g 127 g 126 g 125 g 124 g 123 g 122 g 121 g 120 77 001101 001101 g 137 g 136 g 135 g 134 g 133 g 132 g 131 g 130 78 001110 001110 g 147 g 146 g 145 g 144 g 143 g 142 g 141 g 140 79 001111 001111 g 157 g 156 g 155 g 154 g 153 g 152 g 151 g 150 80 010000 010000 g 167 g 166 g 165 g 164 g 163 g 162 g 161 g 160 81 010001 010001 g 177 g 176 g 175 g 174 g 173 g 172 g 171 g 170 82 010010 010010 g 187 g 186 g 185 g 184 g 183 g 182 g 181 g 180 83 010011 010011 g 197 g 196 g 195 g 194 g 193 g 192 g 191 g 190 84 010100 010100 g 207 g 206 g 205 g 204 g 203 g 202 g 201 g 200 85 010101 010101 g 217 g 216 g 215 g 214 g 213 g 212 g 211 g 210 86 010110 010110 g 227 g 226 g 225 g 224 g 223 g 222 g 221 g 220 87 010111 010111 g 237 g 236 g 235 g 234 g 233 g 232 g 231 g 230 88 011000 011000 g 247 g 246 g 245 g 244 g 243 g 242 g 241 g 240 89 011001 011001 g 257 g 256 g 255 g 254 g 253 g 252 g 251 g 250 90 011010 011010 g 267 g 266 g 265 g 264 g 263 g 262 g 261 g 260 91 011011 011011 g 277 g 276 g 275 g 274 g 273 g 272 g 271 g 270 92 011100 011100 g 287 g 286 g 285 g 284 g 283 g 282 g 281 g 280 93 011101 011101 g 297 g 296 g 295 g 294 g 293 g 292 g 291 g 290 94 011110 011110 g 307 g 306 g 305 g 304 g 303 g 302 g 301 g 300 95 011111 011111 g 317 g 316 g 315 g 314 g 313 g 312 g 311 g 310 96 table 5.17: look-up tables-3 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.106- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 g input (5-bit) g input (6-bit) g output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter 100000 100000 g 327 g 326 g 325 g 324 g 323 g 322 g 321 g 320 97 100001 100001 g 337 g 336 g 335 g 334 g 333 g 332 g 331 g 330 98 100010 100010 g 347 g 346 g 345 g 344 g 343 g 342 g 341 g 340 99 100011 100011 g 357 g 356 g 355 g 354 g 353 g 352 g 351 g 350 100 100100 100100 g 367 g 366 g 365 g 364 g 363 g 362 g 361 g 360 101 100101 100101 g 377 g 376 g 375 g 374 g 373 g 372 g 371 g 370 102 100110 100110 g 387 g 386 g 385 g 384 g 383 g 382 g 381 g 380 103 100111 100111 g 397 g 396 g 395 g 394 g 393 g 392 g 391 g 390 104 101000 101000 g 407 g 406 g 405 g 404 g 403 g 402 g 401 g 400 105 101001 101001 g 417 g 416 g 415 g 414 g 413 g 412 g 411 g 410 106 101010 101010 g 427 g 426 g 425 g 424 g 423 g 422 g 421 g 420 107 101011 101011 g 437 g 436 g 435 g 434 g 433 g 432 g 431 g 430 108 101100 101100 g 447 g 446 g 445 g 444 g 443 g 442 g 441 g 440 109 101101 101101 g 457 g 456 g 455 g 454 g 453 g 452 g 451 g 450 110 101110 101110 g 467 g 466 g 465 g 464 g 463 g 462 g 461 g 460 111 101111 101111 g 477 g 476 g 475 g 474 g 473 g 472 g 471 g 470 112 110000 110000 g 487 g 486 g 485 g 484 g 483 g 482 g 481 g 480 113 110001 110001 g 497 g 496 g 495 g 494 g 493 g 492 g 491 g 490 114 110010 110010 g 507 g 506 g 505 g 504 g 503 g 502 g 501 g 500 115 110011 110011 g 517 g 516 g 515 g 514 g 513 g 512 g 511 g 510 116 110100 110100 g 527 g 526 g 525 g 524 g 523 g 522 g 521 g 520 117 110101 110101 g 537 g 536 g 535 g 534 g 533 g 532 g 531 g 530 118 110110 110110 g 547 g 546 g 545 g 544 g 543 g 542 g 541 g 540 119 110111 110111 g 557 g 556 g 555 g 554 g 553 g 552 g 551 g 550 120 111000 111000 g 567 g 566 g 565 g 564 g 563 g 562 g 561 g 560 121 111001 111001 g 577 g 576 g 575 g 574 g 573 g 572 g 571 g 570 122 111010 111010 g 587 g 586 g 585 g 584 g 583 g 582 g 581 g 580 123 111011 111011 g 597 g 596 g 595 g 594 g 593 g 592 g 591 g 590 124 111100 111100 g 607 g 606 g 605 g 604 g 603 g 602 g 601 g 600 125 111101 111101 g 617 g 616 g 615 g 614 g 613 g 612 g 611 g 610 126 111110 111110 g 627 g 626 g 625 g 624 g 623 g 622 g 621 g 620 127 111111 111111 g 637 g 636 g 635 g 634 g 633 g 632 g 631 g 630 128 table 5.18: look-up tables-4 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.107- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 b input (5-bit) b input (6-bit) b output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter 00000 000000 b 007 b 006 b 005 b 004 b 003 b 002 b 001 b 000 129 00001 000001 b 017 b 016 b 015 b 014 b 013 b 012 b 011 b 010 130 00010 000010 b 027 b 026 b 025 b 024 b 023 b 022 b 021 b 020 131 00011 000011 b 037 b 036 b 035 b 034 b 033 b 032 b 031 b 030 132 00100 000100 b 047 b 046 b 045 b 044 b 043 b 042 b 041 b 040 133 00101 000101 b 057 b 056 b 055 b 054 b 053 b 052 b 051 b 050 134 00110 000110 b 067 b 066 b 065 b 064 b 063 b 062 b 061 b 060 135 00111 000111 b 077 b 076 b 075 b 074 b 073 b 072 b 071 b 070 136 01000 001000 b 087 b 086 b 085 b 084 b 083 b 082 b 081 b 080 137 01001 001001 b 097 b 096 b 095 b 094 b 093 b 092 b 091 b 090 138 01010 001010 b 107 b 106 b 105 b 104 b 103 b 102 b 101 b 100 139 01011 001011 b 117 b 116 b 115 b 114 b 113 b 112 b 111 b 110 140 01100 001100 b 127 b 126 b 125 b 124 b 123 b 122 b 121 b 120 141 01101 001101 b 137 b 136 b 135 b 134 b 133 b 132 b 131 b 130 142 01110 001110 b 147 b 146 b 145 b 144 b 143 b 142 b 141 b 140 143 01111 001111 b 157 b 156 b 155 b 154 b 153 b 152 b 151 b 150 144 10000 010000 b 167 b 166 b 165 b 164 b 163 b 162 b 161 b 160 145 10001 010001 b 177 b 176 b 175 b 174 b 173 b 172 b 171 b 170 146 10010 010010 b 187 b 186 b 185 b 184 b 183 b 182 b 181 b 180 147 10011 010011 b 197 b 196 b 195 b 194 b 193 b 192 b 191 b 190 148 10100 010100 b 207 b 206 b 205 b 204 b 203 b 202 b 201 b 200 149 10101 010101 b 217 b 216 b 215 b 214 b 213 b 212 b 211 b 210 150 10110 010110 b 227 b 226 b 225 b 224 b 223 b 222 b 221 b 220 151 10111 010111 b 237 b 236 b 235 b 234 b 233 b 232 b 231 b 230 152 11000 011000 b 247 b 246 b 245 b 244 b 243 b 242 b 241 b 240 153 11001 011001 b 257 b 256 b 255 b 254 b 253 b 252 b 251 b 250 154 11010 011010 b 267 b 266 b 265 b 264 b 263 b 262 b 261 b 260 155 11011 011011 b 277 b 276 b 275 b 274 b 273 b 272 b 271 b 270 156 11100 011100 b 287 b 286 b 285 b 284 b 283 b 282 b 281 b 280 157 11101 011101 b 297 b 296 b 295 b 294 b 293 b 292 b 291 b 290 158 11110 011110 b 307 b 306 b 305 b 304 b 303 b 302 b 301 b 300 159 11111 011111 b 317 b 316 b 315 b 314 b 313 b 312 b 311 b 310 160 table 5.19: look-up tables-5 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.108- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 b input (5-bit) b input (6-bit) b output (8-bit) 16-bit / pixel mode 18-bit / pixel mode 24-bit / pixel mode 65,536 colours 262,144 colours 16,777,216 colours rgbset parameter no input 100000 b 327 b 326 b 325 b 324 b 323 b 322 b 321 b 320 161 no input 100001 b 337 b 336 b 335 b 334 b 333 b 332 b 331 b 330 162 no input 100010 b 347 b 346 b 345 b 344 b 343 b 342 b 341 b 340 163 no input 100011 b 357 b 356 b 355 b 354 b 353 b 352 b 351 b 350 164 no input 100100 b 367 b 366 b 365 b 364 b 363 b 362 b 361 b 360 165 no input 100101 b 377 b 376 b 375 b 374 b 373 b 372 b 371 b 370 166 no input 100110 b 387 b 386 b 385 b 384 b 383 b 382 b 381 b 380 167 no input 100111 b 397 b 396 b 395 b 394 b 393 b 392 b 391 b 390 168 no input 101000 b 407 b 406 b 405 b 404 b 403 b 402 b 401 b 400 169 no input 101001 b 417 b 416 b 415 b 414 b 413 b 412 b 411 b 410 170 no input 101010 b 427 b 426 b 425 b 424 b 423 b 422 b 421 b 420 171 no input 101011 b 437 b 436 b 435 b 434 b 433 b 432 b 431 b 430 172 no input 101100 b 447 b 446 b 445 b 444 b 443 b 442 b 441 b 440 173 no input 101101 b 457 b 456 b 455 b 454 b 453 b 452 b 451 b 450 174 no input 101110 b 467 b 466 b 465 b 464 b 463 b 462 b 461 b 460 175 no input 101111 b 477 b 476 b 475 b 474 b 473 b 472 b 471 b 470 176 no input 110000 b 487 b 486 b 485 b 484 b 483 b 482 b 481 b 480 177 no input 110001 b 497 b 496 b 495 b 494 b 493 b 492 b 491 b 490 178 no input 110010 b 507 b 506 b 505 b 504 b 503 b 502 b 501 b 500 179 no input 110011 b 517 b 516 b 515 b 514 b 513 b 512 b 511 b 510 180 no input 110100 b 527 b 526 b 525 b 524 b 523 b 522 b 521 b 520 181 no input 110101 b 537 b 536 b 535 b 534 b 533 b 532 b 531 b 530 182 no input 110110 b 547 b 546 b 545 b 544 b 543 b 542 b 541 b 540 183 no input 110111 b 557 b 556 b 555 b 554 b 553 b 552 b 551 b 550 184 no input 111000 b 567 b 566 b 565 b 564 b 563 b 562 b 561 b 560 185 no input 111001 b 577 b 576 b 575 b 574 b 573 b 572 b 571 b 570 186 no input 111010 b 587 b 586 b 585 b 584 b 583 b 582 b 581 b 580 187 no input 111011 b 597 b 596 b 595 b 594 b 593 b 592 b 591 b 590 188 no input 111100 b 607 b 606 b 605 b 604 b 603 b 602 b 601 b 600 189 no input 111101 b 617 b 616 b 615 b 614 b 613 b 612 b 611 b 610 190 no input 111110 b 627 b 626 b 625 b 624 b 623 b 622 b 621 b 620 191 no input 111111 b 637 b 636 b 635 b 634 b 633 b 632 b 631 b 630 192 table 5.20: look-up tables-6 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.109- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.7 oscillator the HX8369-A can oscillate an internal r-c oscillator with an internal oscillation resistor (rf). the oscillation frequency is changed according to the uadj [3:0] internal r egister. please refer to osc control register (rb0h). the default frequency is 15mhz. internal display mode internal display mode internal display mode internal display mode fosc foscfosc fosc rgb display mode rgb display mode rgb display mode rgb display mode oscillator oscillatoroscillator oscillator clock clockclock clock pclk pclkpclk pclk cabc cabccabc cabc_ __ _pwm pwmpwm pwm_ __ _clk clkclk clk ( (( (for backlight cabc for backlight cabc for backlight cabc for backlight cabc) )) ) 15 1515 15mhz mhzmhz mhz frequency frequency frequency frequency divider divider divider divider 2 22 2 fs fsfs fs1 11 1[ [[ [1 11 1: :: :0 00 0] ]] ] step up circuit step up circuit step up circuit step up circuit ( ( ( ( for vgh for vghfor vgh for vgh, ,, ,vgl vglvgl vgl) )) ) display displaydisplay display controller controllercontroller controller uadj uadjuadj uadj[ [[ [3 33 3: :: :0 00 0] ]] ] pclk pclkpclk pclk rgb display mode rgb display mode rgb display mode rgb display mode figure 5.25: osc aritecture for truly only http://www..net/ datasheet pdf - http://www..net/
-p.110- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.8 source driver the HX8369-A contains a 1440 channels of source driver (normal s1~s1440; zig-zag s1~s1441) which is used for driving the source line of tft lcd panel. the source driver converts the digital data from gram into the analog voltage for 1440 channels and generates corresponding gray scale voltage output, which can realize a 16.7m colors display simultaneously. since the output circuit of this source driver incorporates an operational amplifier, a positive and a negative voltage can be alternately outputted from each channel. 1 2 1 2 2 3 2 3 3 4 3 4 1438 1439 1439 1440 1440 1441 ... date line #1 date line #2 date line #3 date line #1438 date line #1439 date line #1440 gate#2 gate#4 gate#1 gate#3 date line #1441 1 1 1 1 2 2 2 2 3 3 3 3 1438 1439 1440 ... date line #1 date line #2 date line #3 date line #1438 date line #1439 date line #1440 gate#2 gate#4 gate#1 gate#3 ... ... ... 1438 1438 1438 1439 1439 1439 1440 1440 1440 + + + + - - - - + + + + - + - ... date line #1 date line #2 date line #3 date line #1438 date line #1439 date line #1440 gate#2 gate#4 gate#1 gate#3 ... ... ... - - - + + + - - - 1438 1439 1440 1441 1440 1439 + - + - - + - + + - + - - + + - - + ... date line #1 date line #2 date line #3 date line #1438 date line #1439 date line #1440 gate#2 gate#4 gate#1 gate#3 date line #1441 - + - + - + ... ... ... ... ... ... normal type zigzag type column inversion for truly only http://www..net/ datasheet pdf - http://www..net/
-p.111- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.9 lcd power generation scheme vdd2, vdd3 (2.3v ~ 3.3v) vssd,vssa vsn, vsnc (-4.7v ~ -5.5v) vsp, vspc (4.7v ~ 5.5v) vspr(3.5v ~ (vsp-0.5v)) vsnr (-3.5v ~ (vsn+0.5v)) vref (1.8v) vddd (1.6v ~ 2.0v) dc/dc converter dc/dc converter vdddn (-2.5v) vdd1 (1.65v ~ 3.3v) vgl(-7v~ -13.5v) vgh (+14v~ +20v) vcom(-2v ~ 0v) dsi_vcc (1.65v ~ 3.3v) dsi_ldo (1.2v ~ 1.3v) figure 5.26: lcd power generation scheme for truly only http://www..net/ datasheet pdf - http://www..net/
-p.112- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.10 dc/dc converter circuit 5.10.1 use pfm dc/dc converter the pfm dc-dc converter generates the high voltage level vsp/vsn required for source drivers. HX8369-A contains sub-circuits of the pfm boost converter, including a precision 1.8v reference voltage, comparator, pfm controlling logic, and the output buffer. the boost converter uses a external power transistor to provide maximum efficiency and to minimize the number of external components. the output voltage of the boost converter can be set from 4.7 to 5.5 (vsp) and -4.7 to -5.5v (vsn) d2 vdd3 l1 sw1 d1 vcsw1 vcsw2 vsp vsn pfm controller vref o vspc vsnc d3 figure 5.27: dc/dc converter circuit (pfm type c)Cpccs=10 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.113- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.10.2 use hx5186-a the hx5186-a is highly efficient switching voltage generator circuits that generate the high voltage level vsp/vsn required for source drivers. HX8369-A contains charge pump controller for hx5186-a, including a comparator for vsp/vsn feedback control. hx5186-a can provide maximum efficiency and use minimum number of external components. the output voltage of the boost converter can be set from 4.7 to 5.5 (vsp) and -4.7 to -5.5v (vsn) figure 5.28: dc/dc converter circuit (hx5186-a) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.114- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.11 idle display the HX8369-A supports an idle display mode. the grayscale level to be used is v0 and v64 with r7, g7, b7 decoding, and the other levels (v1-v63) are halted to reduce power consumption. in idle display mode, the gamma-micro-adjustment registers are invalid and only the upper bits of rgb are used for display. 8- bit grayscale d/ a converter output driver output driver output driver r g b lcd graphics (input data) positive polarity register 1 b 3 b 2 b 1 b 0 g 5 g 3 g 2 g 1 g 0 g 4 b 5 b 4 r 5 r 3 r 2 r 1 r 0 r 4 < r > 8- bit grayscale d/ a converter < g > 8- bit grayscale d/ a converter < b > grayscale voltage generator 1 1 negative polarity register rr 6 7 gg 6 7 bb 67 v0p/v0n v1p/v1n v255p/v255n g1_vrp0[5:0] g1_vrp1[5:0] g1_vrp2[5:0] g1_vrp3[5:0] g1_vrp4[5:0] g1_vrp5[5:0] g1_prp0[6:0] g1_prp1[6:0] g1_cgmp0[1:0] g1_ pkp0[4:0] g1_cgmp1[1:0] g1_pkp1[4:0] g1_cgmp2[1:0] g1_pkp2[4:0] g1_cgmp3[1:0] g1_pkp3[4:0] g1_cgmp5 g1_cgmp4 g1_pkp4[4:0] g1_pkp5[4:0] g1_pkp6[4:0] g1_pkp7[4:0] g1_pkp8[4:0] g1_vrn0[5:0] g1_vrn1[5:0] g1_vrn2[5:0] g1_vrn3[5:0] g1_vrn4[5:0] g1_vrn5[5:0] g1_prn0[6:0] g1_prn1[6:0] g1_cgmn0[1:0] g1_ pkn0[4:0] g1_cgmn1[1:0] g1_pkn1[4:0] g1_cgmn2[1:0] g1_pkn2[4:0] g1_cgmn3[1:0] g1_pkn3[4:0] g1_cgmn5 g1_cgmn4 g1_pkn4[4:0] g1_pkn5[4:0] g1_pkn6[4:0] g1_pkn7[4:0] g1_pkn8[4:0] figure 5.29: idle mode grayscale control for truly only http://www..net/ datasheet pdf - http://www..net/
-p.115- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.12 gamma characteristic correction function the HX8369-A incorporates gamma adjustment function for the 16,777,216-color display (256 grayscale for each r, g, b color). gamma adjustment operation is implemented by deciding the16 grayscale levels firstly in gamma adjustment control registers to match the lcd panel. then total 512 grayscale levels are generated in grayscale voltage generator. these registers are available for both polarities. 8- bit grayscale d/ a converter output driver output driver output driver r g b lcd graphics (input data) positive polarity register 8 b 3 b 2 b 1 b 0 g 5 g 3 g 2 g 1 g 0 g 4 b 5 b 4 r 5 r 3 r 2 r 1 r 0 r 4 < r > 8- bit grayscale d/ a converter < g > 8- bit grayscale d/ a converter < b > grayscale voltage generator 8 8 negative polarity register rr 6 7 gg 6 7 bb 67 v0p/v0n v1p/v1n v255p/v255n g1_vrp0[5:0] g1_vrp1[5:0] g1_vrp2[5:0] g1_vrp3[5:0] g1_vrp4[5:0] g1_vrp5[5:0] g1_prp0[6:0] g1_prp1[6:0] g1_cgmp0[1:0] g1_ pkp0[4:0] g1_cgmp1[1:0] g1_pkp1[4:0] g1_cgmp2[1:0] g1_pkp2[4:0] g1_cgmp3[1:0] g1_pkp3[4:0] g1_cgmp5 g1_cgmp4 g1_pkp4[4:0] g1_pkp5[4:0] g1_pkp6[4:0] g1_pkp7[4:0] g1_pkp8[4:0] g1_vrn0[5:0] g1_vrn1[5:0] g1_vrn2[5:0] g1_vrn3[5:0] g1_vrn4[5:0] g1_vrn5[5:0] g1_prn0[6:0] g1_prn1[6:0] g1_cgmn0[1:0] g1_ pkn0[4:0] g1_cgmn1[1:0] g1_pkn1[4:0] g1_cgmn2[1:0] g1_pkn2[4:0] g1_cgmn3[1:0] g1_pkn3[4:0] g1_cgmn5 g1_cgmn4 g1_pkn4[4:0] g1_pkn5[4:0] g1_pkn6[4:0] g1_pkn7[4:0] g1_pkn8[4:0] figure 5.30: grayscale control for truly only http://www..net/ datasheet pdf - http://www..net/
-p.116- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 gamma-characteristics adjustment register this HX8369-A has register groups for specifying a series grayscale voltage that meets the gamma-characteristics for the lcd panel used. these registers are divided into two groups, which correspond to the gradient, amplitude, and macro adjustment of the voltage for the grayscale characteristics. the polarity of each register can be specified independently. (1) offset adjustment registers the offset adjustment variable registers are used to adjust the amplitude of the grayscale voltage. this function is implemented by controlling these variable resisters in the top and bottom of the gamma resister stream for reference gamma voltage generation. these registers are available for both positive and negative polarities. (2) gamma center adjustment registers the gamma center adjustment registers are used to adjust the reference gamma voltage in the middle level of grayscale without changing the dynamic range. this function is implemented by choosing one input of 88 to 1 selector in the gamma resister stream for reference gamma voltage generation. these registers are available for both positive and negative polarities. (3) gamma macro adjustment registers the gamma macro adjustment registers can be used for fine adjustment of the reference gamma voltage. this function is implemented by controlling the 32-to-1 selectors (pkp/n0~5), each of which has 5 inputs and generates one reference voltage output (vg(p/n)3, 7, 19, 25, 32, 38, 44, 56, 60). register groups positive polarity negative polarity description prp0 6-0 prn0 6-0 variable resistor (prp/n0) for center adjustment center adjustment prp1 6-0 prn1 6-0 variable resistor (prp/n1)for center adjustment pkp0 4-0 pkn0 4-0 32-to-1 selector (voltage level of grayscale 3) pkp1 4-0 pkn1 4-0 32-to-1 selector (voltage level of grayscale 7) pkp2 4-0 pkn2 4-0 32-to-1 selector (voltage level of grayscale 19) pkp3 4-0 pkn3 4-0 32-to-1 selector (voltage level of grayscale 25) pkp4 4-0 pkn4 4-0 32-to-1 selector (voltage level of grayscale 32 for positive polarity and grayscale 31 for negative polarity) pkp5 4-0 pkn5 4-0 32-to-1 selector (voltage level of grayscale 38) pkp6 4-0 pkn6 4-0 32-to-1 selector (voltage level of grayscale 44) pkp7 4-0 pkn7 4-0 32-to-1 selector (voltage level of grayscale 56) macro adjustment pkp8 4-0 pkn8 4-0 32-to-1 selector (voltage level of grayscale 60) vrp0 5-0 vrn0 5-0 variable resistor (vrp/n0)for offset adjustment vrp1 5-0 vrn1 5-0 variable resistor (vrp/n1)for offset adjustment vrp2 5-0 vrn2 5-0 variable resistor (vrp/n2)for offset adjustment vrp3 5-0 vrn3 5-0 variable resistor (vrp/n3)for offset adjustment vrp4 5-0 vrn4 5-0 variable resistor (vrp/n4)for offset adjustment offset adjustment vrp5 5-0 vrn5 5-0 variable resistor (vrp/n5)for offset adjustment table 5.21: gamma-adjustment registers for truly only http://www..net/ datasheet pdf - http://www..net/
-p.117- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 gamma resister stream and 8 to 1 selector figure 5.31: gamma resister stream and gamma reference voltage for truly only http://www..net/ datasheet pdf - http://www..net/
-p.118- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1r 3.5r 1r 1r 1r 3r 3.5r 2.5r 2.5r 2.5r 2r 2r 1.8r 1.5r 2r 2r 0 1 2 3 cgmp/n1 v56 v57 v58 v59 v60 1r 3.5r 1r 1r 1r 3r 3.5r 2.5r 2.5r 2.5r 2r 2r 1.8r 1.5r 2r 2r 0 1 2 3 cgmp/n0 v3 v4 v5 v6 v7 v7 v8 v9 v10 v11 v12 v13 1r 4r 1r 1r 1r 3r 4.5r 3r 4r 3r 3r 0 1 2 3 cgmp/n2 1r 1r 3r 2.5r 2.5r 2.5r 2.5r 3r 3r 2.5r 2.5r 2.5r 2.5r v50 v51 v52 v53 v54 v55 v56 1r 4r 1r 1r 1r 3r 4.5r 3r 4r 3r 3r 0 1 2 3 cgmp/n3 1r 1r 3r 2.5r 2.5r 2.5r 2.5r 3r 3r 2.5r 2.5r 2.5r 2.5r 1r 1r 1r 1r 0 1 cgmp/n5 1r 1r 1.5r 1r 1r 1r 1r 1r v44 v45 v46 v47 v48 v49 v50 1r 1r 1r 1r 0 1 cgmp/n4 1r 1r 1.5r 1r 1r 1r 1r 1r v13 v14 v15 v16 v17 v18 v19 figure 5.32: gamma resister stream for truly only http://www..net/ datasheet pdf - http://www..net/
-p.119- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 variable resister there are two types of variable resistors, one is for center adjustment and the other is for offset adjustment. the resistances are decided by setting values in the center adjustment, offset adjustment registers. their relationships are shown below. value in register vr(p/n)0 5-0 resistance vr(p/n)0 value in register vr(p/n)1 5-0 resistance vr(p/n)1 value in register vr(p/n)2 5-0 resistance vr(p/n)2 000000 0r 000000 0r 000000 0r 000001 20r 000001 2r 000001 2r 000010 22r 000010 4r 000010 4r 000011 24r 000011 6r 000011 6r 011101 76r 011101 58r 011101 58r 011110 78r 011110 60r 011110 60r 011111 80r 011111 62r 011111 62r 100000 82r 100000 64r 100000 64r 100001 84r 100001 66r 100001 66r 100010 86r 100010 68r 100010 68r 111101 140r 111101 122r 111101 122r 111110 142r 111110 124r 111110 124r 111111 144r 111111 126r 111111 126r value in register vr(p/n)3 5-0 resistance vr(p/n)3 value in register vr(p/n)4 5-0 resistance vr(p/n)4 value in register vr(p/n)5 5-0 resistance vr(p/n)2 000000 0r 000000 0r 000000 0r 000001 2r 000001 2r 000001 2r 000010 4r 000010 4r 000010 4r 011101 58r 011101 58r 011101 58r 011110 60r 011110 60r 011110 60r 011111 62r 011111 62r 011111 62r 100000 64r 100000 64r 100000 64r 100001 66r 100001 66r 100001 66r 100010 68r 100010 68r 100010 68r 111100 120r 111100 120r 111100 120r 111101 122r 111101 122r 111101 122r 111110 124r 111110 124r 111110 124r 111111 126r 111111 126r 111111 144r table 5.22: offset adjustment 0~5 value in register pr(p/n)0 6-0 resistance pr(p/n)0 value in register pr(p/n)1 6-0 resistance pr(p/n)1 0000000 0r 0000000 0r 0000001 2r 0000001 2r 0000010 4r 0000010 4r 1010101 170r 1010101 170r 1010110 172r 1010110 172r 1010111 174r 1010111 174r table 5.23: center adjustment for truly only http://www..net/ datasheet pdf - http://www..net/
-p.120- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 the grayscale levels are determined by the following formulas: reference voltage macro adjustment value vinp0 formula vrp0 5-0 = 000000 vspr vrp0 5-0 = 000001 ((450r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000010 ((450r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000011 ((450r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000100 ((450r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000101 ((450r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000110 ((450r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 000111 ((450r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001000 ((450r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001001 ((450r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001010 ((450r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001011 ((450r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001100 ((450r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001101 ((450r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001110 ((450r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 001111 ((450r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010000 ((450r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010001 ((450r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010010 ((450r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010011 ((450r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010100 ((450r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010101 ((450r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010110 ((450r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 010111 ((450r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011000 ((450r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011001 ((450r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011010 ((450r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011011 ((450r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011100 ((450r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011101 ((450r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011110 ((450r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 011111 ((450r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100000 ((450r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100001 ((450r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100010 ((450r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100011 ((450r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100100 ((450r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100101 ((450r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100110 ((450r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 100111 ((450r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101000 ((450r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101001 ((450r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101010 ((450r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101011 ((450r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101100 ((450r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101101 ((450r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101110 ((450r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 101111 ((450r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110000 ((450r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110001 ((450r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110010 ((450r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110011 ((450r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110100 ((450r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110101 ((450r - 124r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110110 ((450r - 126r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 110111 ((450r - 128r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111000 ((450r - 130r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111001 ((450r - 132r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111010 ((450r - 134r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111011 ((450r - 136r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111100 ((450r - 138r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111101 ((450r - 140r) / 450r) * (vspr - vgsp) + vgsp vrp0 5-0 = 111110 ((450r - 142r) / 450r) * (vspr - vgsp) + vgsp vinp0 vrp0 5-0 = 111111 ((450r - 144r) / 450r) * (vspr - vgsp) + vgsp table 5.24: vinp0 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.121- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp1 formula vrp1 5 - 0 = 000000 (430r / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000001 ((430r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000010 ((430r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000011 ((430r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000100 ((430r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000101 ((430r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000110 ((430r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 000111 ((430r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001000 ((430r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001001 ((430r - 18r ) / 450r) * (vspr - vgsp ) + vgsp vrp1 5 - 0 = 001010 ((430r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001011 ((430r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001100 ((430r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001101 ((430r - 26r ) / 450r) * (vsp r - vgsp) + vgsp vrp1 5 - 0 = 001110 ((430r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 001111 ((430r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010000 ((430r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010001 ((430r - 34r ) / 450r ) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010010 ((430r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010011 ((430r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010100 ((430r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010101 ((430r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010110 ((430r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 010111 ((430r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011000 ((430r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011001 ((430 r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011010 ((430r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011011 ((430r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011100 ((430r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 0111 01 ((430r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011110 ((430r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 011111 ((430r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100000 ((430r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100001 ((430r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100010 ((430r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100011 ((430r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100100 ((430r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100101 ((430r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100110 ((430r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 100111 ((430r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101000 ((430r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101001 ((430r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101010 ((430r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101011 ((430r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101100 ((430r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101101 ((430r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101110 ((430r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 101111 ((430r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110000 ((430r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110001 ((430r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110010 ((430r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110011 ((430r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110100 ((430r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110101 ((430r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110110 ((430r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 110111 ((430r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111000 ((430r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111001 ((430r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111010 ((430r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111011 ((430r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111100 ((430r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111101 ((430r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp1 5 - 0 = 111110 ((430r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp1 vrp1 5 - 0 = 111111 ((430r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.25: vinp1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.122- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp2 formula vrp2 5 - 0 = 000000 (420r / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000001 ((420r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000 010 ((420r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000011 ((420r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000100 ((420r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000101 ((420r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000110 ((420r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 000111 ((420r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001000 ((420r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001001 ((420r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001010 ((420r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001011 ((420r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001100 ((420r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001101 ((420r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001110 ((420r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 001111 ((420r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010000 ((420r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010001 ((420r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010010 ((420r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010011 ((420r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010100 ((420r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010101 ((420r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010110 ((420r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 010111 ((420r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011000 ((420r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011001 ((420r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011010 ((420r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011011 ((420r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011100 ((420r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011101 ((420r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011110 ((420r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 011111 ((420r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100000 ((420r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100001 ((420r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100010 ((420r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100011 ((420r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100100 ((420r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100101 ((420r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100110 ((420r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 100111 ((420r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101000 ((420r - 80r ) / 450r) * (vspr - vgsp) + vgsp vr p2 5 - 0 = 101001 ((420r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101010 ((420r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101011 ((420r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101100 ((420r - 88r ) / 450r) * (vspr - vgsp) + v gsp vrp2 5 - 0 = 101101 ((420r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101110 ((420r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 101111 ((420r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110000 ((420r - 96r ) / 450r) * (vspr - v gsp) + vgsp vrp2 5 - 0 = 110001 ((420r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110010 ((420r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110011 ((420r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110100 ((420r - 104r) / 450r) * ( vspr - vgsp) + vgsp vrp2 5 - 0 = 110101 ((420r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110110 ((420r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 110111 ((420r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111000 ((420r - 112r) / 4 50r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111001 ((420r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111010 ((420r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111011 ((420r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111100 ((420r - 1 20r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111101 ((420r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp2 5 - 0 = 111110 ((420r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp2 vrp2 5 - 0 = 111111 ((420r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.26: vinp2 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.123- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp14 formula vrp3 5 - 0 = 000000 (156r / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000001 ((156r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000010 ((156 r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000011 ((156r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000100 ((156r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000101 ((156r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 0001 10 ((156r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 000111 ((156r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001000 ((156r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001001 ((156r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001010 ((156r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001011 ((156r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001100 ((156r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001101 ((156r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001110 ((156r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 001111 ((156r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010000 ((156r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010001 ((156r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010010 ((156r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010011 ((156r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010100 ((156r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010101 ((156r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010110 ((156r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 010111 ((156r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011000 ((156r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011001 ((156r - 50r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011010 ((156r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011011 ((156r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011100 ((156r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011101 ((156r - 58r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011110 ((156r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 011111 ((156r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100000 ((156r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100001 ((156r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100010 ((156r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100011 ((156r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100100 ((156r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100101 ((156r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100110 ((156r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 100111 ((156r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101000 ((156r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101001 ((156r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101010 ((156r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101011 ((156r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101100 ((156r - 88r ) / 450r) * (vspr - vgsp) + vgsp v rp3 5 - 0 = 101101 ((156r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101110 ((156r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 101111 ((156r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110000 ((156r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110001 ((156r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110010 ((156r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110011 ((156r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110100 ((156r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110101 ((156r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110110 ((156r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 110111 ((156r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111000 ((156r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111001 ((156r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111010 ((156r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111011 ((156r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111100 ((156r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111101 ((156r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp3 5 - 0 = 111110 ((156r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp14 vrp3 5 - 0 = 111111 ((156r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.27: vinp14 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.124- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp15 formula vrp4 5 - 0 = 000000 (146r / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000001 ((146r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000010 ((146r - 4 r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000011 ((146r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000100 ((146r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000101 ((146r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000110 (( 146r - 12r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 000111 ((146r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001000 ((146r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001001 ((146r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 0 01010 ((146r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001011 ((146r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001100 ((146r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001101 ((146r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001110 ((146r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 001111 ((146r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010000 ((146r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010001 ((146r - 34r ) / 450r) * (vspr - vgsp) + vgs p vrp4 5 - 0 = 010010 ((146r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010011 ((146r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010100 ((146r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010101 ((146r - 42r ) / 450r) * (vspr - vgs p) + vgsp vrp4 5 - 0 = 010110 ((146r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 010111 ((146r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011000 ((146r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011001 ((146r - 50r ) / 450r) * (vs pr - vgsp) + vgsp vrp4 5 - 0 = 011010 ((146r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011011 ((146r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011100 ((146r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011101 ((146r - 58r ) / 450 r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011110 ((146r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 011111 ((146r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100000 ((146r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100001 ((146r - 66r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100010 ((146r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100011 ((146r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100100 ((146r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100101 ((14 6r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100110 ((146r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 100111 ((146r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101000 ((146r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101 001 ((146r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101010 ((146r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101011 ((146r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101100 ((146r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101101 ((146r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101110 ((146r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 101111 ((146r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110000 ((146r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110001 ((146r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110010 ((146r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110011 ((146r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110100 ((146r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110101 ((146r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110110 ((146r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 110111 ((146r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111000 ((146r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111001 ((146r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111010 ((146r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111011 ((146r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111100 ((146r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111101 ((146r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp4 5 - 0 = 111110 ((146r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp15 vrp4 5 - 0 = 111111 ((146r - 126r) / 450r) * (vspr - vgsp) + vgsp table 5.28: vinp15 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.125- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp16 formula vrp5 5 - 0 = 000000 (144r / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000001 ((144r - 2r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000010 ((144r - 4r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000011 ((144r - 6r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000100 ((144r - 8r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000101 ((144r - 10r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000110 ((144r - 12 r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 000111 ((144r - 14r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001000 ((144r - 16r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001001 ((144r - 18r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001010 ((1 44r - 20r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001011 ((144r - 22r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001100 ((144r - 24r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001101 ((144r - 26r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 00 1110 ((144r - 28r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 001111 ((144r - 30r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010000 ((144r - 32r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010001 ((144r - 34r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010010 ((144r - 36r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010011 ((144r - 38r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010100 ((144r - 40r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010101 ((144r - 42r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010110 ((144r - 44r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 010111 ((144r - 46r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011000 ((144r - 48r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011001 ((144r - 50r ) / 450r) * (vspr - vgsp ) + vgsp vrp5 5 - 0 = 011010 ((144r - 52r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011011 ((144r - 54r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011100 ((144r - 56r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011101 ((144r - 58r ) / 450r) * (vsp r - vgsp) + vgsp vrp5 5 - 0 = 011110 ((144r - 60r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 011111 ((144r - 62r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100000 ((144r - 64r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100001 ((144r - 66r ) / 450r ) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100010 ((144r - 68r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100011 ((144r - 70r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100100 ((144r - 72r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100101 ((144r - 74r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100110 ((144r - 76r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 100111 ((144r - 78r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101000 ((144r - 80r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101001 ((144 r - 82r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101010 ((144r - 84r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101011 ((144r - 86r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101100 ((144r - 88r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 1011 01 ((144r - 90r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101110 ((144r - 92r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 101111 ((144r - 94r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110000 ((144r - 96r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110001 ((144r - 98r ) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110010 ((144r - 100r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110011 ((144r - 102r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110100 ((144r - 104r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110101 ((144r - 106r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110110 ((144r - 108r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 110111 ((144r - 110r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111000 ((144r - 112r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111001 ((144r - 114r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111010 ((144r - 116r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111011 ((144r - 118r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111100 ((144r - 120r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111101 ((144r - 122r) / 450r) * (vspr - vgsp) + vgsp vrp5 5 - 0 = 111110 ((144r - 124r) / 450r) * (vspr - vgsp) + vgsp vinp16 vrp5 5 - 0 = 111111 vgsp table 5.29: vinp16 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.126- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp5 formula prp0 6-0 = 0000000 (350r / 450r) (vspr - vgsp) + vgsp prp0 6-0 = 0000001 ((350r - 2r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000010 ((350r - 4r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000011 ((350r C 6r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000100 ((350r C 8r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000101 ((350r C 10r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000110 ((350r C 12r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0000111 ((350r - 14r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001000 ((350r C 16r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001001 ((350r C 18r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001010 ((350r C 20r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001011 ((350r C 22r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001100 ((350r C 24r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001101 ((350r C 26r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001110 ((350r C 28r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0001111 ((350r C 30r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010000 ((350r C 32r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010001 ((350r - 34r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010010 ((350r C 36r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010011 ((350r C 38r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010100 ((350r C 40r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010101 ((350r C 42r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010110 ((350r C 44r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0010111 ((350r C 46r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011000 ((350r C 48r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011001 ((350r C 50r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011010 ((350r C 52r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011011 ((350r - 54r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011100 ((350r C 56r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011101 ((350r C 58r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011110 ((350r C 60r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0011111 ((350r C 62r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100000 ((350r - 64r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100001 ((350r C 66r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100010 ((350r C 68r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100011 ((350r C 70r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100100 ((350r C 72r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100101 ((350r C 74r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100110 ((350r C 76r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0100111 ((350r C 78r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101000 ((350r C 80r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101001 ((350r C 82r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101010 ((350r - 84r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101011 ((350r C 86r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101100 ((350r C 88r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101101 ((350r C 90r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101110 ((350r C 92r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0101111 ((350r C 94r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110000 ((350r C 96r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110001 ((350r C 98r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110010 ((350r C 100r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110011 ((350r C 102r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110100 ((350r C 104r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110101 ((350r C 106r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110110 ((350r C 108r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0110111 ((350r C 110r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111000 ((350r C 112r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111001 ((350r C 114r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111010 ((350r C 116r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111011 ((350r C 118r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111100 ((350r C 120r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111101 ((350r C 122r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111110 ((350r - 124r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 0111111 ((350r C 126r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000000 ((350r C 128r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000001 ((350r C 130r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000010 ((350r - 132r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000011 ((350r C 134r) / 450r) * (vspr - vgsp) + vgsp vinp5 prp0 6-0 = 1000100 ((350r C 136r) / 450r) * (vspr - vgsp) + vgsp for truly only http://www..net/ datasheet pdf - http://www..net/
-p.127- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 prp0 6-0 = 1000101 ((350r C 138r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000110 ((350r C 140r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1000111 ((350r C 142r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001000 ((350r C 144r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001001 ((350r C 146r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001010 ((350r C 148r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001011 ((350r C 150r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001100 ((350r - 152r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001101 ((350r C 154r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001110 ((350r C 156r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1001111 ((350r C 158r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010000 ((350r C 160r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010001 ((350r C 162r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010010 ((350r C 164r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010011 ((350r C 166r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010100 ((350r C 168r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010101 ((350r C 170r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010110 ((350r C 172r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1010111 ((350r - 174r) / 450r) * (vspr - vgsp) + vgsp prp0 6-0 = 1011000 inhibit prp0 6-0 = 1011001 inhibit prp0 6-0 = 1011010 inhibit prp0 6-0 = 1011011 inhibit prp0 6-0 = 1011100 inhibit prp0 6-0 = 1011101 inhibit prp0 6-0 = 1011110 inhibit prp0 6-0 = 1011111 inhibit prp0 6-0 = 1100000 inhibit prp0 6-0 = 1100001 inhibit prp0 6-0 = 1100010 inhibit prp0 6-0 = 1100011 inhibit prp0 6-0 = 1100100 inhibit prp0 6-0 = 1100101 inhibit prp0 6-0 = 1100110 inhibit prp0 6-0 = 1100111 inhibit prp0 6-0 = 1101000 inhibit prp0 6-0 = 1101001 inhibit prp0 6-0 = 1101010 inhibit prp0 6-0 = 1101011 inhibit prp0 6-0 = 1101100 inhibit prp0 6-0 = 1101101 inhibit prp0 6-0 = 1101110 inhibit prp0 6-0 = 1101111 inhibit prp0 6-0 = 1110000 inhibit prp0 6-0 = 1110001 inhibit prp0 6-0 = 1110010 inhibit prp0 6-0 = 1110011 inhibit prp0 6-0 = 1110100 inhibit prp0 6-0 = 1110101 inhibit prp0 6-0 = 1110110 inhibit prp0 6-0 = 1110111 inhibit prp0 6-0 = 1111000 inhibit prp0 6-0 = 1111001 inhibit prp0 6-0 = 1111010 inhibit prp0 6-0 = 1111011 inhibit prp0 6-0 = 1111100 inhibit prp0 6-0 = 1111101 inhibit prp0 6-0 = 1111110 inhibit prp0 6-0 = 1111111 inhibit table 5.30: vinp5 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.128- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp11 formula prp1 6-0 = 0000000 (274r / 450r) (vspr - vgsp) + vgsp prp1 6-0 = 0000001 ((274r - 2r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000010 ((274r - 4r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000011 ((274r C 6r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000100 ((274r C 8r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000101 ((274r C 10r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000110 ((274r C 12r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0000111 ((274r - 14r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001000 ((274r C 16r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001001 ((274r C 18r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001010 ((274r C 20r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001011 ((274r C 22r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001100 ((274r C 24r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001101 ((274r C 26r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001110 ((274r C 28r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0001111 ((274r C 30r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010000 ((274r C 32r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010001 ((274r - 34r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010010 ((274r C 36r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010011 ((274r C 38r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010100 ((274r C 40r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010101 ((274r C 42r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010110 ((274r C 44r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0010111 ((274r C 46r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011000 ((274r C 48r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011001 ((274r C 50r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011010 ((274r C 52r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011011 ((274r - 54r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011100 ((274r C 56r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011101 ((274r C 58r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011110 ((274r C 60r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0011111 ((274r C 62r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100000 ((274r - 64r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100001 ((274r C 66r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100010 ((274r C 68r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100011 ((274r C 70r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100100 ((274r C 72r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100101 ((274r C 74r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100110 ((274r C 76r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0100111 ((274r C 78r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101000 ((274r C 80r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101001 ((274r C 82r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101010 ((274r - 84r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101011 ((274r C 86r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101100 ((274r C 88r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101101 ((274r C 90r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101110 ((274r C 92r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0101111 ((274r C 94r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110000 ((274r C 96r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110001 ((274r C 98r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110010 ((274r C 100r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110011 ((274r C 102r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110100 ((274r C 104r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110101 ((274r C 106r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110110 ((274r C 108r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0110111 ((274r C 110r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111000 ((274r C 112r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111001 ((274r C 114r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111010 ((274r C 116r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111011 ((274r C 118r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111100 ((274r C 120r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111101 ((274r C 122r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111110 ((274r - 124r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 0111111 ((274r C 126r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000000 ((274r C 128r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000001 ((274r C 130r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000010 ((274r - 132r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000011 ((274r C 134r) / 450r) * (vspr - vgsp) + vgsp vinp11 prp1 6-0 = 1000100 ((274r C 136r) / 450r) * (vspr - vgsp) + vgsp for truly only http://www..net/ datasheet pdf - http://www..net/
-p.129- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 prp1 6-0 = 1000101 ((274r C 138r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000110 ((274r C 140r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1000111 ((274r C 142r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001000 ((274r C 144r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001001 ((274r C 146r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001010 ((274r C 148r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001011 ((274r C 150r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001100 ((274r - 152r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001101 ((274r C 154r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001110 ((274r C 156r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1001111 ((274r C 158r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010000 ((274r C 160r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010001 ((274r C 162r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010010 ((274r C 164r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010011 ((274r C 166r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010100 ((274r C 168r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010101 ((274r C 170r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010110 ((274r C 172r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1010111 ((274r - 174r) / 450r) * (vspr - vgsp) + vgsp prp1 6-0 = 1011000 inhibit prp1 6-0 = 1011001 inhibit prp1 6-0 = 1011010 inhibit prp1 6-0 = 1011011 inhibit prp1 6-0 = 1011100 inhibit prp1 6-0 = 1011101 inhibit prp1 6-0 = 1011110 inhibit prp1 6-0 = 1011111 inhibit prp1 6-0 = 1100000 inhibit prp1 6-0 = 1100001 inhibit prp1 6-0 = 1100010 inhibit prp1 6-0 = 1100011 inhibit prp1 6-0 = 1100100 inhibit prp1 6-0 = 1100101 inhibit prp1 6-0 = 1100110 inhibit prp1 6-0 = 1100111 inhibit prp1 6-0 = 1101000 inhibit prp1 6-0 = 1101001 inhibit prp1 6-0 = 1101010 inhibit prp1 6-0 = 1101011 inhibit prp1 6-0 = 1101100 inhibit prp1 6-0 = 1101101 inhibit prp1 6-0 = 1101110 inhibit prp1 6-0 = 1101111 inhibit prp1 6-0 = 1110000 inhibit prp1 6-0 = 1110001 inhibit prp1 6-0 = 1110010 inhibit prp1 6-0 = 1110011 inhibit prp1 6-0 = 1110100 inhibit prp1 6-0 = 1110101 inhibit prp1 6-0 = 1110110 inhibit prp1 6-0 = 1110111 inhibit prp1 6-0 = 1111000 inhibit prp1 6-0 = 1111001 inhibit prp1 6-0 = 1111010 inhibit prp1 6-0 = 1111011 inhibit prp1 6-0 = 1111100 inhibit prp1 6-0 = 1111101 inhibit prp1 6-0 = 1111110 inhibit prp1 6-0 = 1111111 inhibit table 5.31: vinp11 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.130- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp3 formula pkp0 4-0 = 00000 (47r / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00001 ((47r C 1r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00010 ((47r C 2r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00011 ((47r C 3r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00100 ((47r C 4r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00101 ((47r C 5r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00110 ((47r C 6r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 00111 ((47r C 7r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01000 ((47r C 8r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01001 ((47r C 9r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01010 ((47r - 10r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01011 ((47r - 11r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01100 ((47r - 12r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01101 ((47r - 13r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01110 ((47r - 14r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 01111 ((47r - 15r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10000 ((47r - 16r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10001 ((47r - 17r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10010 ((47r - 18r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10011 ((47r - 19r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10100 ((47r - 20r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10101 ((47r - 21r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10110 ((47r - 22r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 10111 ((47r - 23r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11000 ((47r - 24r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11001 ((47r - 25r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11010 ((47r - 26r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11011 ((47r - 27r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11100 ((47r - 28r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11101 ((47r - 29r) / 48r) * (vinp2 - vinp5) + vinp5 pkp0 4-0 = 11110 ((47r - 30r) / 48r) * (vinp2 - vinp5) + vinp5 vinp3 pkp0 4-0 = 11111 ((47r - 31r) / 48r) * (vinp2 - vinp5) + vinp5 table 5.32: vinp3 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.131- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp4 formula pkp1 4-0 = 00000 (32r / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00001 ((32r - 1r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00010 ((32r - 2r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00011 ((32r - 3r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00100 ((32r - 4r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00101 ((32r - 5r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00110 ((32r - 6r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 00111 ((32r - 7r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01000 ((32r - 8r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01001 ((32r - 9r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01010 ((32r - 10r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01011 ((32r - 11r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01100 ((32r - 12r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01101 ((32r - 13r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01110 ((32r - 14r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 01111 ((32r - 15r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10000 ((32r - 16r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10001 ((32r - 17r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10010 ((32r - 18r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10011 ((32r - 19r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10100 ((32r - 20r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10101 ((32r - 21r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10110 ((32r - 22r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 10111 ((32r - 23r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11000 ((32r - 24r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11001 ((32r - 25r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11010 ((32r - 26r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11011 ((32r - 27r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11100 ((32r - 28r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11101 ((32r - 29r) / 48r) * (vinp2 - vinp5) + vinp5 pkp1 4-0 = 11110 ((32r - 30r) / 48r) * (vinp2 - vinp5) + vinp5 vinp4 pkp1 4-0 = 11111 ((32r - 31r) / 48r) * (vinp2 - vinp5) + vinp5 table 5.33: vinp4 reference voltage macro adjustment value vinp6 formula pkp2 4-0 = 00000 (220r / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00001 ((220r - 3r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00010 ((220r - 6r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00011 ((220r - 9r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00100 ((220r - 12r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00101 ((220r - 15r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00110 ((220r - 18r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 00111 ((220r - 21r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01000 ((220r - 24r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01001 ((220r - 27r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01010 ((220r - 30r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01011 ((220r - 33r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01100 ((220r - 36r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01101 ((220r - 39r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01110 ((220r - 42r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 01111 ((220r - 45r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10000 ((220r - 48r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10001 ((220r - 51r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10010 ((220r - 54r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10011 ((220r - 57r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10100 ((220r - 60r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10101 ((220r - 63r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10110 ((220r - 66r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 10111 ((220r - 69r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11000 ((220r - 72r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11001 ((220r - 75r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11010 ((220r - 78r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11011 ((220r - 81r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11100 ((220r - 84r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11101 ((220r - 87r) / 223r) * (vinp5 - vinp11) + vinp11 pkp2 4-0 = 11110 ((220r - 90r) / 223r) * (vinp5 - vinp11) + vinp11 vinp6 pkp2 4-0 = 11111 ((220r - 93r) / 223r) * (vinp5 - vinp11) + vinp11 table 5.34: vinp6 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.132- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp7 formula pkp3 4-0 = 00000 (193r / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00001 ((193r - 3r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00010 ((193r - 6r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00011 ((193r - 9r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00100 ((193r - 12r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00101 ((193r - 15r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00110 ((193r - 18r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 00111 ((193r - 21r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01000 ((193r - 24r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01001 ((193r - 27r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01010 ((193r - 30r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01011 ((193r - 33r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01100 ((193r - 36r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01101 ((193r - 39r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01110 ((193r - 42r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 01111 ((193r - 45r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10000 ((193r - 48r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10001 ((193r - 51r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10010 ((193r - 54r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10011 ((193r - 57r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10100 ((193r - 60r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10101 ((193r - 63r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10110 ((193r - 66r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 10111 ((193r - 69r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11000 ((193r - 72r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11001 ((193r - 75r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11010 ((193r - 78r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11011 ((193r - 81r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11100 ((193r - 84r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11101 ((193r - 87r) / 223r) * (vinp5 - vinp11) + vinp11 pkp3 4-0 = 11110 ((193r - 90r) / 223r) * (vinp5 - vinp11) + vinp11 vinp7 pkp3 4-0 = 11111 ((193r - 93r) / 223r) * (vinp5 - vinp11) + vinp11 table 5.35: vinp7 reference voltage macro adjustment value vinp8 formula pkp4 4-0 = 00000 (158r / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00001 ((158r - 3r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00010 ((158r - 6r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00011 ((158r - 9r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00100 ((158r - 12r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00101 ((158r - 15r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00110 ((158r - 18r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 00111 ((158r - 21r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01000 ((158r - 24r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01001 ((158r - 27r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01010 ((158r - 30r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01011 ((158r - 33r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01100 ((158r - 36r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01101 ((158r - 39r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01110 ((158r - 42r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 01111 ((158r - 45r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10000 ((158r - 48r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10001 ((158r - 51r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10010 ((158r - 54r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10011 ((158r - 57r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10100 ((158r - 60r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10101 ((158r - 63r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10110 ((158r - 66r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 10111 ((158r - 69r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11000 ((158r - 72r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11001 ((158r - 75r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11010 ((158r - 78r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11011 ((158r - 81r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11100 ((158r - 84r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11101 ((158r - 87r) / 223r) * (vinp5 - vinp11) + vinp11 pkp4 4-0 = 11110 ((158r - 90r) / 223r) * (vinp5 - vinp11) + vinp11 vinp8 pkp4 4-0 = 11111 ((158r - 93r) / 223r) * (vinp5 - vinp11) + vinp11 table 5.36: vinp8 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.133- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp9 formula pkp5 4-0 = 00000 (123r / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00001 ((123r - 3r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00010 ((123r - 6r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00011 ((123r - 9r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00100 ((123r - 12r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00101 ((123r - 15r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00110 ((123r - 18r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 00111 ((123r - 21r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01000 ((123r - 24r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01001 ((123r - 27r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01010 ((123r - 30r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01011 ((123r - 33r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01100 ((123r - 36r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01101 ((123r - 39r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01110 ((123r - 42r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 01111 ((123r - 45r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10000 ((123r - 48r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10001 ((123r - 51r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10010 ((123r - 54r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10011 ((123r - 57r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10100 ((123r - 60r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10101 ((123r - 63r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10110 ((123r - 66r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 10111 ((123r - 69r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11000 ((123r - 72r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11001 ((123r - 75r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11010 ((123r - 78r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11011 ((123r - 81r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11100 ((123r - 84r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11101 ((123r - 87r) / 223r) * (vinp5 - vinp11) + vinp11 pkp5 4-0 = 11110 ((123r - 90r) / 223r) * (vinp5 - vinp11) + vinp11 vinp9 pkp5 4-0 = 11111 ((123r - 93r) / 223r) * (vinp5 - vinp11) + vinp11 table 5.37: vinp9 reference voltage macro adjustment value vinp10 formula pkp6 4-0 = 00000 (96r / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00001 ((96r - 3r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00010 ((96r - 6r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00011 ((96r - 9r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00100 ((96r - 12r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00101 ((96r - 15r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00110 ((96r - 18r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 00111 ((96r - 21r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01000 ((96r - 24r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01001 ((96r - 27r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01010 ((96r - 30r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01011 ((96r - 33r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01100 ((96r - 36r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01101 ((96r - 39r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01110 ((96r - 42r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 01111 ((96r - 45r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10000 ((96r - 48r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10001 ((96r - 51r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10010 ((96r - 54r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10011 ((96r - 57r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10100 ((96r - 60r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10101 ((96r - 63r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10110 ((96r - 66r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 10111 ((96r - 69r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11000 ((96r - 72r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11001 ((96r - 75r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11010 ((96r - 78r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11011 ((96r - 81r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11100 ((96r - 84r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11101 ((96r - 87r) / 223r) * (vinp5 - vinp11) + vinp11 pkp6 4-0 = 11110 ((96r - 90r) / 223r) * (vinp5 - vinp11) + vinp11 vinp10 pkp6 4-0 = 11111 ((96r - 93r) / 223r) * (vinp5 - vinp11) + vinp11 table 5.38: vinp10 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.134- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinp12 formula pkp7 4-0 = 00000 (47r / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00001 ((47r - 1r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00010 ((47r - 2r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00011 ((47r - 3r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00100 ((47r - 4r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00101 ((47r - 5r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00110 ((47r - 6r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 00111 ((47r - 7r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01000 ((47r - 8r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01001 ((47r - 9r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01010 ((47r - 10r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01011 ((47r - 11r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01100 ((47r - 12r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01101 ((47r - 13r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01110 ((47r - 14r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 01111 ((47r - 15r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10000 ((47r - 16r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10001 ((47r - 17r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10010 ((47r - 18r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10011 ((47r - 19r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10100 ((47r - 20r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10101 ((47r - 21r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10110 ((47r - 22r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 10111 ((47r - 23r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11000 ((47r - 24r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11001 ((47r - 25r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11010 ((47r - 26r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11011 ((47r - 27r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11100 ((47r - 28r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11101 ((47r - 29r) / 48r) * (vinp11 - vinp14) + vinp14 pkp7 4-0 = 11110 ((47r - 30r) / 48r) * (vinp11 - vinp14) + vinp14 vinp12 pkp7 4-0 = 11111 ((47r - 31r) / 48r) * (vinp11 - vinp14) + vinp14 table 5.39: vinp12 reference voltage macro adjustment value vinp13 formula pkp8 4-0 = 00000 (32r / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00001 ((32r - 1r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00010 ((32r - 2r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00011 ((32r - 3r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00100 ((32r - 4r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00101 ((32r - 5r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00110 ((32r - 6r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 00111 ((32r - 7r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01000 ((32r - 8r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01001 ((32r - 9r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01010 ((32r - 10r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01011 ((32r - 11r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01100 ((32r - 12r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01101 ((32r - 13r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01110 ((32r - 14r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 01111 ((32r - 15r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10000 ((32r - 16r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10001 ((32r - 17r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10010 ((32r - 18r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10011 ((32r - 19r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10100 ((32r - 20r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10101 ((32r - 21r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10110 ((32r - 22r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 10111 ((32r - 23r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11000 ((32r - 24r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11001 ((32r - 25r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11010 ((32r - 26r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11011 ((32r - 27r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11100 ((32r - 28r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11101 ((32r - 29r) / 48r) * (vinp11 - vinp14) + vinp14 pkp8 4-0 = 11110 ((32r - 30r) / 48r) * (vinp11 - vinp14) + vinp14 vinp13 pkp8 4-0 = 11111 ((32r - 31r) / 48r) * (vinp11 - vinp14) + vinp14 table 5.40: vinp13 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.135- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn0 formula vrn0 5-0 = 000000 vsnr vrn0 5-0 = 000001 ((450r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000010 ((450r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000011 ((450r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000100 ((450r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000101 ((450r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000110 ((450r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 000111 ((450r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001000 ((450r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001001 ((450r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001010 ((450r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001011 ((450r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001100 ((450r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001101 ((450r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001110 ((450r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 001111 ((450r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010000 ((450r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010001 ((450r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010010 ((450r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010011 ((450r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010100 ((450r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010101 ((450r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010110 ((450r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 010111 ((450r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011000 ((450r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011001 ((450r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011010 ((450r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011011 ((450r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011100 ((450r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011101 ((450r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011110 ((450r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 011111 ((450r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100000 ((450r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100001 ((450r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100010 ((450r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100011 ((450r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100100 ((450r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100101 ((450r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100110 ((450r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 100111 ((450r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101000 ((450r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101001 ((450r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101010 ((450r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101011 ((450r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101100 ((450r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101101 ((450r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101110 ((450r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 101111 ((450r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110000 ((450r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110001 ((450r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110010 ((450r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110011 ((450r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110100 ((450r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110101 ((450r - 124r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110110 ((450r - 126r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 110111 ((450r - 128r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111000 ((450r - 130r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111001 ((450r - 132r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111010 ((450r - 134r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111011 ((450r - 136r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111100 ((450r - 138r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111101 ((450r - 140r) / 450r) * (vsnr - vgsn) + vgsn vrn0 5-0 = 111110 ((450r - 142r) / 450r) * (vsnr - vgsn) + vgsn vinn0 vrn0 5-0 = 111111 ((450r - 144r) / 450r) * (vsnr - vgsn) + vgsn table 5.41: vinn0 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.136- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn1 formula vrn1 5 - 0 = 00 0000 (430r / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000001 ((430r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000010 ((430r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000011 ((430r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000 100 ((430r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000101 ((430r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000110 ((430r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 000111 ((430r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001000 ((430r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001001 ((430r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001010 ((430r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001011 ((430r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001100 ((430r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001101 ((430r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001110 ((430r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 001111 ((430r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010000 ((430r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010001 ((430r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010010 ((430r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010011 ((430r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010100 ((430r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010101 ((430r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010110 ((430r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 010111 ((430r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011000 ((430r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011001 ((430r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011010 ((430r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011011 ((430r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011100 ((430r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011101 ((430r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011110 ((430r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 011111 ((430r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100000 ((430r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100001 ((430r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100010 ((430r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 10001 1 ((430r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100100 ((430r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100101 ((430r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100110 ((430r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 100111 ((430r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101000 ((430r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101001 ((430r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101010 ((430r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101011 ((430r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101100 ((430r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101101 ((430r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101110 ((430r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 101111 ((430r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110000 ((430r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110001 ((430r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110010 ((430r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110011 ((430r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110100 ((430r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110101 ((430r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110110 ((430r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 110111 ((430r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111000 ((430r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111001 ((430r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111010 ((430r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111011 ((430r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111100 ((430r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111101 ((430r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn1 5 - 0 = 111110 ((430r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn1 vrn1 5 - 0 = 111111 ((430r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.42: vinn1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.137- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn2 formula vrn2 5 - 0 = 000000 (42 0r / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000001 ((420r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000010 ((420r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000011 ((420r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000100 ((420r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000101 ((420r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000110 ((420r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 000111 ((420r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001000 ((420r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001001 ((420r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001010 ((420r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001011 ((420r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001100 ((420r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001101 ((420r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001110 ((420r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 001111 ((420r - 30r ) / 450r) * (vsnr - vgsn) + vgsn v rn2 5 - 0 = 010000 ((420r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010001 ((420r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010010 ((420r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010011 ((420r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010100 ((420r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010101 ((420r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010110 ((420r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 010111 ((420r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011000 ((420r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011001 ((420r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011010 ((420r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011011 ((420r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011100 ((420r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011101 ((420r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011110 ((420r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 011111 ((420r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100000 ((420r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100001 ((420r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100010 ((420r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100011 ((420r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100100 ((420r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100101 ((420r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100110 ((420r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 100111 ( (420r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101000 ((420r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101001 ((420r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101010 ((420r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101011 ((420r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101100 ((420r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101101 ((420r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 101110 ((420r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn 2 5 - 0 = 101111 ((420r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110000 ((420r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110001 ((420r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110010 ((420r - 100r) / 450r) * (vsnr - vgsn) + vg sn vrn2 5 - 0 = 110011 ((420r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110100 ((420r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110101 ((420r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 110110 ((420r - 108r) / 450r) * (vsnr - vg sn) + vgsn vrn2 5 - 0 = 110111 ((420r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111000 ((420r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111001 ((420r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111010 ((420r - 116r) / 450r) * (v snr - vgsn) + vgsn vrn2 5 - 0 = 111011 ((420r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111100 ((420r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111101 ((420r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn2 5 - 0 = 111110 ((420r - 124r) / 45 0r) * (vsnr - vgsn) + vgsn vinn2 vrn2 5 - 0 = 111111 ((420r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.43: vinn2 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.138- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn14 formula vrn3 5 - 0 = 000000 (156r / 450r ) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000001 ((156r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000010 ((156r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000011 ((156r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000100 ((156r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000101 ((156r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000110 ((156r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 000111 ((156r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001000 ((156 r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001001 ((156r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001010 ((156r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001011 ((156r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 0011 00 ((156r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001101 ((156r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001110 ((156r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 001111 ((156r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010000 ((156r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010001 ((156r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010010 ((156r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010011 ((156r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010100 ((156r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010101 ((156r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010110 ((156r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 010111 ((156r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011000 ((156r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011001 ((156r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011010 ((156r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011011 ((156r - 54r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011100 ((156r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011101 ((156r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011110 ((156r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 011111 ((156r - 62r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100000 ((156r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100001 ((156r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100010 ((156r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100011 ((156r - 70r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100100 ((156r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100101 ((156r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100110 ((156r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 100111 ((156r - 78r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101000 ((156r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101001 ((156r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101010 ((156r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101011 ((156r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101100 ((156r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101101 ((156r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101110 ((156r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 101111 ((156r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110000 ((156r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110001 ((156r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110010 ((156r - 100r) / 450r) * (vsnr - vgsn) + vgsn v rn3 5 - 0 = 110011 ((156r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110100 ((156r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110101 ((156r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110110 ((156r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 110111 ((156r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111000 ((156r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111001 ((156r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111010 ((156r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111011 ((156r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111100 ((156r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111101 ((156r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn3 5 - 0 = 111110 ((156r - 124r) / 450r) * (vsnr - vgsn) + vgsn vinn14 vrn3 5 - 0 = 111111 ((156r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.44: vinn14 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.139- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn15 formula vrn4 5 - 0 = 000000 (146r / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000001 ((146r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000010 ((146r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000011 ((146r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000100 ((146r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000101 ((146r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000110 ((146r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 000111 ((146r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001000 ((146r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001001 ((146r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001010 ((146r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001011 ((146r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001100 ( (146r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001101 ((146r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001110 ((146r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 001111 ((146r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010000 ((146r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010001 ((146r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010010 ((146r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010011 ((146r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn 4 5 - 0 = 010100 ((146r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010101 ((146r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010110 ((146r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 010111 ((146r - 46r ) / 450r) * (vsnr - vgsn) + vg sn vrn4 5 - 0 = 011000 ((146r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011001 ((146r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011010 ((146r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011011 ((146r - 54r ) / 450r) * (vsnr - vg sn) + vgsn vrn4 5 - 0 = 011100 ((146r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011101 ((146r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011110 ((146r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 011111 ((146r - 62r ) / 450r) * (v snr - vgsn) + vgsn vrn4 5 - 0 = 100000 ((146r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100001 ((146r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100010 ((146r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100011 ((146r - 70r ) / 45 0r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100100 ((146r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100101 ((146r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100110 ((146r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 100111 ((146r - 78 r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101000 ((146r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101001 ((146r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101010 ((146r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101011 ((1 46r - 86r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101100 ((146r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101101 ((146r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 101110 ((146r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 10 1111 ((146r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110000 ((146r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110001 ((146r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110010 ((146r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110011 ((146r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110100 ((146r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110101 ((146r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110110 ((146r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 110111 ((146r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111000 ((146r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111001 ((146r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111010 ((146r - 116r) / 450r) * (vsnr - vgsn ) + vgsn vrn4 5 - 0 = 111011 ((146r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111100 ((146r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111101 ((146r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn4 5 - 0 = 111110 ((146r - 124r) / 450r) * (vsn r - vgsn) + vgsn vinn15 vrn4 5 - 0 = 111111 ((146r - 126r) / 450r) * (vsnr - vgsn) + vgsn table 5.45: vinn15 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.140- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn16 formula vrn5 5 - 0 = 000000 (144r / 450r) * (vsn r - vgsn) + vgsn vrn5 5 - 0 = 000001 ((144r - 2r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000010 ((144r - 4r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000011 ((144r - 6r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000100 ((144r - 8r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000101 ((144r - 10r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000110 ((144r - 12r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 000111 ((144r - 14r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001000 ((144r - 16r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001001 ((144r - 18r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001010 ((144r - 20r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001011 ((144r - 22r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001100 ((144r - 24r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001101 ((144r - 26r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001110 ((144r - 28r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 001111 ((144r - 30r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010000 ( (144r - 32r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010001 ((144r - 34r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010010 ((144r - 36r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010011 ((144r - 38r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010100 ((144r - 40r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010101 ((144r - 42r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010110 ((144r - 44r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 010111 ((144r - 46r ) / 450r) * (vsnr - vgsn) + vgsn vrn 5 5 - 0 = 011000 ((144r - 48r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011001 ((144r - 50r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011010 ((144r - 52r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011011 ((144r - 54r ) / 450r) * (vsnr - vgsn) + vg sn vrn5 5 - 0 = 011100 ((144r - 56r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011101 ((144r - 58r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011110 ((144r - 60r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 011111 ((144r - 62r ) / 450r) * (vsnr - vg sn) + vgsn vrn5 5 - 0 = 100000 ((144r - 64r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100001 ((144r - 66r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100010 ((144r - 68r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100011 ((144r - 70r ) / 450r) * (v snr - vgsn) + vgsn vrn5 5 - 0 = 100100 ((144r - 72r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100101 ((144r - 74r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100110 ((144r - 76r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 100111 ((144r - 78r ) / 45 0r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101000 ((144r - 80r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101001 ((144r - 82r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101010 ((144r - 84r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101011 ((144r - 86 r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101100 ((144r - 88r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101101 ((144r - 90r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101110 ((144r - 92r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 101111 ((1 44r - 94r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110000 ((144r - 96r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110001 ((144r - 98r ) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110010 ((144r - 100r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 11 0011 ((144r - 102r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110100 ((144r - 104r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110101 ((144r - 106r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110110 ((144r - 108r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 110111 ((144r - 110r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111000 ((144r - 112r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111001 ((144r - 114r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111010 ((144r - 116r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111011 ((144r - 118r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111100 ((144r - 120r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111101 ((144r - 122r) / 450r) * (vsnr - vgsn) + vgsn vrn5 5 - 0 = 111110 ((144r - 124r) / 450r) * (vsnr - vgsn ) + vgsn vinn16 vrn5 5 - 0 = 111111 vgsn table 5.46: vinn16 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.141- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn5 formula prn0 6-0 = 0000000 (350r / 450r) (vsnr - vgsn) + vgsn prn0 6-0 = 0000001 ((350r - 2r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000010 ((350r - 4r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000011 ((350r C 6r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000100 ((350r C 8r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000101 ((350r C 10r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000110 ((350r C 12r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0000111 ((350r - 14r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001000 ((350r C 16r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001001 ((350r C 18r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001010 ((350r C 20r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001011 ((350r C 22r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001100 ((350r C 24r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001101 ((350r C 26r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001110 ((350r C 28r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0001111 ((350r C 30r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010000 ((350r C 32r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010001 ((350r - 34r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010010 ((350r C 36r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010011 ((350r C 38r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010100 ((350r C 40r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010101 ((350r C 42r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010110 ((350r C 44r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0010111 ((350r C 46r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011000 ((350r C 48r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011001 ((350r C 50r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011010 ((350r C 52r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011011 ((350r - 54r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011100 ((350r C 56r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011101 ((350r C 58r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011110 ((350r C 60r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0011111 ((350r C 62r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100000 ((350r - 64r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100001 ((350r C 66r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100010 ((350r C 68r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100011 ((350r C 70r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100100 ((350r C 72r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100101 ((350r C 74r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100110 ((350r C 76r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0100111 ((350r C 78r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101000 ((350r C 80r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101001 ((350r C 82r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101010 ((350r - 84r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101011 ((350r C 86r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101100 ((350r C 88r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101101 ((350r C 90r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101110 ((350r C 92r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0101111 ((350r C 94r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110000 ((350r C 96r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110001 ((350r C 98r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110010 ((350r C 100r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110011 ((350r C 102r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110100 ((350r C 104r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110101 ((350r C 106r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110110 ((350r C 108r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0110111 ((350r C 110r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111000 ((350r C 112r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111001 ((350r C 114r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111010 ((350r C 116r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111011 ((350r C 118r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111100 ((350r C 120r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111101 ((350r C 122r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111110 ((350r - 124r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 0111111 ((350r C 126r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000000 ((350r C 128r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000001 ((350r C 130r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000010 ((350r - 132r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000011 ((350r C 134r) / 450r) * (vsnr - vgsn) + vgsn vinn5 prn0 6-0 = 1000100 ((350r C 136r) / 450r) * (vsnr - vgsn) + vgsn for truly only http://www..net/ datasheet pdf - http://www..net/
-p.142- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 prn0 6-0 = 1000101 ((350r C 138r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000110 ((350r C 140r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1000111 ((350r C 142r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001000 ((350r C 144r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001001 ((350r C 146r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001010 ((350r C 148r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001011 ((350r C 150r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001100 ((350r - 152r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001101 ((350r C 154r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001110 ((350r C 156r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1001111 ((350r C 158r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010000 ((350r C 160r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010001 ((350r C 162r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010010 ((350r C 164r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010011 ((350r C 166r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010100 ((350r C 168r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010101 ((350r C 170r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010110 ((350r C 172r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1010111 ((350r - 174r) / 450r) * (vsnr - vgsn) + vgsn prn0 6-0 = 1011000 inhibit prn0 6-0 = 1011001 inhibit prn0 6-0 = 1011010 inhibit prn0 6-0 = 1011011 inhibit prn0 6-0 = 1011100 inhibit prn0 6-0 = 1011101 inhibit prn0 6-0 = 1011110 inhibit prn0 6-0 = 1011111 inhibit prn0 6-0 = 1100000 inhibit prn0 6-0 = 1100001 inhibit prn0 6-0 = 1100010 inhibit prn0 6-0 = 1100011 inhibit prn0 6-0 = 1100100 inhibit prn0 6-0 = 1100101 inhibit prn0 6-0 = 1100110 inhibit prn0 6-0 = 1100111 inhibit prn0 6-0 = 1101000 inhibit prn0 6-0 = 1101001 inhibit prn0 6-0 = 1101010 inhibit prn0 6-0 = 1101011 inhibit prn0 6-0 = 1101100 inhibit prn0 6-0 = 1101101 inhibit prn0 6-0 = 1101110 inhibit prn0 6-0 = 1101111 inhibit prn0 6-0 = 1110000 inhibit prn0 6-0 = 1110001 inhibit prn0 6-0 = 1110010 inhibit prn0 6-0 = 1110011 inhibit prn0 6-0 = 1110100 inhibit prn0 6-0 = 1110101 inhibit prn0 6-0 = 1110110 inhibit prn0 6-0 = 1110111 inhibit prn0 6-0 = 1111000 inhibit prn0 6-0 = 1111001 inhibit prn0 6-0 = 1111010 inhibit prn0 6-0 = 1111011 inhibit prn0 6-0 = 1111100 inhibit prn0 6-0 = 1111101 inhibit prn0 6-0 = 1111110 inhibit prn0 6-0 = 1111111 inhibit table 5.47: vinn5 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.143- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn11 formula prn1 6-0 = 0000000 (274r / 450r) (vsnr - vgsn) + vgsn prn1 6-0 = 0000001 ((274r - 2r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000010 ((274r - 4r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000011 ((274r C 6r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000100 ((274r C 8r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000101 ((274r C 10r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000110 ((274r C 12r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0000111 ((274r - 14r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001000 ((274r C 16r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001001 ((274r C 18r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001010 ((274r C 20r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001011 ((274r C 22r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001100 ((274r C 24r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001101 ((274r C 26r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001110 ((274r C 28r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0001111 ((274r C 30r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010000 ((274r C 32r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010001 ((274r - 34r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010010 ((274r C 36r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010011 ((274r C 38r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010100 ((274r C 40r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010101 ((274r C 42r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010110 ((274r C 44r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0010111 ((274r C 46r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011000 ((274r C 48r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011001 ((274r C 50r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011010 ((274r C 52r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011011 ((274r - 54r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011100 ((274r C 56r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011101 ((274r C 58r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011110 ((274r C 60r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0011111 ((274r C 62r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100000 ((274r - 64r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100001 ((274r C 66r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100010 ((274r C 68r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100011 ((274r C 70r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100100 ((274r C 72r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100101 ((274r C 74r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100110 ((274r C 76r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0100111 ((274r C 78r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101000 ((274r C 80r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101001 ((274r C 82r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101010 ((274r - 84r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101011 ((274r C 86r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101100 ((274r C 88r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101101 ((274r C 90r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101110 ((274r C 92r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0101111 ((274r C 94r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110000 ((274r C 96r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110001 ((274r C 98r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110010 ((274r C 100r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110011 ((274r C 102r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110100 ((274r C 104r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110101 ((274r C 106r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110110 ((274r C 108r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0110111 ((274r C 110r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111000 ((274r C 112r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111001 ((274r C 114r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111010 ((274r C 116r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111011 ((274r C 118r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111100 ((274r C 120r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111101 ((274r C 122r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111110 ((274r - 124r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 0111111 ((274r C 126r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000000 ((274r C 128r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000001 ((274r C 130r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000010 ((274r - 132r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000011 ((274r C 134r) / 450r) * (vsnr - vgsn) + vgsn vinn11 prn1 6-0 = 1000100 ((274r C 136r) / 450r) * (vsnr - vgsn) + vgsn for truly only http://www..net/ datasheet pdf - http://www..net/
-p.144- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 prn1 6-0 = 1000101 ((274r C 138r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000110 ((274r C 140r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1000111 ((274r C 142r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001000 ((274r C 144r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001001 ((274r C 146r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001010 ((274r C 148r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001011 ((274r C 150r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001100 ((274r - 152r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001101 ((274r C 154r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001110 ((274r C 156r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1001111 ((274r C 158r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010000 ((274r C 160r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010001 ((274r C 162r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010010 ((274r C 164r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010011 ((274r C 166r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010100 ((274r C 168r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010101 ((274r C 170r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010110 ((274r C 172r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1010111 ((274r - 174r) / 450r) * (vsnr - vgsn) + vgsn prn1 6-0 = 1011000 inhibit prn1 6-0 = 1011001 inhibit prn1 6-0 = 1011010 inhibit prn1 6-0 = 1011011 inhibit prn1 6-0 = 1011100 inhibit prn1 6-0 = 1011101 inhibit prn1 6-0 = 1011110 inhibit prn1 6-0 = 1011111 inhibit prn1 6-0 = 1100000 inhibit prn1 6-0 = 1100001 inhibit prn1 6-0 = 1100010 inhibit prn1 6-0 = 1100011 inhibit prn1 6-0 = 1100100 inhibit prn1 6-0 = 1100101 inhibit prn1 6-0 = 1100110 inhibit prn1 6-0 = 1100111 inhibit prn1 6-0 = 1101000 inhibit prn1 6-0 = 1101001 inhibit prn1 6-0 = 1101010 inhibit prn1 6-0 = 1101011 inhibit prn1 6-0 = 1101100 inhibit prn1 6-0 = 1101101 inhibit prn1 6-0 = 1101110 inhibit prn1 6-0 = 1101111 inhibit prn1 6-0 = 1110000 inhibit prn1 6-0 = 1110001 inhibit prn1 6-0 = 1110010 inhibit prn1 6-0 = 1110011 inhibit prn1 6-0 = 1110100 inhibit prn1 6-0 = 1110101 inhibit prn1 6-0 = 1110110 inhibit prn1 6-0 = 1110111 inhibit prn1 6-0 = 1111000 inhibit prn1 6-0 = 1111001 inhibit prn1 6-0 = 1111010 inhibit prn1 6-0 = 1111011 inhibit prn1 6-0 = 1111100 inhibit prn1 6-0 = 1111101 inhibit prn1 6-0 = 1111110 inhibit prn1 6-0 = 1111111 inhibit table 5.48: vinn11 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.145- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn3 formula pkn0 4-0 = 00000 (47r / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00001 ((47r C 1r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00010 ((47r C 2r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00011 ((47r C 3r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00100 ((47r C 4r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00101 ((47r C 5r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00110 ((47r C 6r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 00111 ((47r C 7r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01000 ((47r C 8r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01001 ((47r C 9r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01010 ((47r - 10r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01011 ((47r - 11r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01100 ((47r - 12r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01101 ((47r - 13r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01110 ((47r - 14r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 01111 ((47r - 15r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10000 ((47r - 16r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10001 ((47r - 17r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10010 ((47r - 18r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10011 ((47r - 19r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10100 ((47r - 20r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10101 ((47r - 21r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10110 ((47r - 22r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 10111 ((47r - 23r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11000 ((47r - 24r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11001 ((47r - 25r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11010 ((47r - 26r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11011 ((47r - 27r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11100 ((47r - 28r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11101 ((47r - 29r) / 48r) * (vinn2 - vinn5) + vinn5 pkn0 4-0 = 11110 ((47r - 30r) / 48r) * (vinn2 - vinn5) + vinn5 vinn3 pkn0 4-0 = 11111 ((47r - 31r) / 48r) * (vinn2 - vinn5) + vinn5 table 5.49: vinn3 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.146- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn4 formula pkn1 4-0 = 00000 (32r / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00001 ((32r - 1r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00010 ((32r - 2r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00011 ((32r - 3r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00100 ((32r - 4r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00101 ((32r - 5r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00110 ((32r - 6r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 00111 ((32r - 7r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01000 ((32r - 8r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01001 ((32r - 9r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01010 ((32r - 10r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01011 ((32r - 11r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01100 ((32r - 12r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01101 ((32r - 13r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01110 ((32r - 14r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 01111 ((32r - 15r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10000 ((32r - 16r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10001 ((32r - 17r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10010 ((32r - 18r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10011 ((32r - 19r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10100 ((32r - 20r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10101 ((32r - 21r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10110 ((32r - 22r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 10111 ((32r - 23r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11000 ((32r - 24r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11001 ((32r - 25r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11010 ((32r - 26r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11011 ((32r - 27r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11100 ((32r - 28r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11101 ((32r - 29r) / 48r) * (vinn2 - vinn5) + vinn5 pkn1 4-0 = 11110 ((32r - 30r) / 48r) * (vinn2 - vinn5) + vinn5 vinn4 pkn1 4-0 = 11111 ((32r - 31r) / 48r) * (vinn2 - vinn5) + vinn5 table 5.50: vinn4 reference voltage macro adjustment value vinn6 formula pkn2 4-0 = 00000 (220r / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00001 ((220r - 3r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00010 ((220r - 6r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00011 ((220r - 9r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00100 ((220r - 12r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00101 ((220r - 15r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00110 ((220r - 18r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 00111 ((220r - 21r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01000 ((220r - 24r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01001 ((220r - 27r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01010 ((220r - 30r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01011 ((220r - 33r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01100 ((220r - 36r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01101 ((220r - 39r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01110 ((220r - 42r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 01111 ((220r - 45r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10000 ((220r - 48r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10001 ((220r - 51r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10010 ((220r - 54r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10011 ((220r - 57r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10100 ((220r - 60r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10101 ((220r - 63r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10110 ((220r - 66r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 10111 ((220r - 69r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11000 ((220r - 72r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11001 ((220r - 75r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11010 ((220r - 78r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11011 ((220r - 81r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11100 ((220r - 84r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11101 ((220r - 87r) / 223r) * (vinn5 - vinn11) + vinn11 pkn2 4-0 = 11110 ((220r - 90r) / 223r) * (vinn5 - vinn11) + vinn11 vinn6 pkn2 4-0 = 11111 ((220r - 93r) / 223r) * (vinn5 - vinn11) + vinn11 table 5.51: vinn6 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.147- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn7 formula pkn3 4-0 = 00000 (193r / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00001 ((193r - 3r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00010 ((193r - 6r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00011 ((193r - 9r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00100 ((193r - 12r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00101 ((193r - 15r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00110 ((193r - 18r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 00111 ((193r - 21r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01000 ((193r - 24r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01001 ((193r - 27r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01010 ((193r - 30r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01011 ((193r - 33r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01100 ((193r - 36r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01101 ((193r - 39r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01110 ((193r - 42r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 01111 ((193r - 45r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10000 ((193r - 48r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10001 ((193r - 51r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10010 ((193r - 54r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10011 ((193r - 57r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10100 ((193r - 60r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10101 ((193r - 63r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10110 ((193r - 66r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 10111 ((193r - 69r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11000 ((193r - 72r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11001 ((193r - 75r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11010 ((193r - 78r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11011 ((193r - 81r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11100 ((193r - 84r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11101 ((193r - 87r) / 223r) * (vinn5 - vinn11) + vinn11 pkn3 4-0 = 11110 ((193r - 90r) / 223r) * (vinn5 - vinn11) + vinn11 vinn7 pkn3 4-0 = 11111 ((193r - 93r) / 223r) * (vinn5 - vinn11) + vinn11 table 5.52: vinn7 reference voltage macro adjustment value vinn8 formula pkn4 4-0 = 00000 (158r / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00001 ((158r - 3r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00010 ((158r - 6r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00011 ((158r - 9r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00100 ((158r - 12r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00101 ((158r - 15r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00110 ((158r - 18r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 00111 ((158r - 21r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01000 ((158r - 24r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01001 ((158r - 27r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01010 ((158r - 30r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01011 ((158r - 33r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01100 ((158r - 36r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01101 ((158r - 39r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01110 ((158r - 42r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 01111 ((158r - 45r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10000 ((158r - 48r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10001 ((158r - 51r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10010 ((158r - 54r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10011 ((158r - 57r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10100 ((158r - 60r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10101 ((158r - 63r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10110 ((158r - 66r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 10111 ((158r - 69r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11000 ((158r - 72r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11001 ((158r - 75r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11010 ((158r - 78r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11011 ((158r - 81r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11100 ((158r - 84r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11101 ((158r - 87r) / 223r) * (vinn5 - vinn11) + vinn11 pkn4 4-0 = 11110 ((158r - 90r) / 223r) * (vinn5 - vinn11) + vinn11 vinn8 pkn4 4-0 = 11111 ((158r - 93r) / 223r) * (vinn5 - vinn11) + vinn11 table 5.53: vinn8 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.148- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn9 formula pkn5 4-0 = 00000 (123r / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00001 ((123r - 3r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00010 ((123r - 6r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00011 ((123r - 9r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00100 ((123r - 12r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00101 ((123r - 15r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00110 ((123r - 18r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 00111 ((123r - 21r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01000 ((123r - 24r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01001 ((123r - 27r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01010 ((123r - 30r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01011 ((123r - 33r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01100 ((123r - 36r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01101 ((123r - 39r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01110 ((123r - 42r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 01111 ((123r - 45r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10000 ((123r - 48r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10001 ((123r - 51r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10010 ((123r - 54r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10011 ((123r - 57r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10100 ((123r - 60r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10101 ((123r - 63r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10110 ((123r - 66r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 10111 ((123r - 69r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11000 ((123r - 72r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11001 ((123r - 75r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11010 ((123r - 78r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11011 ((123r - 81r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11100 ((123r - 84r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11101 ((123r - 87r) / 223r) * (vinn5 - vinn11) + vinn11 pkn5 4-0 = 11110 ((123r - 90r) / 223r) * (vinn5 - vinn11) + vinn11 vinn9 pkn5 4-0 = 11111 ((123r - 93r) / 223r) * (vinn5 - vinn11) + vinn11 table 5.54: vinn9 reference voltage macro adjustment value vinn10 formula pkn6 4-0 = 00000 (96r / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00001 ((96r - 3r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00010 ((96r - 6r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00011 ((96r - 9r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00100 ((96r - 12r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00101 ((96r - 15r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00110 ((96r - 18r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 00111 ((96r - 21r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01000 ((96r - 24r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01001 ((96r - 27r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01010 ((96r - 30r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01011 ((96r - 33r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01100 ((96r - 36r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01101 ((96r - 39r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01110 ((96r - 42r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 01111 ((96r - 45r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10000 ((96r - 48r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10001 ((96r - 51r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10010 ((96r - 54r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10011 ((96r - 57r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10100 ((96r - 60r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10101 ((96r - 63r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10110 ((96r - 66r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 10111 ((96r - 69r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11000 ((96r - 72r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11001 ((96r - 75r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11010 ((96r - 78r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11011 ((96r - 81r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11100 ((96r - 84r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11101 ((96r - 87r) / 223r) * (vinn5 - vinn11) + vinn11 pkn6 4-0 = 11110 ((96r - 90r) / 223r) * (vinn5 - vinn11) + vinn11 vinn10 pkn6 4-0 = 11111 ((96r - 93r) / 223r) * (vinn5 - vinn11) + vinn11 table 5.55: vinn10 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.149- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 reference voltage macro adjustment value vinn12 formula pkn7 4-0 = 00000 (47r / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00001 ((47r - 1r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00010 ((47r - 2r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00011 ((47r - 3r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00100 ((47r - 4r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00101 ((47r - 5r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00110 ((47r - 6r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 00111 ((47r - 7r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01000 ((47r - 8r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01001 ((47r - 9r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01010 ((47r - 10r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01011 ((47r - 11r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01100 ((47r - 12r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01101 ((47r - 13r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01110 ((47r - 14r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 01111 ((47r - 15r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10000 ((47r - 16r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10001 ((47r - 17r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10010 ((47r - 18r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10011 ((47r - 19r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10100 ((47r - 20r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10101 ((47r - 21r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10110 ((47r - 22r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 10111 ((47r - 23r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11000 ((47r - 24r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11001 ((47r - 25r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11010 ((47r - 26r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11011 ((47r - 27r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11100 ((47r - 28r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11101 ((47r - 29r) / 48r) * (vinn11 - vinn14) + vinn14 pkn7 4-0 = 11110 ((47r - 30r) / 48r) * (vinn11 - vinn14) + vinn14 vinn12 pkn7 4-0 = 11111 ((47r - 31r) / 48r) * (vinn11 - vinn14) + vinn14 table 5.56: vinn12 reference voltage macro adjustment value vinn13 formula pkn8 4-0 = 00000 (32r / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00001 ((32r - 1r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00010 ((32r - 2r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00011 ((32r - 3r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00100 ((32r - 4r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00101 ((32r - 5r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00110 ((32r - 6r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 00111 ((32r - 7r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01000 ((32r - 8r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01001 ((32r - 9r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01010 ((32r - 10r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01011 ((32r - 11r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01100 ((32r - 12r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01101 ((32r - 13r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01110 ((32r - 14r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 01111 ((32r - 15r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10000 ((32r - 16r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10001 ((32r - 17r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10010 ((32r - 18r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10011 ((32r - 19r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10100 ((32r - 20r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10101 ((32r - 21r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10110 ((32r - 22r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 10111 ((32r - 23r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11000 ((32r - 24r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11001 ((32r - 25r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11010 ((32r - 26r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11011 ((32r - 27r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11100 ((32r - 28r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11101 ((32r - 29r) / 48r) * (vinn11 - vinn14) + vinn14 pkn8 4-0 = 11110 ((32r - 30r) / 48r) * (vinn11 - vinn14) + vinn14 vinn13 pkn8 4-0 = 11111 ((32r - 31r) / 48r) * (vinn11 - vinn14) + vinn14 table 5.57: vinn13 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.150- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula v0 vinp0 cgmp4=0 =vinp5 - (vinp5 - vinp6)*(3r/6r) v1 vinp1 v16 cgmp4=1 =vinp5 - (vinp5 - vinp6)*(3.5r/6.5r) v2 vinp2 cgmp4=0 =vinp5 - (vinp5 - vinp6)*(4r/6r) v3 vinp3 v17 cgmp4=1 =vinp5 - (vinp5 - vinp6)*(4.5r/6.5r) cgmp0=0 = vinp3 - (vinp3 - vinp4)*(1r/4r) cgmp4=0 =vinp5 - (vinp5 - vinp6)*(5r/6r) cgmp0=1 = vinp3 - (vinp3 - vinp4)*(3r/9.5r) v18 cgmp4=1 =vinp5 - (vinp5 - vinp6)*(5.5r/6.5r) cgmp0=2 = vinp3 - (vinp3 - vinp4)*(3.5r/9.3r) v19 vinp6 v4 cgmp0=3 = vinp3 - (vinp3 - vinp4)*(3.5r/10r) v20 vinp6 - (vinp6 - vinp7)*(1r/6r) cgmp0=0 = vinp3 - (vinp3 - vinp4)*(2r/4r) v21 vinp6 - (vinp6 - vinp7)*(2r/6r) cgmp0=1 = vinp3 - (vinp3 - vinp4)*(5.5r/9.5r) v22 vinp6 - (vinp6 - vinp7)*(3r/6r) cgmp0=2 = vinp3 - (vinp3 - vinp4)*(6r/9.3r) v23 vinp6 - (vinp6 - vinp7)*(4r/6r) v5 cgmp0=3 = vinp3 - (vinp3 - vinp4)*(6r/10r) v24 vinp6 - (vinp6 - vinp7)*(5r/6r) cgmp0=0 = vinp3 - (vinp3 - vinp4)*(3r/4r) v25 vinp7 cgmp0=1 = vinp3 - (vinp3 - vinp4)*(7.5r/9.5r) v26 vinp7 - (vinp7 - vinp8)*(1r/7.5r) cgmp0=2 = vinp3 - (vinp3 - vinp4)*(7.8r/9.3r) v27 vinp7 - (vinp7 - vinp8)*(2r/7.5r) v6 cgmp0=3= vinp3 - (vinp3 - vinp4)*(8r/10r) v28 vinp7 - (vinp7 - vinp8)*(3r/7.5r) v7 vinp4 v29 vinp7 - (vinp7 - vinp8)*(4r/7.5r) cgmp2=0 = vinp4 - (vinp4 - vinp5)*(1r/6r) v30 vinp7 - (vinp7 - vinp8)*(5r/7.5r) cgmp2=1 = vinp4 - (vinp4 - vinp5)*(3r/16r) v31 vinp7 - (vinp7 - vinp8)*(6r/7.5r) cgmp2=2 = vinp4 - (vinp4 - vinp5)*(4r/18r) v32 vinp8 v8 cgmp2=3 = vinp4 - (vinp4 - vinp5)*(4.5r/19.5r) v33 vinp8 - (vinp8 - vinp9)*(1r/6r) cgmp2=0 = vinp4 - (vinp4 - vinp5)*(2r/6r) v34 vinp8 - (vinp8 - vinp9)*(2r/6r) cgmp2=1 = vinp4 - (vinp4 - vinp5)*(6r/16r) v35 vinp8 - (vinp8 - vinp9)*(3r/6r) cgmp2=2 = vinp4 - (vinp4 - vinp5)*(7r/18r) v36 vinp8 - (vinp8 - vinp9)*(4r/6r) v9 cgmp2=3 = vinp4 - (vinp4 - vinp5)*(8.5r/19.5r) v37 vinp8 - (vinp8 - vinp9)*(5r/6r) cgmp2=0 = vinp4 - (vinp4 - vinp5)*(3r/6r) v38 vinp9 cgmp2=1 = vinp4 - (vinp4 - vinp5)*(8.5r/16r) v39 vinp9 - (vinp9 - vinp10)*(1r/6r) cgmp2=2 = vinp4 - (vinp4 - vinp5)*(10r/18r) v40 vinp9 - (vinp9 - vinp10)*(2r/6r) v10 cgmp2=3 = vinp4 - (vinp4 - vinp5)*(11.5r/19.5r) v41 vinp9 - (vinp9 - vinp10)*(3r/6r) cgmp2=0 = vinp4 - (vinp4 - vinp5)*(4r/6r) v42 vinp9 - (vinp9 - vinp10)*(4r/6r) cgmp2=1 = vinp4 - (vinp4 - vinp5)*(11r/16r) v43 vinp9 - (vinp9 - vinp10)*(5r/6r) cgmp2=2 = vinp4 - (vinp4 - vinp5)*(13r/18r) v44 vinp10 v11 cgmp2=3 = vinp4 - (vinp4 - vinp5)*(14.5r/19.5r) cgmp5=0 =vinp10 - (vinp10 - vinp11)*(1r/6r) cgmp2=0 = vinp4 - (vinp4 - vinp5)*(5r/6r) v45 cgmp5=1 =vinp10 - (vinp10 - vinp11)*(1r/6.5r) cgmp2=1 = vinp4 - (vinp4 - vinp5)*(13.5r/16r) cgmp5=0 =vinp10 - (vinp10 - vinp11)*(2r/6r) cgmp2=2 = vinp4 - (vinp4 - vinp5)*(15.5r/18r) v46 cgmp5=1 =vinp10 - (vinp10 - vinp11)*(2r/6.5r) v12 cgmp2=3 = vinp4 - (vinp4 - vinp5)*(17r/19.5r) cgmp5=0 =vinp10 - (vinp10 - vinp11)*(3r/6r) v13 vinp5 v47 cgmp5=1 =vinp10 - (vinp10 - vinp11)*(3r/6.5r) cgmp4=0 =vinp5 - (vinp5 - vinp6)*(1r/6r) cgmp5=0 =vinp10 - (vinp10 - vinp11)*(4r/6r) v14 cgmp4=1 =vinp5 - (vinp5 - vinp6)*(1.5r/6.5r) v48 cgmp5=1 =vinp10 - (vinp10 - vinp11)*(4r/6.5r) cgmp4=0 =vinp5 - (vinp5 - vinp6)*(2r/6r) cgmp5=0 =vinp10 - (vinp10 - vinp11)*(5r/6r) v15 cgmp4=1 =vinp5 - (vinp5 - vinp6)*(2.5r/6.5r) v49 cgmp5=1 =vinp10 - (vinp10 - vinp11)*(5r/6.5r) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.151- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula v50 vinp11 v56 vinp12 cgmp3=0 = vinp11 - (vinp11 - vinp12)*(1r/6r) cgmp1=0 = vinp12 - (vinp12 C vinp13)*(1r/4r) cgmp3=1 = vinp11 - (vinp11 - vinp12)*(2.5r/16r) cgmp1=1 = vinp12 - (vinp12 C vinp13)*(2r/9.5r) cgmp3=2 = vinp11 - (vinp11 - vinp12)*(2.5r/18r) cgmp1=2 = vinp12 - (vinp12 C vinp13)*(1.5r/9.3r) v51 cgmp3=3 = vinp11 - (vinp11 - vinp12)* (2.5r/19.5r) v57 cgmp1=3 = vinp12 - (vinp12 C vinp13)*(2r/10r) cgmp3=0 = vinp11 - (vinp11- vinp12)*(2r/6r) cgmp1=0 = vinp12 - (vinp12 C vinp13)*(2r/4r) cgmp3=1 = vinp11 - (vinp11 - vinp12)*(5r/16r) cgmp1=1 = vinp12 - (vinp12 C vinp13)*(4r/9.5r) cgmp3=2 = vinp11 - (vinp11 - vinp12)*(5r/18r) cgmp1=2 = vinp12 - (vinp12 C vinp13)*(3.3r/9.3r) v52 cgmp3=3 = vinp11 - (vinp11 - vinp12)*(5r/19.5r) v58 cgmp1=3 = vinp12 - (vinp12 C vinp13)*(4r/10r) cgmp3=0 = vinp11 - (vinp11 - vinp12)*(3r/6r) cgmp1=0 = vinp12 - (vinp12 C vinp13)*(3r/4r) cgmp3=1 = vinp11 - (vinp11 - vinp12)*(7.5r/16r) cgmp1=1 = vinp12 - (vinp12 C vinp13)*(6.5r/9.5r) cgmp3=2 = vinp11 - (vinp11 - vinp12)*(8r/18r) cgmp1=2 = vinp12 - (vinp12 C vinp13)*(5.8r/9.3r) v53 cgmp3=3 = vinp11 - (vinp11 - vinp12)*(8r/19.5r) v59 cgmp1=3= vinp12 - (vinp12 C vinp13)*(6.5r/10r) cgmp3=0 = vinp11 - (vinp11 - vinp12)*(4r/6r) v60 vinp13 cgmp3=1 = vinp11 - (vinp11 - vinp12)*(10r/16r) v61 vinp14 cgmp3=2 = vinp11 - (vinp11 - vinp12)*(11r/18r) v62 vinp15 v54 cgmp3=3 = vinp11 - (vinp11 - vinp12)* (11r/19.5r) v63 vinp16 cgmp3=0 = vinp11 - (vinp11- vinp12)*(5r/6r) cgmp3=1 = vinp11 - (vinp11 - vinp12)*(13r/16r) cgmp3=2 = vinp11 - (vinp11 - vinp12)*(14r/18r) v55 cgmp3=3 = vinp11 - (vinp11 - vinp12)* (15r/19.5r) table 5.58: voltage calculation formula of 64-grayscale voltage (positive polarity) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.152- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula v0 vinn0 cgmn4=0 =vinn5 - (vinn5 - vinn6)*(3r/6r) v1 vinn1 v16 cgmn4=1 =vinn5 - (vinn5 - vinn6)*(3.5r/6.5r) v2 vinn2 cgmn4=0 =vinn5 - (vinn5 - vinn6)*(4r/6r) v3 vinn3 v17 cgmn4=1 =vinn5 - (vinn5 - vinn6)*(4.5r/6.5r) cgmn0=0 = vinn3 - (vinn3 - vinn4)*(1r/4r) cgmn4=0 =vinn5 - (vinn5 - vinn6)*(5r/6r) cgmn0=1 = vinn3 - (vinn3 - vinn4)*(3r/9.5r) v18 cgmn4=1 =vinn5 - (vinn5 - vinn6)*(5.5r/6.5r) cgmn0=2 = vinn3 - (vinn3 - vinn4)*(3.5r/9.3r) v19 vinn6 v4 cgmn0=3 = vinn3 - (vinn3 - vinn4)*(3.5r/10r) v20 vinn6 - (vinn6 - vinn7)*(1r/6r) cgmn0=0 = vinn3 - (vinn3 - vinn4)*(2r/4r) v21 vinn6 - (vinn6 - vinn7)*(2r/6r) cgmn0=1 = vinn3 - (vinn3 - vinn4)*(5.5r/9.5r) v22 vinn6 - (vinn6 - vinn7)*(3r/6r) cgmn0=2 = vinn3 - (vinn3 - vinn4)*(6r/9.3r) v23 vinn6 - (vinn6 - vinn7)*(4r/6r) v5 cgmn0=3 = vinn3 - (vinn3 - vinn4)*(6r/10r) v24 vinn6 - (vinn6 - vinn7)*(5r/6r) cgmn0=0 = vinn3 - (vinn3 - vinn4)*(3r/4r) v25 vinp7 cgmn0=1 = vinn3 - (vinn3 - vinn4)*(7.5r/9.5r) v26 vinp7 - (vinp7 - vinp8)*(1r/7.5r) cgmn0=2 = vinn3 - (vinn3 - vinn4)*(7.8r/9.3r) v27 vinp7 - (vinp7 - vinp8)*(2r/7.5r) v6 cgmn0=3= vinn3 - (vinn3 - vinn4)*(8r/10r) v28 vinp7 - (vinp7 - vinp8)*(3r/7.5r) v7 vinn4 v29 vinp7 - (vinp7 - vinp8)*(4r/7.5r) cgmn2=0 = vinn4 - (vinn4 - vinn5)*(1r/6r) v30 vinp7 - (vinp7 - vinp8)*(5r/7.5r) cgmn2=1 = vinn4 - (vinn4 - vinn5)*(3r/16r) v31 vinp7 - (vinp7 - vinp8)*(6r/7.5r) cgmn2=2 = vinn4 - (vinn4 - vinn5)*(4r/18r) v32 vinp8 v8 cgmn2=3 = vinn4 - (vinn4 - vinn5)*(4.5r/19.5r) v33 vinp8 - (vinp8 - vinp9)*(1r/6r) cgmn2=0 = vinn4 - (vinn4 - vinn5)*(2r/6r) v34 vinp8 - (vinp8 - vinp9)*(2r/6r) cgmn2=1 = vinn4 - (vinn4 - vinn5)*(6r/16r) v35 vinp8 - (vinp8 - vinp9)*(3r/6r) cgmn2=2 = vinn4 - (vinn4 - vinn5)*(7r/18r) v36 vinp8 - (vinp8 - vinp9)*(4r/6r) v9 cgmn2=3 = vinn4 - (vinn4 - vinn5)*(8.5r/19.5r) v37 vinp8 - (vinp8 - vinp9)*(5r/6r) cgmn2=0 = vinn4 - (vinn4 - vinn5)*(3r/6r) v38 vinn9 cgmn2=1 = vinn4 - (vinn4 - vinn5)*(8.5r/16r) v39 vinn9 - (vinn9 - vinn10)*(1r/6r) cgmn2=2 = vinn4 - (vinn4 - vinn5)*(10r/18r) v40 vinn9 - (vinn9 - vinn10)*(2r/6r) v10 cgmn2=3 = vinn4 - (vinn4 - vinn5)*(11.5r/19.5r) v41 vinn9 - (vinn9 - vinn10)*(3r/6r) cgmn2=0 = vinn4 - (vinn4 - vinn5)*(4r/6r) v42 vinn9 - (vinn9 - vinn10)*(4r/6r) cgmn2=1 = vinn4 - (vinn4 - vinn5)*(11r/16r) v43 vinn9 - (vinn9 - vinn10)*(5r/6r) cgmn2=2 = vinn4 - (vinn4 - vinn5)*(13r/18r) v44 vinn10 v11 cgmn2=3 = vinn4 - (vinn4 - vinn5)*(14.5r/19.5r) cgmn5=0 =vinn10 - (vinn10 - vinn11)*(1r/6r) cgmn2=0 = vinn4 - (vinn4 - vinn5)*(5r/6r) v45 cgmn5=1 =vinn10 - (vinn10 - vinn11)*(1r/6.5r) cgmn2=1 = vinn4 - (vinn4 - vinn5)*(13.5r/16r) cgmn5=0 =vinn10 - (vinn10 - vinn11)*(2r/6r) cgmn2=2 = vinn4 - (vinn4 - vinn5)*(15.5r/18r) v46 cgmn5=1 =vinn10 - (vinn10 - vinn11)*(2r/6.5r) v12 cgmn2=3 = vinn4 - (vinn4 - vinn5)*(17r/19.5r) cgmn5=0 =vinn10 - (vinn10 - vinn11)*(3r/6r) v13 vinn5 v47 cgmn5=1 =vinn10 - (vinn10 - vinn11)*(3r/6.5r) cgmn4=0 =vinn5 - (vinn5 - vinn6)*(1r/6r) cgmn5=0 =vinn10 - (vinn10 - vinn11)*(4r/6r) v14 cgmn4=1 =vinn5 - (vinn5 - vinn6)*(1.5r/6.5r) v48 cgmn5=1 =vinn10 - (vinn10 - vinn11)*(4r/6.5r) cgmn4=0 =vinn5 - (vinn5 - vinn6)*(2r/6r) cgmn5=0 =vinn10 - (vinn10 - vinn11)*(5r/6r) v15 cgmn4=1 =vinn5 - (vinn5 - vinn6)*(2.5r/6.5r) v49 cgmn5=1 =vinn10 - (vinn10 - vinn11)*(5r/6.5r) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.153- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula v50 vinn11 v56 vinn12 cgmn3=0 = vinn11 - (vinn11 - vinn12)*(1r/6r) cgmn1=0 = vinn12 - (vinn12 C vinn13)*(1r/4r) cgmn3=1 = vinn11 - (vinn11 - vinn12)*(2.5r/16r) cgmn1=1 = vinn12 - (vinn12 C vinn13)*(2r/9.5r) cgmn3=2 = vinn11 - (vinn11 - vinn12)*(2.5r/18r) cgmn1=2 = vinn12 - (vinn12 C vinn13)*(1.5r/9.3r) v51 cgmn3=3 = vinn11 - (vinn11 - vinn12)*(2.5r/19.5r) v57 cgmn1=3 = vinn12 - (vinn12 C vinn13)*(2r/10r) cgmn3=0 = vinn11 - (vinn11- vinn12)*(2r/6r) cgmn1=0 = vinn12 - (vinn12 C vinn13)*(2r/4r) cgmn3=1 = vinn11 - (vinn11 - vinn12)*(5r/16r) cgmn1=1 = vinn12 - (vinn12 C vinn13)*(4r/9.5r) cgmn3=2 = vinn11 - (vinn11 - vinn12)*(5r/18r) cgmn1=2 = vinn12 - (vinn12 C vinn13)*(3.3r/9.3r) v52 cgmn3=3 = vinn11 - (vinn11 - vinn12)*(5r/19.5r) v58 cgmn1=3 = vinn12 - (vinn12 C vinn13)*(4r/10r) cgmn3=0 = vinn11 - (vinn11 - vinn12)*(3r/6r) cgmn1=0 = vinn12 - (vinn12 C vinn13)*(3r/4r) cgmn3=1 = vinn11 - (vinn11 - vinn12)*(7.5r/16r) cgmn1=1 = vinn12 - (vinn12 C vinn13)*(6.5r/9.5r) cgmn3=2 = vinn11 - (vinn11 - vinn12)*(8r/18r) cgmn1=2 = vinn12 - (vinn12 C vinn13)*(5.8r/9.3r) v53 cgmn3=3 = vinn11 - (vinn11 - vinn12)*(8r/19.5r) v59 cgmn1=3= vinn12 - (vinn12 C vinn13)*(6.5r/10r) cgmn3=0 = vinn11 - (vinn11 - vinn12)*(4r/6r) v60 vinn13 cgmn3=1 = vinn11 - (vinn11 - vinn12)*(10r/16r) v61 vinn14 cgmn3=2 = vinn11 - (vinn11 - vinn12)*(11r/18r) v62 vinn15 v54 cgmn3=3 = vinn11 - (vinn11 - vinn12)*(11r/19.5r) v63 vinn16 cgmn3=0 = vinn11 - (vinn11- vinn12)*(5r/6r) cgmn3=1 = vinn11 - (vinn11 - vinn12)*(13r/16r) cgmn3=2 = vinn11 - (vinn11 - vinn12)*(14r/18r) v55 cgmn3=3 = vinn11 - (vinn11 - vinn12)*(15r/19.5r) table 5.59: voltage calculation formula of 64-grayscale voltage (negative polarity) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.154- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula vv0 v0 vv44 v11 vv1 v0 - (v0 - v1)*(4r/16r) vv45 v11 - (v11 - v12)*(1.6r/6.4r) vv2 v0 - (v0 - v1)*(8r/16r) vv46 v11 - (v11 - v12)*(3.2r/6.4r) vv3 v0 - (v0 - v1)*(12r/16r) vv47 v11 - (v11 - v12)*(4.8r/6.4r) vv4 v1 vv48 v12 vv5 v1 - (v1 - v2)*(4r/16r) vv49 v12 - (v12 - v13)*(1.6r/6.4r) vv6 v1 - (v1 - v2)*(8r/16r) vv50 v12 - (v12 - v13)*(3.2r/6.4r) vv7 v1 - (v1 - v2)*(12r/16r) vv51 v12 - (v12 - v13)*(4.8r/6.4r) vv8 v2 vv52 v13 vv9 v2 - (v2 - v3)*(4r/16r) vv53 v13 - (v13 - v14)*(1.6r/6.4r) vv10 v2 - (v2 - v3)*(8r/16r) vv54 v13 - (v13 - v14)*(3.2r/6.4r) vv11 v2 - (v2 - v3)*(12r/16r) vv55 v13 - (v13 - v14)*(4.8r/6.4r) vv12 v3 vv56 v14 vv13 v3 - (v3 - v4)*(2r/8r) vv57 v14 - (v14 - v15)*(1.6r/6.4r) vv14 v3 - (v3 - v4)*(4r/8r) vv58 v14 - (v14 - v15)*(3.2r/6.4r) vv15 v3 - (v3 - v4)*(6r/8r) vv59 v14 - (v14 - v15)*(4.8r/6.4r) vv16 v4 vv60 v15 vv17 v4 - (v4 - v5)*(2r/8r) vv61 v15 - (v15 - v16)*(1.6r/6.4r) vv18 v4 - (v4 - v5)*(4r/8r) vv62 v15 - (v15 - v16)*(3.2r/6.4r) vv19 v4 - (v4 - v5)*(6r/8r) vv63 v15 - (v15 - v16)*(4.8r/6.4r) vv20 v5 vv64 v16 vv21 v5 - (v5 - v6)*(2r/8r) vv65 v16 - (v16 - v17)*(1.6r/6.4r) vv22 v5 - (v5 - v6)*(4r/8r) vv66 v16 - (v16 - v17)*(3.2r/6.4r) vv23 v5 - (v5 - v6)*(6r/8r) vv67 v16 - (v16 - v17)*(4.8r/6.4r) vv24 v6 vv68 v17 vv25 v6 - (v6 - v7)*(2r/8r) vv69 v17 - (v17 - v18)*(1.6r/6.4r) vv26 v6 - (v6 - v7)*(4r/8r) vv70 v17 - (v17 - v18)*(3.2r/6.4r) vv27 v6 - (v6 - v7)*(6r/8r) vv71 v17 - (v17 - v18)*(4.8r/6.4r) vv28 v7 vv72 v18 vv29 v7 - (v7 - v8)*(1.6r/6.4r) vv73 v18 - (v18 - v19)*(1.6r/6.4r) vv30 v7 - (v7 - v8)*(3.2r/6.4r) vv74 v18 - (v18 - v19)*(3.2r/6.4r) vv31 v7 - (v7 - v8)*(4.8r/6.4r) vv75 v18 - (v18 - v19)*(4.8r/6.4r) vv32 v8 vv76 v19 vv33 v8 - (v8 - v9)*(1.6r/6.4r) vv77 v19 - (v19 - v20)*(1.6r/6.4r) vv34 v8 - (v8 - v9)*(3.2r/6.4r) vv78 v19 - (v19 - v20)*(3.2r/6.4r) vv35 v8 - (v8 - v9)*(4.8r/6.4r) vv79 v19 - (v19 - v20)*(4.8r/6.4r) vv36 v9 vv80 v20 vv37 v9 - (v9 - v10)*(1.6r/6.4r) vv81 v20 - (v20 - v21)*(1.6r/6.4r) vv38 v9 - (v9 - v10)*(3.2r/6.4r) vv82 v20 - (v20 - v21)*(3.2r/6.4r) vv39 v9 - (v9 - v10)*(4.8r/6.4r) vv83 v20 - (v20 - v21)*(4.8r/6.4r) vv40 v10 vv84 v21 vv41 v10 - (v10 - v11)*(1.6r/6.4r) vv85 v21 - (v21 - v22)*(1.6r/6.4r) vv42 v10 - (v10 - v11)*(3.2r/6.4r) vv86 v21 - (v21 - v22)*(3.2r/6.4r) vv43 v10 - (v10 - v11)*(4.8r/6.4r) vv87 v21 - (v21 - v22)*(4.8r/6.4r) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.155- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula vv88 v22 vv132 v32 - (v32 - v33)*(1.6r/6.4r) vv89 v22 - (v22 - v23)*(1.6r/6.4r) vv133 v32 - (v32 - v33)*(3.2r/6.4r) vv90 v22 - (v22 - v23)*(3.2r/6.4r) vv134 v32 - (v32 - v33)*(4.8r/6.4r) vv91 v22 - (v22 - v23)*(4.8r/6.4r) vv135 v33 vv92 v23 vv136 v33 - (v33 - v34)*(1.6r/6.4r) vv93 v23 - (v23 - v24)*(1.6r/6.4r) vv137 v33 - (v33 - v34)*(3.2r/6.4r) vv94 v23 - (v23 - v24)*(3.2r/6.4r) vv138 v33 - (v33 - v34)*(4.8r/6.4r) vv95 v23 - (v23 - v24)*(4.8r/6.4r) vv139 v34 vv96 v24 vv140 v34 - (v34 - v35)*(1.6r/6.4r) vv97 v24 - (v24 - v25)*(1.6r/6.4r) vv141 v34 - (v34 - v35)*(3.2r/6.4r) vv98 v24 - (v24 - v25)*(3.2r/6.4r) vv142 v34 - (v34 - v35)*(4.8r/6.4r) vv99 v24 - (v24 - v25)*(4.8r/6.4r) vv143 v35 vv100 v25 vv144 v35 - (v35 - v36)*(1.6r/6.4r) vv101 v25 - (v25 - v26)*(1.6r/6.4r) vv145 v35 - (v35 - v36)*(3.2r/6.4r) vv102 v25 - (v25 - v26)*(3.2r/6.4r) vv146 v35 - (v35 - v36)*(4.8r/6.4r) vv103 v25 - (v25 - v26)*(4.8r/6.4r) vv147 v36 vv104 v26 vv148 v36 - (v36 - v37)*(1.6r/6.4r) vv105 v26 - (v26 - v27)*(1.6r/6.4r) vv149 v36 - (v36 - v37)*(3.2r/6.4r) vv106 v26 - (v26 - v27)*(3.2r/6.4r) vv150 v36 - (v36 - v37)*(4.8r/6.4r) vv107 v26 - (v26 - v27)*(4.8r/6.4r) vv151 v37 vv108 v27 vv152 v37 - (v37 - v38)*(1.6r/6.4r) vv109 v27 - (v27 - v28)*(1.6r/6.4r) vv153 v37 - (v37 - v38)*(3.2r/6.4r) vv110 v27 - (v27 - v28)*(3.2r/6.4r) vv154 v37 - (v37 - v38)*(4.8r/6.4r) vv111 v27 - (v27 - v28)*(4.8r/6.4r) vv155 v38 vv112 v28 vv156 v38 - (v38 - v39)*(1.6r/6.4r) vv113 v28 - (v28 - v29)*(1.6r/6.4r) vv157 v38 - (v38 - v39)*(3.2r/6.4r) vv114 v28 - (v28 - v29)*(3.2r/6.4r) vv158 v38 - (v38 - v39)*(4.8r/6.4r) vv115 v28 - (v28 - v29)*(4.8r/6.4r) vv159 v39 vv116 v29 vv160 v39 - (v39 - v40)*(1.6r/6.4r) vv117 v29 - (v29 - v30)*(1.6r/6.4r) vv161 v39 - (v39 - v40)*(3.2r/6.4r) vv118 v29 - (v29 - v30)*(3.2r/6.4r) vv162 v39 - (v39 - v40)*(4.8r/6.4r) vv119 v29 - (v29 - v30)*(4.8r/6.4r) vv163 v40 vv120 v30 vv164 v40 - (v40 - v41)*(1.6r/6.4r) vv121 v30 - (v30 - v31)*(1.6r/6.4r) vv165 v40 - (v40 - v41)*(3.2r/6.4r) vv122 v30 - (v30 - v31)*(3.2r/6.4r) vv166 v40 - (v40 - v41)*(4.8r/6.4r) vv123 v30 - (v30 - v31)*(4.8r/6.4r) vv167 v41 vv124 v31 vv168 v41 - (v41 - v42)*(1.6r/6.4r) vv125 v31 - (v31 - v32)*(1.6r/11.2r) vv169 v41 - (v41 - v42)*(3.2r/6.4r) vv126 v31 - (v31 - v32)*(3.2r/11.2r) vv170 v41 - (v41 - v42)*(4.8r/6.4r) vv127 v31 - (v31 - v32)*(4.8r/11.2r) vv171 v42 vv128 v31 - (v31 - v32)*(6.4r/11.2r) vv172 v42 - (v42 - v43)*(1.6r/6.4r) vv129 v31 - (v31 - v32)*(8r/11.2r) vv173 v42 - (v42 - v43)*(3.2r/6.4r) vv130 v31 - (v31 - v32)*(9.6r/11.2r) vv174 v42 - (v42 - v43)*(4.8r/6.4r) vv131 v32 vv175 v43 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.156- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 grayscale voltage formula grayscale voltage formula vv176 v43 - (v43 - v44)*(1.6r/6.4r) vv216 v53 - (v53 - v54)*(1.6r/6.4r) vv177 v43 - (v43 - v44)*(3.2r/6.4r) vv217 v53 - (v53 - v54)*(3.2r/6.4r) vv178 v43 - (v43 - v44)*(4.8r/6.4r) vv218 v53 - (v53 - v54)*(4.8r/6.4r) vv179 v44 vv219 v54 vv180 v44 - (v44 - v45)*(1.6r/6.4r) vv220 v54 - (v54 - v55)*(1.6r/6.4r) vv181 v44 - (v44 - v45)*(3.2r/6.4r) vv221 v54 - (v54 - v55)*(3.2r/6.4r) vv182 v44 - (v44 - v45)*(4.8r/6.4r) vv222 v54 - (v54 - v55)*(4.8r/6.4r) vv183 v45 vv223 v55 vv184 v45 - (v45 - v46)*(1.6r/6.4r) vv224 v55 - (v55 - v56)*(1.6r/6.4r) vv185 v45 - (v45 - v46)*(3.2r/6.4r) vv225 v55 - (v55 - v56)*(3.2r/6.4r) vv186 v45 - (v45 - v46)*(4.8r/6.4r) vv226 v55 - (v55 - v56)*(4.8r/6.4r) vv187 v46 vv227 v56 vv188 v46 - (v46 - v47)*(1.6r/6.4r) vv228 v56 - (v56 - v57)*(2r/8r) vv189 v46 - (v46 - v47)*(3.2r/6.4r) vv229 v56 - (v56 - v57)*(4r/8r) vv190 v46 - (v46 - v47)*(4.8r/6.4r) vv230 v56 - (v56 - v57)*(6r/8r) vv191 v47 vv231 v57 vv192 v47 - (v47 - v48)*(1.6r/6.4r) vv232 v57 - (v57 - v58)*(2r/8r) vv193 v47 - (v47 - v48)*(3.2r/6.4r) vv233 v57 - (v57 - v58)*(4r/8r) vv194 v47 - (v47 - v48)*(4.8r/6.4r) vv234 v57 - (v57 - v58)*(6r/8r) vv195 v48 vv235 v58 vv196 v48 - (v48 - v49)*(1.6r/6.4r) vv236 v58 - (v58 - v59)*(2r/8r) vv197 v48 - (v48 - v49)*(3.2r/6.4r) vv237 v58 - (v58 - v59)*(4r/8r) vv198 v48 - (v48 - v49)*(4.8r/6.4r) vv238 v58 - (v58 - v59)*(6r/8r) vv199 v49 vv239 v59 vv200 v49 - (v49 - v50)*(1.6r/6.4r) vv240 v59 - (v59 - v60)*(2r/8r) vv201 v49 - (v49 - v50)*(3.2r/6.4r) vv241 v59 - (v59 - v60)*(4r/8r) vv202 v49 - (v49 - v50)*(4.8r/6.4r) vv242 v59 - (v59 - v60)*(6r/8r) vv203 v50 vv243 v60 vv204 v50 - (v50 - v51)*(1.6r/6.4r) vv244 v60 - (v60 - v61)*(4r/16r) vv205 v50 - (v50 - v51)*(3.2r/6.4r) vv245 v60 - (v60 - v61)*(8r/16r) vv206 v50 - (v50 - v51)*(4.8r/6.4r) vv246 v60 - (v60 - v61)*(12r/16r) vv207 v51 vv247 v61 vv208 v51 - (v51 - v52)*(1.6r/6.4r) vv248 v61 - (v61 - v62)*(4r/16r) vv209 v51 - (v51 - v52)*(3.2r/6.4r) vv249 v61 - (v61 - v62)*(8r/16r) vv210 v51 - (v51 - v52)*(4.8r/6.4r) vv250 v61 - (v61 - v62)*(12r/16r) vv211 v52 vv251 v62 vv212 v52 - (v52 - v53)*(1.6r/6.4r) vv252 v62 - (v62 - v63)*(4r/16r) vv213 v52 - (v52 - v53)*(3.2r/6.4r) vv253 v62 - (v62 - v63)*(8r/16r) vv214 v52 - (v52 - v53)*(4.8r/6.4r) vv254 v62 - (v62 - v63)*(12r/16r) vv215 v53 vv255 v63 table 5.60: voltage calculation formula of 256-grayscale voltage (positive/negative polarity) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.157- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.13 characteristics of i/o 5.13.1 output or bi-directional (i/o) pins output or bi-directional pins after power on after hardware reset after software reset te low low low db23 to db0 (output driver) high-z (inactive) high-z (inactive) high-z (inactive) sdo high-z (inactive) high-z (inactive) high-z (inactive) cabc_pwm_out low low low table 5.61 characteristics of output or bi-directional (i/o) pins 5.13.2 input pins input pins during power on process after power on after hardware reset after software reset during power off process resx setion.5.18 input valid input valid input valid setion.5.18 csx input valid input valid input valid input valid input valid dcx_scl input valid input valid input valid input valid input valid wrx_dcx input valid input valid input valid input valid input valid rdx_e input valid input valid input valid input valid input valid db23 to db0 sdi input valid input valid input valid input valid input valid hsync input valid input valid input valid input valid input valid vsync input valid input valid input valid input valid input valid pclk input valid input valid input valid input valid input valid de input valid input valid input valid input valid input valid osc, bs3, bs2, bs1, bs0, input valid input valid input valid input valid input valid test2-1 low low low low low table 5.62 characteristics of input pins for truly only http://www..net/ datasheet pdf - http://www..net/
-p.158- HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 5.14 gip control singal HX8369-A is a single chip solution for a wvga gip (gate in panel) type tft lcd display. there are many gip/asg type tft panels that correspond to different gip timing. therefore, the gip setting must be setup to the correct gip/asg timing for the normal display. the gip timing adjustment is related to register 0xd5h setgip. the gip control signals (gout[1~10]_l and gout[1~10]_r) is for panel used. the assignment of each panel type is specified on the application note. regarding the gip/asg timing, please refer to HX8369-A application note. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.159- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.15 sleep out Ccommand and self-diagnostic functions of the display module 5.15.1 register loading detection sleep out-command (see sleep out (11h)) is a trigger for an internal function of the display module, which indicates, if the display module loading function of factory default values from otp (or similar device) to registers of the display controller is working properly. there are compared factory values of the otp and register values of the display controller by the display controller. if those both values (otp and register values) are same, there is inverted (=increased by 1) a bit, which is defined in command read display self-diagnostic result (0fh) (=rddsdr) (the used bit of this command is d7). if those both values are not same, this bit (d7) is not inverted (=increased by 1). the flow chart for this internal function is following: figure 5.33: sleep out flow chartCcommand and self-diagnostic functions for truly only http://www..net/ datasheet pdf - http://www..net/
-p.160- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.15.2 functionality detection sleep out-command (see sleep out (11h)) is a trigger for an internal function of the display module, which indicates, if the display module is still running and meets functionality requirements. the internal function (=the display controller) is comparing, if the display module still meets functionality requirements (e.g. booster voltage levels, timings, etc.). if functionality requirement is met, 1 bit will be inverted (=increased by 1), which is defined in command read display self- diagnostic result (0fh) (=rddsdr) (the used bit of this command is d6). if functionality requirement is not the same, this bit (d6) is not inverted (=increased by 1). the flow chart for this internal function is shown as below. sleep in (10h) sleep out mode sleep in mode sleep out (11h) checks timings, voltage levels and other functionalities is functionality requirement meet ? d6 inverted rddsdr`s d6=0 power on sequence hw reset sw reset yes no note: there is needed 120msec after sleep out -command, when there is changing from sleep inCmode tosleep out -mode, before there is possible to check if customers functionality requirements are met and a value of rddsdrs d6 is valid. otherwise, there is 5msec delay for d6s value, when sleep out Ccommand is sent in sleep out -mode. figure 5.34: sleep out flow chart internal function detection for truly only http://www..net/ datasheet pdf - http://www..net/
-p.161- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.16 power on/off sequence vdd1, vdd2 and vdd3 can be applied in any order. vdd1, vdd2 and vdd3 can be powered down in any order. during power off, if lcd is in the sleep out mode, vdd1 and vdd2 must be powered down minimum 120msec after resx has been released. during power off, if lcd is in the sleep in mode, vdd1, vdd2 and vdd3 can be powered down minimum 0msec after resx has been released. csx can be applied at any timing or can be permanently grounded. resx has priority over csx. there will be no damage to the display module if the power sequences are not met. there will be no abnormal visible effects on the display panel during the power on/off sequences. there will be no abnormal visible effects on the display between end of power on sequence and before receiving sleep out command. also between receiving sleep in command and power off sequence. if resx line is not held stable by host during power on sequence as defined in sections 5.16.1 and 5.16.2, then it will be necessary to apply a hardware reset (resx) after host power on sequence is complete to ensure correct operation. otherwise function is not guaranteed. the power on/off sequence is illustrated below. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.162- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.16.1 case 1: resx line is held high or unstable by host at power on if resx line is held high or unstable by the host during power on, then a hardware reset must be applied after both vdd1, vdd2 and vdd3 have been applied- otherwise correct functionality is not guaranteed. there is no timing restriction upon this hardware reset. vdd1 vdd2 vdd3 csx resx resx trpw= +/- no limit tfpw= +/- no limit trpwics= +/- no limit tfpwics= +/- no limit h or l trpwires= + no limit trpwires= + no limit tfpwires1= min 120ms tfpwires2= min 0ns (power down in sleep out mode) (power down in sleep in mode) tfpwires1 is applied to nreset falling in the sleep out mode tfpwires2 is applied to nreset falling in the sleep in mode time when the latter signal rises up to 90% of its typical value. ex. when vci comes latter. this time is defined at the cross point of 90% of 2.5v/2.75v. not 90% of 2.3v. time when the former signal falls down to 90% of its typical value. ex. when vci falls earilier. this time is defined at the cross point of 90% of 2.5v/2.75v. not 90% of 2.3v. figure 5.35: case 1: resx line is held high or unstable by host at power on for truly only http://www..net/ datasheet pdf - http://www..net/
-p.163- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.16.2 case 2: resx line is held low by host at power on if resx line is held low (and stable) by the host during power on, then the resx must be held low for minimum 10 sec after both vdd1, vdd2 and vdd3 have been a pplied. figure 5.36: case 2: resx line is held low by host at power on 5.17 uncontrolled power off the uncontrolled power off means a situation when e.g. there is removed a battery without the controlled power off sequence. there will not be any damages for the display module or the display module will not cause any damages for the host or lines of the interface. at an uncontrolled power off the display will go blank and there will not be any visible effects within 1 second on the display (blank display) and remains blank until power on sequence powers it up. note: HX8369-A is support the noise reject filter (20ns) to reject spike or noise. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.164- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.18 content adaptive brightness control (cabc) function the general block diagram of the cabc and the brightness control is illustrated below: external vsync, hsync, enable, dck (rgb interface) image data display control signal generator display data generator display data contents analysis cabc gain / duty brightness control block pwm clock devider pwm_clk (foscd) cabc block dbv[7:0] (r52h) (bl=0) c[1:0]= 00 off c [1:0]= 01, 10, 11 off sel_pwmclk[2:0] c9h) pwm_out ( bl=1) cabc[1:0] (r55h) savepower[6:0] (rc9h) dbg0~8[6:0] (rcah) dbv[7:0] (r51h) bctrl, bl(r53h) cmb[7:0](r5eh) invplus sel_blduty pwm_period (rc9h) figure 5.37: cabc block diagram for truly only http://www..net/ datasheet pdf - http://www..net/
-p.165- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.18.1 module architectures HX8369-A can support two module architectures for cabc operation. the bl bit setting of r53h can be used to select used display module architecture. white led driver circuit for display backlight is located on the main pwb, not in the display module both in architecture i and ii. architecture i cabc_ pwm_out 1. bl =`1` of r53h 2. led backlight brightness for the dis play i s c ontrol led by external output cabc_pwm_out . architecture ii 1. bl =`0` of r53h 2. led backlight brightness data for the display is read with dbv[7:0] bits of r52h. 3. read commands r53h should be synchronized with v-sync. figure 5.38: module architecture for truly only http://www..net/ datasheet pdf - http://www..net/
-p.166- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.18.2 cabc block there are dbg0~8[6:0] register bits in cabc block to define the cabc gain/ cabc duty table. every dbgx[6:0] has 33 gain/duty value setting. after one-frame display data content analysis, lsi will generate one cabc gain / cabc duty value calculated from dbg0~8[6:0] register bits setting (by using interpolated method) for display data generating and for backlight pwm pulse generating. please note that the cabc gain / cabc duty value calculated by the lsi is one of the 33 gain/duty value setting in dbgxx[6:0]. please note that : duty ( valid level period (led on) / one complete period)=1/ gain. gain curve dbg0 dbg1 dbg2 dbg3 dbg4 dbg5 dbg6 dbg7 dbg8 32 64 0 96 128 160 192 224 256 gain savepower one frame display data content analysis figure 5.39: cabc gain / cabc duty generation for power saving of backlight module, there are savepower[6:0] bits to define the minimum gain/ maximum duty of cabc block output. if the cabc gain / duty after one-frame display data contents analysis is smaller(gain) / larger(duty) than savepower[6:0] bits setting, the cabc block will output cabc gain / duty equal to savepower[6:0] and ignore the result of display data contents analysis. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.167- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.18.3 brightness control block there is an external output signal from brightness block, cabc_pwm_out, to control the led driver ic in order to control display brightness. there are resister bits, dbv[7:0] of r51h, for display brightness of manual brightness setting. the cabc_pwm_out duty is calculated as (dbv[7:0])/255 x cabc duty (generated after one-frame display data content analysis). for ex: cabc_pwm_out period=2.95 ms, and dbv[7:0](r51h)=228dec and cabc duty is 74%. then cabc_pwm_out duty=(228) / 255 x 74.42% o 66.54%. correspond to the cabc_pwm_out period=2.95 ms, the high-level of cabc_pwm_out (high effective) = 1.96ms, and the low-level of cabc_pwm_out =0.99ms. figure 5.40: cabc_pwm_out output duty symbol parameter min. max. unit description tpw pulse width 0.0333 8.33 ms - table 5.63 cabc timing table note1: the signal rise and fall times (tf, tr) are stipulated to be equal to or less than 15ns. note2: the pulse width range by setting cabc related registers is locate between 0.0333ms to 8.33ms. when architecture ii module is used (bl=0) with the example below, the cabc_pwm_out is always output low and the dbv[7:0](r51h) will be read a value as 169dec ((169)/255 o 66.27%). for truly only http://www..net/ datasheet pdf - http://www..net/
-p.168- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.18.4 minimum brightness setting of cabc function cabc function is automatically reduced backlight brightness based on image contents. in the case of the combination with the cabc or manual brightness setting, display brightness is too dark. it must affect to image quality degradation. cabc minimum brightness setting (cmb[7:0] bits of r5eh) is to avoid too much brightness reduction. when cabc is active, cabc can not reduce the display brightness to less than cabc minimum brightness setting. image processing function is worked as normal, even if the brightness can not be changed. this function does not affect to the other function, manual brightness setting. manual brightness can be set the display brightness to less than cabc minimum brightness. smooth transition and dimming function can be worked as normal. when display brightness is turned off (bctrl=0 of r53h), cabc minimum brightness setting is ignored. cmb[7:0], read cabc minimum brightness (r5fh) always read the setting value of cmb[7:0], write cabc minimum brightness (r5eh) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.169- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19 otp programing 5.19.1 otp table otp_index (hex) ref. command b7 b6 b5 b4 b3 b2 b1 b0 00 setosc (b0h) nvalid0 - - - uadj[3:0] 1b nvalid_vcmf1 nvalid_vcmf2 nvalid_vcmf3 nvalid_vcmb1 nvalid_vcmb2 nvalid_vcmb3 - - 1c vcmc_f1[7:0] 1d vcmc_b1[7:0] 1e vcmc_f2[7:0] 1f vcmc_b2[7:0] 20 vcmc_f3[7:0] 21 setvcom (b6h) vcmc_b3[7:0] 22 id1_1[7:0] 23 nvalid_id1 id2_1[6:0] 24 id3_1[7:0] 25 id1_2[7:0] 26 nvalid_id2 id2_2[6:0] 27 id3_2[7:0] 28 id1_3[7:0] 29 nvalid_id3 id2_3[6:0] 2a id3_3[7:0] 2b id1_4[7:0] 2c nvalid_id4 id2_4[6:0] 2d id3_4[7:0] 2e id1_5[7:0] 2f nvalid_id5 id2_5[6:0] 30 setid (c3h) i d3_5[7:0] 31 nvalid8 fs1[2:0] - ap[2:0] 32 - - - - bt[3:0] 33 dt[1:0] - - dcdiv[3:0] 34 - - - btp[4:0] 35 - - - btn[4:0] 36 vrhp[7:0] 37 vrhn[7:0] 38 - - vrmp[5:0] 39 - - vrmn[5:0] 3a - - dd_tu vpnl_en - vbs[2:0] 3b - dc86_div3 dc86_div2 dc86_div1 dc86_div0 xdk1 xdk0 auto_xdk 3c - dtps[2:0] - dtns[2:0] 3d a_dc[1:0] a_dtp[2:0] a_dtn[2:0] 3e b_dc[1:0] b_dtp[2:0] b_dtn[2:0] 3f c_dc[1:0] c_dtp[2:0] c_dtn[2:0] 40 d_dc[1:0] d_dtp[2:0] d_dtn[2:0] 41 setpower (b1h) e_dc[1:0] e_dtp[2:0] e_dtn[2:0] 42 nvalid9 - - - nw_pe[1:0] nw[1:0] 43 son[7:0] 44 soff[7:0] 45 eqs[7:0] 46 setcyc (b4h) e qon[7:0] 47 setpanel (cch) nvalid10 vpl hpl epl ss_panel dpl rev_panel bgr_panel 48 nvalid11 res_sel[2:0] rm dfr dm[1:0] 49 bp [7:0] 4a fp [7:0] 4b sap[3:0] - - - - 4c gen_on[7:0] 4d gen_off[7:0] 4e rtn[7:0] 4f setdisp (b2h) - - - - tei[3:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.170- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 50 - - - - - - tep[9:8] 51 tep[7:0] 52 bp_pe [7:0] 53 fp_pe [7:0] 54 rtn_pe[7:0] 78 nvalid_gv0 - g1_vrp0[5:0] 79 - - g1_vrp1[5:0] 7a - - g1_vrp2[5:0] 7b - - g1_vrp3[5:0] 7c - - g1_vrp4[5:0] 7d - - g1_vrp5[5:0] 7e - g1_prp0[6:0] 7f - g1_prp1[6:0] 80 g1_cgmp0[1:0] - g1_ pkp0[4:0] 81 g1_cgmp1[1:0] - g1_pkp1[4:0] 82 g1_cgmp2[1:0] - g1_pkp2[4:0] 83 g1_cgmp3[1:0] - g1_pkp3[4:0] 84 g1_cgmp5 g1_cgmp4 - g1_pkp4[4:0] 85 - - - g1_pkp5[4:0] 86 - - - g1_pkp6[4:0] 87 - - - g1_pkp7[4:0] 88 - - - g1_pkp8[4:0] 89 - - g1_vrn0[5:0] 8a - - g1_vrn1[5:0] 8b - - g1_vrn2[5:0] 8c - - g1_vrn3[5:0] 8d - - g1_vrn4[5:0] 8e - - g1_vrn5[5:0] 8f - g1_prn0[6:0] 90 - g1_prn1[6:0] 91 g1_cgmn0[1:0] - g1_pkn0[4:0] 92 g1_cgmn1[1:0] - g1_pkn1[4:0] 93 g1_cgmn2[1:0] - g1_pkn2[4:0] 94 g1_cgmn3[1:0] - g1_pkn3[4:0] 95 g1_cgmn5 g1_cgmn4 - g1_pkn4[4:0] 96 - - - g1_pkn5[4:0] 97 - - - g1_pkn6[4:0] 98 - - - g1_pkn7[4:0] 99 setgamma (e0h) (gc0) - - - g1_pkn8[4:0] 9a nvalid13 - - - shr_0[11:8] 9b shr_0[7:0] 9c - - - - shr_1[11:8] 9d shr_1[7:0] 9e spd[7:0] 9f chr[7:0] a0 con[7:0] a1 coff[7:0] a2 shp[3:0] scp[3:0] a3 chp[3:0] ccp[3:0] a4 sos_1[3:0] sos_0[3:0] a5 sos_3[3:0] sos_2[3:0] a6 cos_1[3:0] cos_0[3:0] a7 cos_3[3:0] cos_2[3:0] a8 cos_5[3:0] cos_4[3:0] a9 cos_7[3:0] cos_6[3:0] aa sos_1_ml[3:0] sos_0_ml[3:0] ab sos_3_ml[3:0] sos_2_ml[3:0] ac cos_1_ml[3:0] cos_0_ml[3:0] ad setgip (d5h) c os_3_ml[3:0] cos_2_ml[3:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.171- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 ae cos_5_ml[3:0] cos_4_ml[3:0] af cos_7_ml[3:0] cos_6_ml[3:0] b0 - - gto[5:0] b1 gno[7:0] b2 eq_delay[7:0] b3 gip_opt[7:0] 100 nvalid16 - - - - - dith_opt dgc_en 101 d1[7:0] 102 d2[7:0] ? ?? ?? ?? ?? ?? ? dn[7:0] 17d d125[7:0] 17e setdgclut (c1h) d126[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.172- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.2 otp programming flow figure 5.41: otp programming sequence for truly only http://www..net/ datasheet pdf - http://www..net/
-p.173- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.3 programming sequence step operation 1 power on and reset the module. 2 slpout and set 0xb9h = 0xffh, 0x83h, 0x69h to access the extension commands. 3 set vgh power to 7.5v for otp programming state. 4 write optimized values to related registers. 5 set otp_key1[7:0] (re9h)=0xaah and otp_key1[7:0] (re9h)=0x55h to enter otp program mode. 6 specify otp_index, please refer to the otp table. 7 set otp_mask=0x00h, programming the entire bit of one parameter. 8 set otp_prog=1, internal register begin write to otp according to otp_index. 9 wait 5 ms ( note 1 ) 10 complete programming one parameter to otp. if continue to programming other parameter, return to step (5). otherwise, set otp_key1[7:0] (re9h)=0x00h and otp_key1[7:0] (re9h)=0x00h to leave otp program mode and power off the module and remove the external power on vpp pin. note: when do the otp program on gamma setting, it must add 5ms delay time after setting otp_prog=1. table 5.64: otp programming sequence for truly only http://www..net/ datasheet pdf - http://www..net/
-p.174- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.4 otp programming example of vcmc_f1 and vcmc_b1 write optimized vcom value of register set cmd 0xb6h 1st parameter 0x##h(vcmc_f) 2nd parameter0x##h(vcmc_b) set otp_prog=1 for programming action set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1ch 4th parameter 0x01h delay delay delay delay 5 55 5ms msms ms set extension commands set cmd 0xb9h 1 st parameter 0xffh 2nd parameter 0x83h 3rd parameter 0x69h otp program flow end using external power 7.5v to vpp set otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h set cmd 0xe9h 1st parameter 0xaah 2nd parameter0x55h reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod h/w reset + slpout otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h set cmd 0xe9h 1st parameter 0x00h 2nd parameter0x00h set otp index 0x1ch for vcmc_f1[7:0] set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1ch 4th parameter 0x00h otp programming action done set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1ch 4th parameter 0x00h set otp_prog=1 for programming action set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1dh 4th parameter 0x01h delay delay delay delay 5 55 5ms msms ms set otp index 0x1dh for vcmc_b1[7:0] set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1dh 4th parameter 0x00h otp programming action done set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x1dh 4th parameter 0x00h figure 5.42: otp programming sequence example 1. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.175- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.5 otp programming example of id1, id2 and id3 set id1, id2 and id3 values set cmd 0xc3h 1st parameter 0x##h (id1) 2nd parameter0x##h (id2) 2nd parameter0x##h (id3) set otp_prog=1 for programming action set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x22h 4th parameter 0x01h delay delay delay delay 5 55 5ms msms ms set extension commands set cmd 0xb9h 1 st parameter 0xffh 2nd parameter 0x83h 3rd parameter 0x69h otp program flow end using external power 7.5v to vpp set otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h set cmd 0xe9h 1st parameter 0xaah 2nd parameter0x55h reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod reset ic for otp relaod h/w reset + slpout (command 0x11h) otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h set cmd 0xe9h 1st parameter 0x00h 2nd parameter0x00h set otp index 0x22h for id1[7:0], id2[6:0] and id3[7:0] set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x22h 4th parameter 0x00h otp index 0x22h, 0x23h and 0x24h otp programming action done set cmd 0xbbh 1 st parameter 0x00h 2nd parameter 0x00h 3rd parameter 0x22h 4th parameter 0x00h figure 5.43: otp programming sequence example 2. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.176- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.6 otp read example of 0x1bh (vcom setting re-load) otp_index 0x1bh value 1 st vcom otp 2 nd vcom otp 3 rd vcom otp d7 nvalid_vcmf1 1 0 0 0 d6 nvalid_vcmf2 1 1 0 0 d5 nvalid_vcmf3 1 1 1 0 d4 nvalid_vcmb1 1 0 0 0 d3 nvalid_vcmb2 1 1 0 0 d2 nvalid_vcmb3 1 1 1 0 0x1bh value 0xffh 0x6fh 0x27h 0x03h reload otp index default 0x1ch and 0x1dh 0x1eh and 0x1fh 0x20h and 0x21h figure 5.44: otp programming sequence index 0x1bh read flow. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.177- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.19.7 otp read example of vcmc_f1 figure 5.45: otp programming sequence read flow. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.178- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 5.20 temperature sensor control the HX8369-A has the calibration scheme that including gain and offset control to compensate the temperature sensor. the temperature sensor control block diagram as below. figure 5.46: temperature sensor for truly only http://www..net/ datasheet pdf - http://www..net/
-p.179- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6. command 6.1 command list 6.1.1 standard command (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) rgb 00 nop 0 1 0 0 0 0 0 0 0 0 no operation - yes 01 swreset 0 1 0 0 0 0 0 0 0 1 software reset - yes 0 1 0 0 0 0 0 1 0 1 read number of dsi parity error - - 1 1 x x x x x x x x dummy read - - 05 rdnumpe 1 1 p[7:0] - - - 0 1 0 0 0 0 0 1 1 0 read red colour - yes 1 1 x x x x x x x x dummy read - - 06 rdred 1 1 r7 r6 r5 r4 r3 r2 r1 r0 xx - - 0 1 0 0 0 0 0 1 1 1 read green colour - yes 1 1 x x x x x x x x dummy read - - 07 rdgreen 1 1 g7 g6 g5 g4 g3 g2 g1 g0 xx - - 0 1 0 0 0 0 1 0 0 0 read blue colour - yes 1 1 x x x x x x x x dummy read - - 08 rdblue 1 1 b7 b6 b5 b4 b3 b2 b1 b0 xx - - 0 1 0 0 0 0 1 0 1 0 read display power mode - yes 1 1 x x x x x x x x dummy read - - 0a rddpm 1 1 d7 d6 d5 d4 d3 d2 0 0 - - - 0 1 0 0 0 0 1 0 1 1 read display madctl - yes 1 1 x x x x x x x x dummy read - - 0b rddmadctl 1 1 d7 d6 d5 d4 d3 d2 0 0 - - - 0 1 0 0 0 0 1 1 0 0 read display pixel format - yes 1 1 x x x x x x x x dummy read - - 0c rddcolmod 1 1 - d6 d5 d4 - d2 d1 d0 - - - 0 1 0 0 0 0 1 1 0 1 read display image mode - yes 1 1 x x x x x x x x dummy read - - 0d rddim 1 1 d7 d6 d5 0 0 d2 d1 d0 - - - 0 1 0 0 0 0 1 1 1 0 read display signal mode - yes 1 1 x x x x x x x x dummy read - - 0e rddsm 1 1 d7 d6 0 0 0 0 0 0 - - - 0 1 0 0 0 0 1 1 1 1 read display self-diagnostic result - yes 1 1 x x x x x x x x dummy read - - 0f rddsdr 1 1 d7 d6 d5 d4 0 0 0 0 - - - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.180- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) rgb 10 slpin 0 1 0 0 0 1 0 0 0 0 sleep in - yes 11 slpout 0 1 0 0 0 1 0 0 0 1 sleep out - yes 12 ptlon 0 1 0 0 0 1 0 0 1 0 partial mode on - no 13 noron 0 1 0 0 0 1 0 0 1 1 normal display mode on - no 20 invoff 0 1 0 0 1 0 0 0 0 0 display inversion off - no 21 invon 0 1 0 0 1 0 0 0 0 1 display inversion on - no 0 1 0 0 1 0 0 1 1 0 gamma set - yes 26 gamset 1 1 gc7 gc6 gc5 gc4 gc3 gc2 gc1 gc0 - - 28 dispoff 0 1 0 0 1 0 1 0 0 0 display off - yes 29 dispon 0 1 0 0 1 0 1 0 0 1 display on - yes 0 1 0 0 1 0 1 0 1 0 column address set - no 1 1 sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 column address start - - 1 1 sc7 sc6 sc5 sc4 sc3 sc2 sc1 sc0 column address start - - 1 1 ec15 ec14 ec13 ec12 ec11 ec10 ec9 ec8 column address end - - 2a caset 1 1 ec7 ec6 ec5 ec4 ec3 ec2 ec1 ec0 column address end - - 0 1 0 0 1 0 1 0 1 1 row address set - no 1 1 sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 row address start - - 1 1 sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 row address start - - 1 1 ep15 ep14 ep13 ep12 ep11 ep10 ep9 ep8 row address end - - 2b paset 1 1 ep7 ep6 ep5 ep4 ep3 ep2 ep1 ep0 row address end - - 0 1 0 0 1 0 1 1 0 0 memory write - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 write data 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 write data - 2c ramwr 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 write data - 0 1 0 0 1 0 1 1 0 1 color set - yes 1 1 r007 r006 r005 r004 r003 r002 r001 r000 red tone - - 1 1 rnn7 rnn6 rnn5 rnn4 rnn3 rnn2 rnn1 rnn0 red tone - - 1 1 r637 r636 r635 r634 r633 r632 r631 r630 red tone - - 1 1 g007 g006 g005 g004 g003 g002 g001 g000 green tone - - 1 1 gnn7 gnn6 gnn5 gnn4 gnn3 gnn2 gnn1 gnn0 green tone - - 1 1 g637 g636 g635 g634 g633 g632 g631 g630 green tone - - 1 1 b007 b006 b005 b004 b003 b002 b001 b000 blue tone - - 1 1 bnn7 bnn6 bnn5 bnn4 bnn3 bnn2 bnn1 bnn0 blue tone - - 2d rgbset 1 1 b637 b636 b635 b634 b633 b632 b631 b630 blue tone - - 0 1 0 0 1 0 1 1 1 0 memory read - no 1 1 x x x x x x x x dummy read - - 1 1 d17 d16 d15 d14 d13 d12 d11 d10 read data - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 read data - - 2e ramrd 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 0 1 1 0 0 0 0 partial area - no 1 1 sr15 sr14 sr13 sr12 sr11 sr10 sr9 sr8 start row - - 1 1 sr7 sr6 sr5 sr4 sr3 sr2 sr1 sr0 start row - - 1 1 er15 er14 er13 er12 er11 er10 er9 er8 end row - - 30 pltar 1 1 er7 er6 er5 er4 er3 er2 er1 er0 end row - - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.181- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) rgb 0 1 0 0 1 1 0 0 1 1 vertical scrolling definition - no 1 1 tfa[15:8] - - - 1 1 tfa[7:0] - - - 1 1 vsa[15:8] - - - 1 1 vsa[7:0] - - - 1 1 bfa[15:8] - - - 33 vscrdef 1 1 bfa[7:0] - - - 34 teoff 0 1 0 0 1 1 0 1 0 0 tearing effect line off - no 0 1 0 0 1 1 0 1 0 1 tearing effect line on - no 35 teon 1 1 x x x x x x x m - - - 0 1 0 0 1 1 0 1 1 0 memory access control - yes 36 madctl 1 1 b7 b6 b5 b4 b3 b2 x x - - - 0 1 0 0 1 1 0 1 1 1 vertical scrolling start address - no 1 1 vsp[15:8] - - - 37 vscrsadd 1 1 vsp[7:0] - - - 38 idmoff 0 1 0 0 1 1 1 0 0 0 idle mode off - no 39 idmon 0 1 0 0 1 1 1 0 0 1 idle mode on - no 0 1 0 0 1 1 1 0 1 0 - - yes 3a colmod 1 1 x d6 d5 d4 x d2 d1 d0 - - - 0 1 0 0 1 1 1 1 0 0 memory write - no 1 1 d17 d16 d15 d14 d13 d12 d11 d10 - - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 - - - 3c ramwrcon 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 0 1 1 1 1 1 0 memory read - no 1 1 x x x x x x x x dummy read - - 1 1 d17 d16 d15 d14 d13 d12 d11 d10 - - - 1 1 dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 - - - 3e ramrdcon 1 1 dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 - - - 0 1 0 1 0 0 0 1 0 0 tesl - yes 1 1 teline[15:8](8b0) - - - 44 tesl 1 1 teline[7:0](8b0) - - - 0 1 0 1 0 0 0 1 0 1 reture the current scanline sln[15:0] - no 1 1 sln[15:8] - - - 45 getscan 1 1 sln[7:0] - - - 0 1 0 1 0 1 0 0 0 1 write display brightness - yes 51 wrdisbv 1 1 dbv[7:0] - - - 0 1 0 1 0 1 0 0 1 0 read display brightness value - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - 52 rddisbv 1 1 dbv[7:0] - - - 0 1 0 1 0 1 0 0 1 1 - yes 53 wrctrld 1 1 xx xx bctrl xx dd bl xx xx write ctrl display - - 0 1 0 1 0 1 0 0 1 1 read control value display - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - 54 rdctrld 1 1 0 0 bctrl 0 dd bl 0 0 - - - 0 1 0 1 0 1 0 1 0 1 write adaptive brightness control - yes 55 wrcabc 1 1 xx xx xx xx xx xx cabc[1:0] - - - 0 1 0 1 0 1 0 1 1 0 read adaptive brightness control content - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - 56 rdcabc 1 1 0 0 0 0 0 0 c1 c0 - - - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.182- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 (hex) operation code d/cx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function default (hex) rgb 0 1 0 1 0 1 1 1 1 0 write cabc minimum brightness - yes 5e wrcabcmb 1 1 cmb[7:0] - - - 0 1 0 1 0 1 1 1 1 1 read cabc minimum brightness - yes 1 1 - xx xx xx xx xx xx xx dummy read - - 5f rdcabcmb 1 1 cmb[7:0] - - - 0 1 0 1 1 0 1 0 0 0 read automatic brightness control self-diagnostic result - yes 1 1 xx xx xx xx xx xx xx xx - - - 68 rdabcsdr 1 1 d[7:6] 0 0 0 0 0 0 - - - 0 1 1 1 0 1 1 0 1 0 read id1 - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - da rdid1 1 1 modules manufacturer[7:0] - - - 0 1 1 1 0 1 1 0 1 1 read id2 - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - db rdid2 1 1 1 lcd module/driver version [6:0] - - - 0 1 1 1 0 1 1 1 0 0 read id3 - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - dc rdid3 1 1 lcd module/driver id[7:0] - - - 0 1 1 0 1 0 0 0 0 1 read the ddb from the provided location. - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - 1 1 x x x x x x x x - - - 1 1 x x x x x x x x - - - a1 read_ddb_start 1 1 x x x x x x x x - - - 0 1 1 0 1 0 1 0 0 0 continue reading the ddb from the last read location. - yes 1 1 xx xx xx xx xx xx xx xx dummy read - - 1 1 x x x x x x x x - - - 1 1 x x x x x x x x - - - a8 read_ddb_continue 1 1 x x x x x x x x - - - note: (1) undefined commands are treated as nop (00bhb) command. (2) b0bhb to d9bhb and debhb to ffbhb are for factory use of display supplier. nokia can decide if these commands are available or they are treated as nop (00bhb) commands before shipping to nokia. default value is nop (00bhb). for truly only http://www..net/ datasheet pdf - http://www..net/
-p.183- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.1.2 user define command list table user define command list is available only set setexc command. operation default (hex) code dcx rdx wrx d7 d6 d5 d4 d3 d2 d1 d0 function (hex) 0 1 1 0 1 1 0 0 0 0 set internal oscillator - 1 1 - - - - - - - osc_en - (00h) b0 setosc 1 1 - - - - uadj[3:0] - (0bh) 0 1 1 0 1 1 0 0 0 1 set power related setting - 1 1 vbias_en vsn_en vsp_en vgl_en vgh_en lvgl_en vdddn_hz stb - (01h) 1 1 - - - - - - - dstb - (00h) 1 1 - fs1[2:0] - ap[2:0] - (34h) 1 1 - - - - bt[3:0] - (07h) 1 1 dt[1:0] - - dcdiv[3:0] - (00h) 1 1 - - - btp[4:0] - (0eh) 1 1 - - - btn[4:0] - (0eh) 1 1 vrhp[7:0] - (21h) 1 1 vrhn[7:0] - (29h) 1 1 - - vrmp[5:0] - (19h) 1 1 - - vrmn[5:0] - (19h) 1 1 - - dd_tu vpnl_en - vbs[2:0] - (07h) 1 1 - dc86_div3 dc86_div2 dc86_div1 dc86_div0 xdk1 xdk0 auto_xdk - (22h) 1 1 - dtps[2:0] - dtns[2:0] - (01h) 1 1 a_dc[1:0] a_dtp[2:0] a_dtn[2:0] - (e6h) 1 1 b_dc[1:0] b_dtp[2:0] b_dtn[2:0] - (e6h) 1 1 c_dc[1:0] c_dtp[2:0] c_dtn[2:0] - (e6h) 1 1 d_dc[1:0] d_dtp[2:0] d_dtn[2:0] - (e6h) b1 setpower 1 1 e_dc[1:0] e_dtp[2:0] e_dtn[2:0] - (e6h) 0 1 1 0 1 1 0 0 1 0 set display related register - 1 1 - - - - - - d[1:0] - (00h) 1 1 - res_sel[2:0] rm dfr dm[1:0] (1) - (10h) 1 1 bp [7:0] - (03h) 1 1 fp [7:0] - (03h) 1 1 sap[3:0] - - - - - (70h) 1 1 gen_on[7:0] - (00h) 1 1 gen_off[7:0] - (ffh) 1 1 rtn[7:0] - (00h) 1 1 - - - - tei[3:0] - (00h) 1 1 - - - - - - tep[9:8] - (00h) 1 1 tep[7:0] - (00h) 1 1 bp_pe [7:0] - (03h) 1 1 fp_pe [7:0] - (03h) 1 1 rtn_pe[7:0] - (03h) b2 setdisp 1 1 - - - - - - - gon - (01h) - - - - - note: (1) when bs[3:0]=1101, 1110, 1111 dm[1:0] default =11 other condition, dm[1:0] default =00 - - 0 1 1 0 1 1 0 0 1 1 set rgb interface related register) - b3 setrgbif 1 1 - - - - dpl hspl vspl epl (01h) 0 1 1 0 1 0 0 1 0 0 set display waveform cycles - 1 1 - - - - nw_pe[1:0] nw[1:0] - (00h) 1 1 son[7:0] - (0fh) 1 1 soff[7:0] - (82h) 1 1 eqs[7:0] - (0ch) b4 setcyc 1 1 eqon[7:0] - (03h) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.184- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 1 1 0 1 1 0 1 1 0 set vcom voltage - 1 1 vcmc_f[7:0] - (5eh) b6 setvcom (otpx3) 1 1 vcmc_b[7:0] (5eh) 0 1 1 0 1 1 1 0 0 1 set extended command set - 1 1 extc1[7:0] - (00h/ffh) 1 1 extc2[7:0] - (00h/83h) b9 setextc 1 1 extc3[7:0] - (00h/69h) 0 1 1 0 1 1 1 0 1 0 set mipi control 1 1 dphycmd0[7:0] - (00h) 1 1 dphycmd1[7:0] - (a0h) 1 1 dphycmd2[7:0] - (c6h) 1 1 dsicmd0[7:0] - (00h) 1 1 dsicmd1[7:0] - (0ah) 1 1 dsicmd2[7:0] - (00h) 1 1 dsicmd3[7:0] - (10h) 1 1 dphyotp0[7:0] - (30h) 1 1 dphyotp1[7:0] - (6fh) 1 1 dphyotp2[7:0] - (02h) 1 1 dsiotp0[7:0] - (10h) 1 1 dsiotp1[7:0] - (18h) ba setmipi 1 1 - dsi_initrd y - - - - - - (40h) 0 1 1 0 1 1 1 0 1 1 set otp - 1 1 otp_mask[7:0] - (00h) 1 1 - - - - - - - otp_index[8] - (01h) 1 1 otp_index[7:0] - (ffh) 1 1 otp_load_ disable otp_test otp_por otp_pwe otp_ptm[1:0] vpp_sel otp_prog - (00h) bb setotp 1 1 otp_data[7:0] otp read / write (xxh) 0 1 1 1 0 0 0 0 0 1 set dgc lut - 1 1 - - - - - - dith_opt dgc_en - - 1 1 d1[7:0] - - 1 1 dn[7:0] - - c1 setdgclut 1 1 d126[7:0] - - 0 1 1 1 0 0 0 0 1 1 set id - 1 1 id1[7:0] - (00h) 1 1 0 id2[6:0] - (00h) c3 setid (otpx5) 1 1 id3[7:0] - (00h) 0 1 1 1 0 0 1 1 0 0 set panel related register cc setpanel 1 1 - - - - ss_panel - rev_pane bgr_pane l - (02h) 0 1 1 1 0 1 0 1 0 1 set gip control 1 1 - - - - shr_0[11:8] - (00h) 1 1 shr_0[7:0] - (02h) 1 1 - - - - shr_1[11:8] - (00h) 1 1 shr_1[7:0] - (01h) 1 1 spd[7:0] - (02h) 1 1 chr[7:0] - (03h) 1 1 con[7:0] - (20h) 1 1 coff[7:0] - (6ch) 1 1 shp[3:0] scp[3:0] - (03h) 1 1 chp[3:0] ccp[3:0] - (03h) 1 1 sos_1[3:0] sos_0[3:0] - (00h) 1 1 sos_3[3:0] sos_2[3:0] - (00h) 1 1 cos_1[3:0] cos_0[3:0] - (60h) 1 1 cos_3[3:0] cos_2[3:0] - (04h) 1 1 cos_5[3:0] cos_4[3:0] - (71h) 1 1 cos_7[3:0] cos_6[3:0] - (75h) d5 setgip 1 1 sos_1_ml[3:0] sos_0_ml[3:0] - (00h) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.185- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 1 sos_3_ml[3:0] sos_2_ml[3:0] - (00h) 1 1 cos_1_ml[3:0] cos_0_ml[3:0] - (51h) 1 1 cos_3_ml[3:0] cos_2_ml[3:0] - (57h) 1 1 cos_5_ml[3:0] cos_4_ml[3:0] - (40h) 1 1 cos_7_ml[3:0] cos_6_ml[3:0] - (46h) 1 1 - - gto[5:0] - (01h) 1 1 gno[7:0] - (0ch) 1 1 eq_delay[7:0] - (0ch) 1 1 gip_opt[7:0] - (00h) 0 1 1 1 0 1 1 0 0 1 set the temp senor control 1 1 - - - tsraw[4:0] (read only) 1 1 - - - ts_os2[4:0] - (12h) 1 1 bt_p2[3:0] bt_p1[3:0] - (74h) 1 1 bt_p4[3:0] bt_p3[3:0] - (a7h) 1 1 - - - d0[4:0] - (0ch) 1 1 ts_g[2:0] i0[4:0] - (6ah) 1 1 - ts_os1[4:3] d1[4:0] - (57h) 1 1 ts_os1[2:0] i1[4:0] - (55h) 1 1 pore rer[1:0] d2[4:0] - (17h) d8 settpsnr 1 1 - tf_on tson i2[4:0] - (55h) 0 1 1 1 1 0 0 0 0 0 set gamma curve related setting - 1 1 - - g1_vrp0[5:0] - (00h) 1 1 - - g1_vrp1[5:0] - (18h) 1 1 - - g1_vrp2[5:0] - (1fh) 1 1 - - g1_vrp3[5:0] - (3fh) 1 1 - - g1_vrp4[5:0] - (3fh) 1 1 - - g1_vrp5[5:0] - (3fh) 1 1 - g1_prp0[6:0] - (33h) 1 1 - g1_prp1[6:0] - (57h) 1 1 g1_cgmp0[1:0] - g1_ pkp0[4:0] - (07h) 1 1 g1_cgmp1[1:0] - g1_pkp1[4:0] - (0dh) 1 1 g1_cgmp2[1:0] - g1_pkp2[4:0] - (0fh) 1 1 g1_cgmp3[1:0] - g1_pkp3[4:0] - (13h) 1 1 g1_cgmp5 g1_cgmp4 - g1_pkp4[4:0] - (16h) 1 1 - - - g1_pkp5[4:0] - (14h) 1 1 - - - g1_pkp6[4:0] - (16h) 1 1 - - - g1_pkp7[4:0] - (18h) 1 1 - - - g1_pkp8[4:0] - (1fh) 1 1 - - g1_vrn0[5:0] - (00h) 1 1 - - g1_vrn1[5:0] - (18h) 1 1 - - g1_vrn2[5:0] - (1fh) 1 1 - - g1_vrn3[5:0] - (3fh) 1 1 - - g1_vrn4[5:0] - (3fh) 1 1 - - g1_vrn5[5:0] - (3fh) 1 1 - g1_prn0[6:0] - (33h) 1 1 - g1_prn1[6:0] - (57h) 1 1 g1_cgmn0[1:0] - g1_pkn0[4:0] - (07h) 1 1 g1_cgmn1[1:0] - g1_pkn1[4:0] - (0dh) 1 1 g1_cgmn2[1:0] - g1_pkn2[4:0] - (0fh) 1 1 g1_cgmn3[1:0] - g1_pkn3[4:0] - (13h) 1 1 g1_cgmn5 g1_cgmn4 - g1_pkn4[4:0] - (16h) 1 1 - - - g1_pkn5[4:0] - (14h) 1 1 - - - g1_pkn6[4:0] - (16h) 1 1 - - - g1_pkn7[4:0] - (18h) e0 setgamma (otpx1) 1 1 - - - g1_pkn8[4:0] - (1fh) 0 1 1 1 1 0 1 0 0 1 - - 1 1 otp_key0[7:0] - (00h/aah) e9 setotpkey 1 1 otp_key1[7:0] - (00h/55h) f4 gethxid 0 1 1 1 1 1 0 1 0 0 - - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.186- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 1 himax id[7:0] - (69h) 1 1 version[7:0] (02h) 0 1 1 1 1 1 1 1 0 1 set/get continue command - fd setcncd/ getcncd 1 1 wr_cmd_cn[7:0] - - 0 1 1 1 1 1 1 1 1 0 set read command address - fe set read index 1 1 cmd_add[7:0] - (00h) 0 1 1 1 1 1 1 1 1 1 read command data - 1 1 cmd_data1[7:0] - - 1 1 : - - ff getspiread 1 1 cmd_datan[7:0] - - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.187- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2 command description 6.2.1 nop (00h) nop (no operation) 00h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 0 0 0 00 parameter no parameter description this command is an empty command; it does not have any effect on the display module. however it can be used to terminate frame memory write or read as described in ramwr (memory write) and ramrd (memory read) commands. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.188- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.2 software reset (01h) swreset (software reset) 01h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 1 0 0 0 0 0 0 0 1 01 parameter no parameter description when the software reset command is written, it causes a software reset. it resets the commands and parameters to their s/w reset default values. (see default tables in each command description.) note: the frame memory contents are unaffected by this command it will be necessary to wait 5msec before sending new command following software reset. restriction the display module loads all display suppliers factory default values to the registers during this 5msec. if software reset is applied during sleep out mode, it will be necessary to wait 120msec before sending sleep out command. software reset command cannot be sent during sleep out sequence. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart swreset displaywhole blankscreen setcommands tos/wdefault value sleepinmode legend redandblue parameter display action mode sequential transfer for truly only http://www..net/ datasheet pdf - http://www..net/
-p.189- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.3 rdnumpe: read number of the parity errors (05h) rdnumpe (read number of the parity errors) 05h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 1 0 1 05 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - p7 p6 p5 p4 p3 p2 p1 p0 xx description the first parameter is telling a number of the errors on dsi. the more detailed description of the bits is below. p[6..0] bits are telling a number of the errors. p[7] is set to 1 if there is overflow with p[6..0] bits. p[7..0] bits are set to 0s (as well as rddsm(0eh)s d0 is set 0 at the same time) after there is sent the second parameter information (the read function is completed). restriction setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default p[7:0] = 0x00h flow chart dsi i/f mode host hosthost host driver driverdriver driver legend command parameter display action mode sequential transfer (r05h) rdnumpe send 1st parameter rddsm (r0eh) 's d0 = '0' p[7:0] = "00"h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.190- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.4 get_red_channel (06h) rdred (read red colour) 06h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 1 1 0 06 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - r7 r6 r5 r4 r3 r2 r1 r0 xx description the first parameter is telling red colour value of the first pixel of the frame when there is used dpi i/f. 16 bit format: r5 is msb and r1 is lsb. r7, r6 and r0 are set to 0. 18 bit format: r5 is msb and r0 is lsb. r7 and r6 are set to 0. restriction - register availability status availability sleep out yes default r[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.191- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.5 get_green_channel (07h) rdgreen (read green colour) 07h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 0 1 1 1 07 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - g7 g6 g5 g4 g3 g2 g1 g0 xx description the first parameter is telling green colour value of the first pixel of the frame when there is used dpi i/f. 16 and 18 bit formats: g5 is msb and g0 is lsb. g7 and g6 are set to 0. restriction - register availability status availability sleep out yes default g[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.192- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.6 get_blue_channel (08h) rdblue (read blue colour) 08h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 0 0 08 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - b7 b6 b5 b4 b3 b2 b1 b0 xx description the first parameter is telling blue colour value of the first pixel of the frame when there is used dpi i/f. 16 bit format: b5 is msb and b1 is lsb. b7, b6 and b0 are set to 0. 18 bit format: b5 is msb and b0 is lsb. b7 and b6 are set to 0. restriction - register availability status availability sleep out yes sleep in yes default b[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.193- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.7 get_power_mode (0ah) rddpm (read display power mode) 0ah d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 1 0 0a 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d7 d6 d5 d4 d3 d2 0 0 xx description this command indicates the current status of the display as described in the table below: bit description comment d7 not defined set to 0 d6 idle mode on/off - d5 partial mode on/off - d4 sleep in/out - d3 display normal mode on/off - d2 display on/off - d1 not defined set to 0 d0 not defined set to 0 ? bits d7 for future use and are set to 0. bit d6 C idle mode on/off 0 = idle mode off. 1 = idle mode on. ? bit d5 C partial mode on/off 0 = partial mode off. 1 = partial mode on. bit d4 C sleep in/out 0 = sleep in mode. 1 = sleep out mode. ? bit d3 C display normal mode on/off 0 = display normal mode off. 1 = display normal mode on. bit d2 C display on/off 0 = display is off. 1 = display is on. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x08h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.194- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.8 read display madctl (0bh) rddmadctl (read display madctl) 0bh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 0 1 1 0b 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d7 d6 d5 d4 d3 d2 0 0 xx description this command indicates the current status of the display as described in the table below: bit description comment d7 page address order - d6 column address order - d5 page/column order - d4 line address order - d3 rgb/bgr order - d2 display data latch order - d1 reserved set to 0 d0 reserved set to 0 bit d7 C page address order 0 = top to bottom (when madctl b7=0). 1 = bottom to top (when madctl b7=1). bit d6 C column address order 0 = left to right (when madctl b6=0). 1 = right to left (when madctl b6=1). bit d5 C page/column order 0 = normal (when madctl b5=0). 1 = roration (when madctl b5=1). note: for bits d7 to d5, also refer to section 5.3 mcu to memory write/read direction. bit d4 C line address order 0 = lcd refresh top to bottom (when madctl b4=0). 1 = lcd refresh bottom to top (when madctl b4=1). bit d3 C rgb/bgr order 0 = rgb (when madctl b3=0). 1 = bgr (when madctl b3=1). note: for bits d4 and d3 also refer to section 6.2.31 set_address_mode (36h). bit d2 C display data latch data order 0 = lcd refresh left to right (when madctl b2=0). 1 = lcd refresh right to left (when madctl b2=1). restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.195- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.196- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.9 get_pixel_format (0ch) rddcolmod (read display colmod) 0ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 0 0 0c 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - - d6 d5 d4 - d2 d1 d0 xx description this command indicates the current status of the display as described in the table below: bit description comment d7 reserved set to 0 d6 - d5 - d4 dpi interface pixel format - d3 reserved set to 0 d2 - d1 - d0 dbi interface pixel format - bits d6, d5, d4 C dpi interface colour pixel format definition bits d2, d1, d0 C dbi interface colour pixel format definition. for setting pixel format, see section 6.2.35 set_pixel_format (3ah). d6 d5 d4 interface colour format d2 d1 d0 not defined 0 0 0 not defined 0 0 1 not defined 0 1 0 not defined 0 1 1 not defined 1 0 0 16 bit/pixel 1 0 1 18 bit/pixel 1 1 0 24 bit/pixel 1 1 1 if a particular interface, either dbi or dpi, is not used then the corresponding bits in the parameter returned from the display module are undefined. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x07h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.197- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.198- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.10 get_display_mode (0dh) rddim (read display image mode) 0dh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 0 1 0d 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d7 d6 d5 0 0 d2 d1 d0 xx description this command indicates the current status of the display as described in the table below: bit d7 C vertical scrolling on/off 0 = vertical scrolling is off. 1 = vertical scrolling is on. bit d6 C horizontal scrolling status this bit is not applicable for this project, so it is set to 0 bit d5 C inversion on/off 0 = inversion is off. 1 = inversion is on. bit d4, d4 C reserved bits d2, d1, d0 C gamma curve selection gamma curve selected d2 d1 d0 gamma set (26h) parameter gamma curve 1 0 0 0 gc0 gamma curve 2 0 0 1 gc1 gamma curve 3 0 1 0 gc2 gamma curve 4 0 1 1 gc3 not defined 1 0 0 not defined not defined 1 0 1 not defined not defined 1 1 0 not defined not defined 1 1 1 not defined restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.199- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.11 get_signal_mode (0eh) rddsm (read display signal mode) 0eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 1 0 0e 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d7 d6 0 0 0 0 0 0 xx description this command indicates the current status of the display as described in the table below: bit d7 C tearing effect line on/off 0 = tearing effect line off. 1 = tearing effect on. ? bit d6 C tearing effect line output mode, see section 5.5.3 for mode definitions. 0 = mode 1. 1 = mode 2. d5 are d0 C are for future use and are set to 0. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.200- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.12 get_diagnostic_result (0fh) rddsdr (read display self-diagnostic result) 0fh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 0 1 1 1 1 0f 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 1 - d7 d6 d5 d4 0 0 0 0 xx description the display module returns the self-diagnostic results following a sleep out command. see section 5.15 for a description of the status results. bit d7 C register loading detection bit d6 C functionality detection bit d5 C chip attachment detection set to 0 if feature unimplemented. bit d4 C display glass break detection set to 0 if feature unimplemented. bits d[3:0] C reserved set to 0. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default d[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.201- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.13 enter_sleep_mode (10h) slpin (sleep in) 10h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 0 0 10 parameter no parameter description this command causes the lcd module to enter the minimum power consumption mode. in this mode the dc/dc converter is stopped, internal oscillator is stopped, and panel scanning is stopped. mcu interface and memory are still working and the memory keeps its contents. restriction this command has no effect when module is already in sleep in mode. sleep in mode can only be left by the sleep out command (11h). it will be necessary to wait 5msec before sending next command, this is to allow time for the supply voltages and clock circuits to stabilize. it will be necessary to wait 120msec after sending sleep out command (when in sleep in mode) before sleep in command can be sent. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart it takes 120msec to get into sleep in mode after slpin command issued. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.202- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.14 exit_sleep_omde (11h) slpout (sleep out) 11h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 0 1 11 parameter no parameter description this command turns off sleep mode. in this mode the dc/dc converter is enabled, internal oscillator is started, and panel scanning is started. stop 0v 0v 0v 0v out[1:960] vst etc.(v scanner control logic) dc charge in the capacitor dc:dc converter dc:dc converter dc:dc converter reset pulse for circuit inside panel internal oscillator reset stop start blank memory contents charge restriction this command has no effect when module is already in sleep out mode. sleep out mode can only be left by the sleep in command (10h). it will be necessary to wait 5msec before sending next command, this is to allow time for the supply voltages and clock circuits to stabilize. the display module loads all display suppliers factory default values to the registers during this 5msec and there cannot be any abnormal visual effect on the display image if factory default and register values are same when this load is done and when the display module is already sleep out Cmode. the display module is doing self-diagnostic functions during this 5msec. it will be necessary to alit 120msec after sending sleep in command (when in sleep out mode) before sleep out command can be sent. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default n/a flow chart it takes 120msec to become sleep out mode after slpout command issued. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.203- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.15 enter_partial_mode (12h) ptlon (partial mode on) 12h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 1 0 12 parameter no parameter description this command turns on partial mode the partial mode window is described by the set_partial_area command (30h). to leave partial mode, the enter_norma_mode command (13h) should be written. restrictions this command has no effect when partial mode is active. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart see partial area (30h) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.204- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.16 enter_normal_mode (13h) noron (normal display mode on) 13h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 0 1 0 0 1 1 13 parameter no parameter description this command returns the display to normal mode. normal display mode is means partial mode off, scroll mode off. restriction this command has no effect when normal display mode is active. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart see partial area and vertical scrolling definition descriptions for details of when to use this command. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.205- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.17 exit_inversion_mode (20h) invoff (display inversion off) 20h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 0 0 20 parameter no parameter description this command is used to recover from display inversion mode. this command makes no change of contents of frame memory. this command does not change any other status. (example) memory (example) display restriction this command has no effect when module is already in inversion off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.206- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.18 enter_inversion_mode (21h) invon (display inversion on) 21h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 0 0 1 21 parameter no parameter description this command is used to enter into display inversion mode. this command makes no change of contents of frame memory. every bit is inverted from the frame memory to the display. this command does not change any other status. memory display (example) restriction this command has no effect when module is already in inversion on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.207- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.19 set_gamma_curve (26h) gamset (gamma set) 26h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 0 1 1 0 26 parameter 1 1 - gc7 gc6 gc5 gc4 gc3 gc2 gc1 gc0 1..08 description this command is used to select the desired gamma curve for the current display. a maximum of 4 fixed gamma curves can be selected. the curves are defined in curve correction power supply circuit. the curve is selected by setting the appropriate bit in the parameter as described in the table: gc[7..0] parameter curve selected 01h gc0 gamma curve 1 02h gc1 gamma curve 2 04h gc2 gamma curve 3 08h gc3 gamma curve 4 note: all other values are undefined. restriction values of gc[7..0] not shown in table above are invalid and will not change the current selected gamma curve until valid value is received. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default gc[7:0] = 0x01h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.208- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.20 set_display_off (28h) dispoff (display off) 28h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 0 0 28 parameter no parameter description this command is used to enter into display off mode. in this mode, the output from frame memory is disabled and blank page inserted. this command makes no change of contents of frame memory. this command does not change any other status. there will be no abnormal visible effect on the display. restriction this command has no effect when module is already in display off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart legend command parameter display action mode sequential transfer dispoff display on mode display off mode for truly only http://www..net/ datasheet pdf - http://www..net/
-p.209- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.21 set_display_on (29h) dispon (display on) 29h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 0 1 29 parameter no parameter description this command is used to recover from display off mode. output from the frame memory is enabled. this command makes no change of contents of frame memory. this command does not change any other status. restriction this command has no effect when module is already in display on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default n/a flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.210- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.22 set_clumn_address (2ah) caset (column address set) 2ah d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 1 0 2a 1 st parameter 1 1 - sc15 sc14 sc13 sc12 sc11 sc10 sc9 sc8 00.. 2 nd parameter 1 1 - sc7 sc6 sc5 sc4 sc3 sc2 sc1 sc0 note 1 3 rd parameter 1 1 - ec15 ec14 ec13 ec12 ec11 ec10 ec9 ec8 00 .. 4 th parameter 1 1 - ec7 ec6 ec5 ec4 ec3 ec2 ec1 ec0 note 1 description this command is used to define area of frame memory where mcu can access. this command makes no change on the other driver status. the values of sc[15:0] and ec[15:0] are referred when ramwr command comes. each value represents one column line in the frame memory. sc[15:0] ec[15:0] (example) restriction sc[15:0] always must be equal to or less than ec[15:0] note 1: when sc[15:0] or ec[15:0] is greater than horizontal line (when madctls b5=0) or vertical line (when madctls b5=1), data of out of range will be ignored. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default res_sel[2:0]=000, resoultion 480rgbx864: sc[15:0] = 0x0000h, ec[15:0] = 0x01dfh res_sel[2:0]=001, resoultion 480rgbx854: sc[15:0] = 0x0000h, ec[15:0] = 0x01dfh res_sel[2:0]=010, resoultion 480rgbx800: sc[15:0] = 0x0000h, ec[15:0] = 0x01dfh res_sel[2:0]=011, resoultion 480rgbx640: sc[15:0] = 0x0000h, ec[15:0] = 0x01dfh res_sel[2:0]=100, resoultion 360rgbx640: sc[15:0] = 0x0000h, ec[15:0] = 0x0167h res_sel[2:0]=101, resoultion 480rgbx720: sc[15:0] = 0x0000h, ec[15:0] = 0x01dfh flow chart if needed legend action mode command parameter display sequential transfer caset 1st & 2nd parameter sc[15:0] 3rd & 4th parameter ec[15:0] paset 1st & 2nd parameter sp[15:0] 3rd & 4th parameter ep[15:0] ramwr image data d1[15:0],d2[15:0], ?k.,dn[15:0] any command for truly only http://www..net/ datasheet pdf - http://www..net/
-p.211- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.23 set_page_address (2bh) paset (page address set) 2bh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 0 1 1 2b 1 st parameter 1 1 - sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 00 .. 2 nd parameter 1 1 - sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 note 1 3 rd parameter 1 1 - ep15 ep14 ep13 ep12 ep11 ep10 ep9 ep8 00 .. note 1 4 th parameter 1 1 - ep7 ep6 ep5 ep4 ep3 ep2 ep1 ep0 description this command is used to define area of frame memory where mcu can access. this command makes no change on the other driver status. the values of sp[15:0] and ep[15:0] are referred when ramwr command comes. each value represents one page line in the frame memory. restriction sp[15:0] always must be equal to or less than ep[15:0] note 1: when sp[15:0] or ep[15:0] is greater than vertical line (when madctls b5=0) or horizontal line (when madctls b5=1), data of out of range will be ignored. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default res_sel[2:0]=000, resoultion 480rgbx864: sp[15:0] = 0x0000h, ep[15:0] = 0x035fh res_sel[2:0]=001, resoultion 480rgbx854: sp[15:0] = 0x0000h, ep[15:0] = 0x0355h res_sel[2:0]=010, resoultion 480rgbx800: sp[15:0] = 0x0000h, ep[15:0] = 0x031fh res_sel[2:0]=011, resoultion 480rgbx640: sp[15:0] = 0x0000h, ep[15:0] = 0x027fh res_sel[2:0]=100, resoultion 360rgbx640: sp[15:0] = 0x0000h, ep[15:0] = 0x027fh res_sel[2:0]=101, resoultion 480rgbx720: sp[15:0] = 0x0000h, ep[15:0] = 0x02cfh flow chart ifneeded ifneeded for truly only http://www..net/ datasheet pdf - http://www..net/
-p.212- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.24 write_memory_start (2ch) ramwr (memory write) 2ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 1 0 0 2c 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff n th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the host processor to the display modules frame memory starting at the pixel location specified by preceding set_column_address and set_page_address commands. the column and page registers are reset to the start column (sc) and start page (sp), respectively. pixel data 1 is stored in frame memory at (sc, sp). the column register is then incremented and pixels are written to the frame memory until the column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are written to the frame memory until the page register equals the end page (ep) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignored. restriction in all colour modes, there is no restriction on length of parameters. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default contents of memory is set randomly and not cleared. flow chart legend action mode command parameter display sequential transfer ramwr image data d1[7:0],d2[7:0], ...,dn[7:0] any command for truly only http://www..net/ datasheet pdf - http://www..net/
-p.213- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.25 colour set (2dh) colset (colour set) 2dh dnc nrd nwr d8~d15 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 1 0 1 2d 1 st parameter 1 1 - r007 r006 r005 r004 r003 r002 r001 r000 00..ff : 1 1 - rnn7 rnn6 rnn5 rnn4 rnn3 rnn2 rnn1 rnn0 00..ff 64 th parameter 1 1 - r637 r636 r635 r634 r633 r632 r631 r630 00..ff 65 th parameter 1 1 - g007 g006 g005 g004 g003 g002 g001 g000 00..ff : 1 1 - gnn7 gnn6 gnn5 gnn4 gnn3 gnn2 gnn1 gnn0 00..ff 128 th parameter 1 1 - g637 g636 g635 g634 g633 g632 g631 g630 00..ff 129 th parameter 1 1 - b007 b006 b005 b004 b003 b002 b001 b000 00..ff : 1 1 - bnn7 bnn6 bnn5 bnn4 bnn3 bnn2 bnn1 bnn0 00..ff 192 nd parameter 1 1 - b637 b636 b635 b634 b633 b632 b631 b630 00..ff description this command is used to define the lut for 18bit to 24bit, 16bit-to-24bit colour depth conversions colour depth conversions. 192bytes must be written to the lut regardless of the colour mode. this command has no effect on other commands/parameters and contents of frame memory. visible change takes effect next time the frame memory is written to. restriction this command is needed to be set in write_data for rgb 5-6-5 (65k colours) and rgb 6-6-6 (262k colours) pixel format. the default for command colour set (2dh) is 0x00h. the colour depth conversion must be followed the below tables. once write data is rgb 5-6-5 (65k colours), the set pixel format 0x3a=0x05h command must be set and using the 16bit-to-24bit colour depth conversion. r-g-b=5-6-5 rgbset parameter 24- bit /pixel mode lut 24- bit /pixel value input 16-bit /pixel 1 r00[7:0] 00000000 00000 2 r01[7:0] 00001000 00001 3 r02[7:0] 00010000 00010 .. .. .. .. .. .. .. .. 30 r29[7:0] 11101111 11101 31 r30[7:0] 11110111 11110 32 r31[7:0] 11111111 11111 33 34 35 .. .. 62 63 r 64 not used not used not used 65 g00[7:0] 00000000 000000 66 g01[7:0] 00000100 000001 67 g02[7:0] 00001000 000010 .. .. .. .. .. .. .. .. 126 g61[7:0] 11110111 111101 127 g62[7:0] 11111011 111110 g 128 g63[7:0] 11111111 111111 129 b00[7:0] 00000000 00000 130 b01[7:0] 00001000 00001 131 b02[7:0] 00010000 00010 .. .. .. .. .. .. .. .. 158 b29[7:0] 11101111 11101 159 b30[7:0] 11110111 11110 160 b31[7:0] 11111111 11111 161 162 b 163 not used not used not used for truly only http://www..net/ datasheet pdf - http://www..net/
-p.214- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 .. .. 190 191 192 once write data is rgb 5-6-5 (65k colours), the set pixel format 0x3a=0x06h command must be set and using the 18bit-to-24bit colour depth conversion. r-g-b=6-6-6 rgbset parameter 24- bit /pixel mode lut 24- bit /pixel value input 18-bit /pixel 1 r00[7:0] 00000000 000000 2 r01[7:0] 00000100 000001 3 r02[7:0] 00001000 000010 .. .. .. .. .. .. .. .. 62 r61[7:0] 11110111 111101 63 r62[7:0] 11111011 111110 r 64 r63[7:0] 11111111 111111 65 g00[7:0] 00000000 000000 66 g01[7:0] 00000100 000001 67 g02[7:0] 00001000 000010 .. .. .. .. .. .. .. .. 126 g61[7:0] 11110111 111101 127 g62[7:0] 11111011 111110 g 128 g63[7:0] 11111111 111111 129 b00[7:0] 00000000 000000 130 b01[7:0] 00000100 000001 131 b02[7:0] 00001000 000010 .. .. .. .. .. .. .. .. 190 b61[7:0] 11110111 111101 191 b62[7:0] 11111011 111110 b 192 b63[7:0] 11111111 111111 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value s/w reset contents of the look-up table protected h/w reset r00[7:0]~r63[7:0] =0x00h g00[7:0]~g63[7:0] =0x00h b00[7:0]~b63[7:0] =0x00h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.215- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.216- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.26 raed_memory_start (2eh) ramrd (memory read) 2eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 0 1 1 1 0 2e 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff (n+1) th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the display modules frame memory to the host processor starting at the pixel location specified by preceding set_column_address and set_page_address commands. the column and page registers are reset to the start column (sc) and start page (sp), respectively. pixels are read from frame memory at (sc, sp). the column register is then incremented and pixels read from the frame memory until the column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are read from the frame memory until the page register equals the end page (ep) value or the host processor sends another command. restriction in all colour modes, the frame read is always 24bit so there is no restriction on length of parameters. note C memory read is only possible via the parallel interface. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default contents of memory is set randomly and not cleared. flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.217- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.27 set_partial_area (30h) pltar (partial area) 30h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 0 0 0 30 1 st parameter 1 1 - sr15 sr14 sr13 sr12 sr11 sr10 sr9 sr8 xx 2 nd parameter 1 1 - sr7 sr6 sr5 sr4 sr3 sr2 sr1 sr0 xx 3 rd parameter 1 1 - er15 er14 er13 er12 er11 er10 er9 er8 xx 4 th parameter 1 1 - er7 er6 er5 er4 er3 er2 er1 er0 xx description this command defines the partial modes display area. there are 4 parameters associated with this command, the first defines the start row (sr) and the second the end row (er), as illustrated in the figures below. sr and er refer to the frame memory line pointer. if end row>start row when madctl b4=0:- if end row>start row when madctl b4=1:- sr[15:0] start row er[15:0] partial area end row if end row -p.218- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 default res_sel[2:0]=000, resoultion 480rgbx864: sr[15:0] = 0x0000h, er[15:0] = 0x035fh res_sel[2:0]=001, resoultion 480rgbx854: sr[15:0] = 0x0000h, er[15:0] = 0x0355h res_sel[2:0]=010, resoultion 480rgbx800: sr[15:0] = 0x0000h, er[15:0] = 0x031fh res_sel[2:0]=011, resoultion 480rgbx640: sr[15:0] = 0x0000h, er[15:0] = 0x027fh res_sel[2:0]=100, resoultion 360rgbx640: sr[15:0] = 0x0000h, er[15:0] = 0x027fh res_sel[2:0]=101, resoultion 480rgbx720: sr[15:0] = 0x0000h, er[15:0] = 0x02cfh flow chart 1. to enter partial mode:- legend display action mode command parameter sequential transfer pltar sr[15...0] er[15...0] ptlon partial mode 2. to leave partial mode ramrw partial mode off partial mode dispoff noron image data d1[17:0],d2[17:0], ..., dn[15:0] dispon (optional) to prevent tearing effect image displayed for truly only http://www..net/ datasheet pdf - http://www..net/
-p.219- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.28 set_scroll_area (33h) vscrdef (vertical scrolling definition) 33h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 0 1 1 33 1 st parameter 1 1 - tfa15 tfa14 tfa13 tfa12 tfa11 tfa10 tfa9 tfa8 xx 2 nd parameter 1 1 - tfa7 tfa 6 tfa 5 tfa 4 tfa 3 tfa 2 tfa1 tfa0 xx 3 rd parameter 1 1 - vsa15 vsa14 vsa13 vsa12 vsa11 vsa10 vsa9 vsa8 xx 4 th parameter 1 1 - vsa7 vsa 6 vsa 5 vsa 4 vsa 3 vsa 2 vsa1 vsa0 xx 5 th parameter 1 1 - bfa15 bfa14 bfa13 bfa12 bfa11 bfa10 bfa9 bfa8 xx 6 th parameter 1 1 - bfa7 bfa 6 bfa 5 bfa 4 bfa 3 bfa 2 bfa1 bfa0 xx description this command defines the vertical scrolling area of the display. when madctl b4=0, the 1 st & 2 nd parameter tfa[15..0] describes the top fixed area (in no. of lines from top of the frame memory and display). the 3 rd & 4 th parameter vsa[15..0] describes the height of the vertical scrolling area (in no. of lines of the frame memory [not the display] from the vertical scrolling start address). the first line read from frame memory appears immediately after the bottom most line of the top fixed area. the 5 th & 6 th parameter bfa[15..0] describes the bottom fixed area (in no. of lines from bottom of the frame memory and display). tfa, vsa and bfa refer to the frame memory line pointer. (0 ,0 ) tfa [ 15:0 ] bfa [15:0] scroll area first line read from frame memory topfixedarea bottomfixedarea when madctl b4=1 the 1 st & 2 nd parameter tfa[15..0] describes the top fixed area (in no. of lines from bottom of the frame memory and display). the 3 rd & 4 th parameter vsa[15..0] describes the height of the vertical scrolling area (in no. of lines of the frame memory [not the display] from the vertical scrolling start address). the first line read from frame memory appears immediately after the top most line of the top fixed area. the 5 th & 6 th parameter bfa[15..0] describes the bottom fixed area (in no. of lines from top of the frame memory and display). (0 ,0 ) scroll area first line read from frame memory topfixedarea bottomfixedarea tfa [ 15:0 ] bfa [15:0] restriction the condition is (tfa+vsa+bfa)= vertical line number, otherwise scrolling mode is undefined. in vertical scroll mode, madctl b5 should be set to 0 C this only affects the frame memory write. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes for truly only http://www..net/ datasheet pdf - http://www..net/
-p.220- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 default status default value res_sel[2:0]=000, 480rgbx864 tfa[15..0]= 0x0000h vsa[15..0]= 0x0360h bfa[15..0]= 0x0000h res_sel[2:0]=001, 480rgbx854 tfa[15..0]= 0x0000h vsa[15..0]= 0x0356h bfa[15..0]= 0x0000h res_sel[2:0]=010, 480rgbx800 tfa[15..0]= 0x0000h vsa[15..0]= 0x0320h bfa[15..0]= 0x0000h res_sel[2:0]=011, 480rgbx640 tfa[15..0]= 0x0000h vsa[15..0]= 0x0280h bfa[15..0]= 0x0000h res_sel[2:0]=100, 360rgbx640 tfa[15..0]= 0x0000h vsa[15..0]= 0x0280h bfa[15..0]= 0x0000h res_sel[2:0]=101, tfa[15..0]= 0x0000h vsa[15..0]= 0x02d0h bfa[15..0]= 0x0000h flow charts 1.to enter vertical scroll mode: display action mode legend ramrw scroll mode caset madctl only required for nonrolling scrolling normal mode vscrdef 1st & 2nd parameter tfa[15...0] 3rd & 4th parameter vsa[15...0] 5th & 6th parameter bfa[15...0] 1st & 2nd parameter sc[15...0] 3rd & 4th parameter ec[15...0] paset 1st & 2nd parameter sp[15...0] 3rd & 4th parameter ep[15..0] parameter scroll image data vscrsadd 1st & 2nd parameter vsp[15...0] command parameter sequential transfer redefines the frame memory window that the scroll data will be written to. see note 1 optional ?v it may be necessary to redefine the frame memory write direction. note: the frame memory window size must be defined correctly otherwise undesirable image will be displayed. 2. continuous scroll: for truly only http://www..net/ datasheet pdf - http://www..net/
-p.221- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 action mode legend command parameter display sequential transfer scroll mode caset 1st & 2nd parameter sc[15..0] 3rd & 4th parameter ec[15..0] paset 1st & 2nd parameter sp[15..0] 3rd & 4th parameter ep[15..0] ramrw scroll image data vscrsadd 1st & 2nd parameter vsp[15..0] 3. to leave vertical scroll mode: note: scroll mode can be left by both the normal display mode on (13h) and partial mode on (12h) commands. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.222- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.29 tearing effect line off (34h) teoff (tearing effect line off) 34h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 0 0 34 parameter no parameter description this command is used to turn off (active low) the tearing effect output signal from the te signal line. restriction this command has no effect when tearing effect output is already off. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default off flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.223- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.30 set_tear_on (35h) teon (tearing effect line on) 35h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 0 1 35 parameter 1 1 - x x x x x x x m xx description this command is used to turn on the tearing effect output signal from the te signal line. this output is not affected by changing madctl bit b4. the tearing effect line on has one parameter which describes the mode of the tearing effect output line. (x=dont care). when m=0: the tearing effect output line consists of v-blanking information only: vertical time scale t vdl t vdh when m=1: the tearing effect output line consists of both v-blanking and h-blanking information: t vdh t vdl vertical time scale note: during sleep in mode with tearing effect line on, tearing effect output pin will be active low. restriction this command has no effect when tearing effect output is already on. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default off flow chart teon m legend action mode command parameter display sequential transfer te line output off te line output on for truly only http://www..net/ datasheet pdf - http://www..net/
-p.224- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.31 set_address_mode (36h) madctl (memory access control) 36h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 1 0 36 1 st parameter 1 1 - b7 b6 b5 b4 b3 b2 x x xx description this command defines read/write scanning direction of frame memory. this command makes no change on the other driver status. bit assignment bit name description b7 page address order (my) b6 column address order (mx) b5 page/column selection (mv) these 3 bits controls mcu to memory write/read direction. b4 vertical order (ml) lcd vertical refresh direction control b3 rgb-bgr order (bgr) colour selector switch control (0=rgb colour filter panel, 1=bgr colour filter panel) b2 horizontal order (ss) lcd horizontal refresh direction control b3= 1 sig480 r g b g b g b r r g b g b r r g b g b r r r g b r g b r g b r g b r g b r g b r g b r g b r g b b3= 0 s ig1 sig1 lcd panel sig2 sig480 sig2 rgb-bgr order lcd panel sig480 sig1 sig2 sig1 sig2 sig480 driver ic driver ic sent first (1) sent 2nd sent 3rd sent last (480) sent 3rd sent 2nd sent first (1) sent last (480) note: top-left (0,0) means a physical memory location. bit d1 C switching between segment output and ram bit d0 C switching between common output and ram restriction - for truly only http://www..net/ datasheet pdf - http://www..net/
-p.225- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value power on sequence b7=0,b6=0,b5=0,b4=0,b3=0,b2=0,b1=0,b0=0 s/w reset no change flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.226- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.32 set_scroll_start (37h) vscrsadd (vertical scrolling start address) 37h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 0 1 1 1 37 1 st parameter 1 1 - vsp 15 vsp 14 vsp 13 vsp 12 vsp 11 vsp 10 vsp 9 vsp 8 00. 13f 2 nd parameter 1 1 - vsp 7 vsp 6 vsp 5 vsp 4 vsp 3 vsp 2 vsp 1 vsp 0 description this command is used together with vertical scrolling definition (33h). these two commands describe the scrolling area and the scrolling mode. the vertical scrolling start address command has one parameter which describes the address of the line in the frame memory that will be written as the first line after the last line of the top fixed area on the display as illustrated below:- when madctl b4=0 example: when top fixed area = bottom fixed area = 00, vertical scrolling area = 864(dm=10) and when madctl b4=1 example: when top fixed area = bottom fixed area = 00, vertical scrolling area = 320(dm=10) and when new pointer position and picture data are sent, the result on the display will happen at the next panel scan to avoid tearing effect. vsp refers to the frame memory line pointer. restriction since the value of the vertical scrolling start address is absolute (with reference to the frame memory), it must not enter the fixed area (defined by vertical scrolling definition (33h) C otherwise undesirable image will be displayed on the panel. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out no partial mode on, idle mode on, sleep out no default vsp[15:0]= 0x0000h flow chart see vertical scrolling definition (33h) description. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.227- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.33 idle mode off (38h) idmoff (idle mode off) 38h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 0 0 38 parameter no parameter description this command is used to recover from idle mode on. in the idle off mode, lcd can display maximum 16.7m colours. restriction this command has no effect when module is already in idle off mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default idle mode is off. flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.228- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.34 enter_idle_mode (39h) idmon (idle mode on) 39h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 0 1 39 parameter no parameter description this command is used to enter into idle mode on. in the idle on mode, colour expression is reduced. the primary and the secondary colours using msb of each r, g and b in the frame memory, 8 colour depth data is displayed. display (example) memory memory contents vs. display colour r7 - r0 g7 - g0 b7 - b0 black 0xxxxx 0xxxxx 0xxxxx blue 0xxxxx 0xxxxx 1xxxxx red 1xxxxx 0xxxxx 0xxxxx magent 1xxxxx 0xxxxx 1xxxxx green 0xxxxx 1xxxxx 0xxxxx cyan 0xxxxx 1xxxxx 1xxxxx yellow 1xxxxx 1xxxxx 0xxxxx white 1xxxxx 1xxxxx 1xxxxx x=dont care restriction this command has no effect when module is already in idle on mode. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default idle mode is off. flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.229- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.35 set_pixel_format (3ah) colmod (interface pixel format) 3a h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 0 1 0 3a 1 st parameter 1 1 - x d6 d5 d4 x d2 d1 d0 xx description this command is used to define the format of rgb picture data. d6~d4 : dpi pixel format definition. d2~d0 : dbi pixel format definition. the formats are shown in the table: pixel format d6/d2 d5/d1 d4/d0 not defined 0 0 0 not defined 0 0 1 not defined 0 1 0 not defined 0 1 1 not defined 1 0 0 16 bit/pixel 1 0 1 18 bit/pixel 1 1 0 24 bit/pixel 1 1 1 if a particular interface, enter dbi or dpi, is not used then the correspondind bits in the parameter returned from the display module undefined. restriction there is no visible effect until the frame memory is written to. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence 24 bit/pixel flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.230- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.36 write_memory_contiune (3ch) write_memory_contiune 3ch d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 1 0 0 3c 1 st parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff n th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the host processor to the display modules frame memory continuing from the pixel location following the previous write_memory_continue or write_memory_start command. sending any other command can stop frame write. if set_address_mode b5 = 0: data is written continuing from the pixel location after the write range of the previous write_memory_start or write_memory_continue. the column register is then incremented and pixels are written to the frame memory until the column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are written to the frame memory until the page register equals the end page (ep) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignored. if set_address_mode b5 = 1: data is written continuing from the pixel location after the write range of the previous write_memory_start or write_memory_continue. the page register is then incremented and pixels are written to the frame memory until the page register equals the end page (ep) value. the page register is then reset to sp and the column register is incremented. pixels are written to the frame memory until the column register equals the end column (ec) value or the host processor sends another command. if the number of pixels exceeds (ec C sc + 1) * (ep C sp + 1) the extra pixels are ignored. restriction in all colour modes, there is no restriction on length of parameters. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence contents of memory is set randomly s/w reset contents of memory is set randomly flow chart legend action mode command parameter display sequential transfer ramwr image data d1[7:0],d2[7:0], ...,dn[7:0] any command for truly only http://www..net/ datasheet pdf - http://www..net/
-p.231- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.37 raed_memory_continue (3eh) raed_memory_continue 3eh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 0 1 1 1 1 1 0 3e 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - d17 d16 d15 d14 d13 d12 d11 d10 00..ff : 1 1 - dx7 dx6 dx5 dx4 dx3 dx2 dx1 dx0 00..ff (n+1) th parameter 1 1 - dn7 dn6 dn5 dn4 dn3 dn2 dn1 dn0 00..ff description this command transfers image data from the display modules frame memory to the host processor continuing from the location following the previous read_memory_continue or read_memory_start command. if set_address_mode b5=0: pixels are read continuing from the pixel location after the read range of the previous read_memory_start or read_memory_continue. the column register is then incremented and pixels are read from the frame memory until the column register equals the end column (ec) value. the column register is then reset to sc and the page register is incremented. pixels are read from the frame memory until the page register equals the end page (ep) value or the host processor sends another command. if set_address_mode b5=1: pixels are read continuing from the pixel location after the read range of the previous read_memory_start or read_memory_continue. the page register is then incremented and pixels are read from the frame memory until the page register equals the end page (ep) value. the page register is then reset to sp and the column register is incremented. pixels are read from the frame memory until the column register equals the end column (ec) value or the host processor sends another command. restriction regardless of the color mode set in set_pixel_format, the pixel format returned by read_memory_continue is always 24-bit so there is no restriction on the length of data. a read_memory_start should follow a set_column_address, set_page_address or set_address_mode to define the read location. otherwise, data read with read_memory_continue is undefined. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value power on sequence contents of memory is set randomly flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.232- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.38 set tear scan lines (44h) tesl (tear effect scan lines) 44h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 0 0 1 0 0 44 1 st parameter 1 1 - teline[15:8](8b0) 00..ff 2 nd parameter 1 1 - teline[7:0](8b0) 00..ff description this command is turns on the display modules tearing effect output signal on the te signal line when the display module reacfes line teline. the te signal is not affected by changing madctl bit b4. the tearing effect line on has one parameter which describes the mode of the tearing effect output line. the tearing effect output line consists of v-blanking information only: vertical time scale t vdl t vdh note: that teline=0 is equivalent to temode=0. the tearing effect output line shall be active low when the display module is in sleep mode. restriction the command has no effect when tearing effect output is already on. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default teline[15:0]=0x0000h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.233- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.39 get the current scanline(45h) getscan (get the current scanline) 45h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 0 0 1 0 1 45 1 st parameter 1 1 - sln[15:8](8b0) 00..ff 2 nd parameter 1 1 - sln[7:0](8b0) 00..ff description the display module returns the current scanline, n, used to update the display device. the total number of scanlines on a display device is defined as vsync + vbp + vact + vfp. the first scanline is defined as the first line of v sync and is denoted as line 0. when in sleep mode, the value returned by get_scanline is undefined. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default sln[15:0]= 0x0000h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.234- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.40 write display brightness (51h) wrdisbv (write display brightness) 51h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 0 1 51 1 st parameter 1 1 - dbv[7:0] 00 .. ff description this command is used to adjust the brightness value of the display. it should be checked what the relationship between this written value and output brightness of the display is. this relationship is defined on the display module specification. in principle relationship is that 00h value means the lowest brightness and ffh value means the highest brightness. see chapter 7.17.4 brightness control blockx. restriction - register availability status availability sleep out yes sleep in yes default dbv[7:0]= 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.235- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.41 read display brightness value (52h) rddisbv (read display brightness value) 52h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 1 0 52 1 st parameter 1 1 - xx xx xx xx xx xx xx xx dummy read 2 nd parameter 1 1 - dbv[7:0] xx description this command returns the brightness value of the display. it should be checked what the relationship between this returned value and output brightness of the display. this relationship is defined on the display modulespecification is. in principle the relationship is that 00h value means the lowest brightness and ffh value means the highest brightness. see chapters: 7.17.4 brightness control blockx, 7.14.1 display configuration and 8.2.39 xwrite display brightness (51h)x dbv[7:0] is reset when display is in sleep-in mode. dbv[7:0] is 0 when bit bctrl of 8.2.41 write ctrl display (53h) command is 0. dbv[7:0] is manual set brightness specified with 8.2.41 write ctrl display (53h) command when bit bctrl is 1. when bit bctrl of 8.2.41 write ctrl display (53h) command is 1 and bit c1/c0 of 8.2.43 write content adaptive brightness control (55h) are 0, dbv[7:0] output is the brightness value specified with 8.2.39 write display brightness (51h) command. refers to 2.8.1 display configuration for the function matrix. restriction - register availability status availability sleep out yes sleep in yes default dbv[7:0]= 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.236- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.42 write ctrl display (53h) wrctrld (write control display) 53h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 0 1 1 53 1 st parameter 1 1 - xx xx bctrl xx dd bl xx xx 00 .. ff description this command is used to control display brightness. bctrl: brightness control block on/off, this bit is always used to switch brightness for display. 0 = off (brightness registers are 00h, dbv[7..0]) 1 = on (brightness registers are active, according to the other parameters.) display dimming (dd): (only for manual brightness setting) dd = 0: display dimming is off dd = 1: display dimming is on bl: backlight control on/off 0 = off (completely turn off backlight circuit. control lines must be low. ) 1 = on dimming function is adapted to the brightness registers for display when bit bctrl is changed at dd=1, e.g. bctrl: 0 -> 1 or 1-> 0. when bl bit change from on to off, backlight is turned off without gradual dimming, even if dimming-on (dd=1) are selected. x = dont care. restriction - register availability status availability sleep out yes sleep in yes default d[7:0]= 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.237- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.43 read ctrl value display (54h) rdctrld (read control value display) 54h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 0 0 54 1 st parameter 1 1 - xx xx xx xx xx xx xx xx xx 2 nd arameter 1 1 - 0 0 bctrl 0 dd bl 0 0 xx description this command returns ambient light and brightness control values, see chapter: 8.2.41 write ctrl display (53h)x. bctrl: brightness control block on/off, this bit is always used to switch brightness for display. 0 = off 1 = on display dimming (dd): dd = 0: display dimming is off dd = 1: display dimming is on bl: backlight control on/off 0 = off (completely turn off backlight circuit) 1 = on restriction - register availability status availability sleep out yes sleep in yes default d[7:0]= 0x00h flow chart command displa y action mode parameter sequential transfer legend read rdctrld serial i/f mode read rdctrld dummy read parallel i/f mode host display send 2nd parameter send 2nd parameter for truly only http://www..net/ datasheet pdf - http://www..net/
-p.238- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.44 write content adaptive brightness control (55h) wrcabc (write content adaptive brightness control) 55 h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 0 1 55 1 st parameter 1 1 - xx xx xx xx xx xx cabc[1:0] xx description this command is used to set parameters for image content based adaptive brightness control functionality. there is possible to use 4 different modes for content adaptive image functionality, which are defined on a table below. see chapter 7.17 content adaptive brightness control (cabc). c1 c0 function 0 0 off 0 1 user interface image 1 0 still picture 1 1 moving image x = dont care. restriction register availability status availability sleep out yes sleep in yes default cabc[1:0] = 00 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.239- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.45 read content adaptive brightness control (56h) rdcabc (read content adaptive brightness control) 56h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 0 1 1 0 56 1 st parameter 1 1 - xx xx xx xx xx xx xx xx dummy read 2 nd parameter 1 1 - 0 0 0 0 0 0 c1 c0 xx description this command is used to set parameters for image content based adaptive brightness control functionality. there is possible to use 4 different modes for content adaptive image functionality, which are defined on a table below. see chapter 7.17 content adaptive brightness control (cabc). c1 c0 function 0 0 off 0 1 user interface image 1 0 still picture 1 1 moving image restriction register availability status availability sleep out yes sleep in yes default c[1:0] = 00 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.240- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.46 write cabc minimum brightness (5eh) wrcabcmb (write cabc minimum brightness) 5e h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 1 1 1 0 5e 1 st parameter 1 1 1 - cmb[7:0] 00 .. ff description this command is used to set the minimum brightness value of the display for cabc function. in principle relationship is that 00h value means the lowest brightness for cabc and ffh value means the highest brightness for cabc. see chapter 7.17.4 minimum brightness setting of cabc function. restriction - register availability status availability sleep out yes sleep in yes default cmb[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.241- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.47 read cabc minimum brightness (5fh) rdcabcmb (read cabc minimum brightness) 5fh d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 0 1 1 1 1 1 5f 1 st parameter 1 1 - xx xx xx xx xx xx xx xx xx 2 nd parameter 1 1 - cmb[7:0] xx description this command returns the minimum brightness value of cabc function. in principle the relationship is that 00h value means the lowest brightness and ffh value means the highest brightness. see chapter 7.17.4 minimum brightness setting of cabc function. cmb[7:0] is cabc minimum brightness specified with 8.2.45 write cabc minimum brightness (5eh) command. restriction - register availability status availability sleep out yes sleep in yes default cmb[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.242- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.48 read automatic brightness control self-diagnostic result (68h) rdabcsdr (read automatic brightness control self-diagnostic result) 68h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 0 1 1 0 1 0 0 0 68 1 st parameter 1 1 - xx xx xx xx xx xx xx xx xx 2 nd parameter 1 1 - d[7:6] 0 0 0 0 0 0 xx description this command indicates the status of the display self-diagnostic results for automatic brightness control after sleep out -command as described in the table below: bit d7 C register loading detection see section 5.15.1 register loading detection. bit d6 C functionality detection see section 5.15.2 functionality detection . bits d5, d4, d3, d2, d1 and d0 are for future use and are set to 0. restriction - register availability status availability sleep out yes sleep in yes default d[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.243- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.49 read_ddb_start (a1h) read_ddb_start a1h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 0 0 0 0 1 a1 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - x x x x x x x x xx : 1 1 - x x x x x x x x xx n th parameter 1 1 - x x x x x x x x xx description this command reads identifying and descriptive information from the peripheral. this information is organized in the device descriptor block (ddb) stored on the peripheral. the response to this command returns a sequence of bytes that may be any length up to 64k bytes. note that the returned sequence of bytes does not necessarily correspond to the entire ddb; it may be a portion of a larger block of data. the format of returned data is as follows: parameter 2: ls (least significant) byte of supplier id. supplier id is a unique value assigned to each peripheral supplier by the mipi organization. parameter 3: ms (most significant) byte of supplier id. parameter 4: ls (least significant) byte of supplier elective data. this is a byte of information that is determined by the supplier. it could include model number or revision information, for example. parameter 5: ms (most significant) byte of supplier elective data parameter 6: single-byte escape or exit code (eec). the code is interpreted as follows: - ffh - exit code C there is no more data in the descriptor block - 00h - escape code C there is supplier-proprietary data in the descriptor block (does not conform to any mipi standard) - any other value C there is ddb data in the descriptor block. the format and interpretation of this data is documented in mipi alliance standard for device descriptor block (ddb) . ddbs may contain many more data fields providing information about the peripheral. in a dsi system, read activity takes the form of two separate transactions across the bus: first the read command read_ddb_start from host processor to peripheral, which includes the bus turn-around token. the peripheral then takes control of the bus and returns the requested data. the peripheral response to read_ddb_start is a long packet type, so its length may be up to 64k bytes unless limited by a previous set_max_return_size command. the response to a read_ddb_start command always starts at the beginning of the device descriptor block. after receiving the first packet and processing the returned ddb data, the host processor may initiate a read_ddb_continue command to access the next portion of the ddb. a read_ddb_continue command begins the next read at the location following the last byte of the previous data read from the ddb. subsequent read_ddb_continue commands can be used to read a ddb or supplier-proprietary block of arbitrary size. there is, however, no obligation to read the entire block. the host processor may choose to stop reading after completion of any read_ddb_xxx command. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x00h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.244- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.245- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.50 read_ddb_continue (a8h) read_ddb_continue a8h d/cx rdx wrx d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 0 1 0 0 0 a8 1 st parameter 1 1 - x x x x x x x x dummy read 2 nd parameter 1 1 - x x x x x x x x xx : 1 1 - x x x x x x x x xx n th parameter 1 1 - x x x x x x x x xx description a read_ddb_start command should be executed at least once before a read_ddb_continue command to define the read location. otherwise, data read with a read_ddb_continue command is undefined. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default d[7:0] = 0x00h flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.246- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.51 read id1 (dah) rdid1 (read id1) dah dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 0 1 0 da 1 st parameter 1 1 - - - - - - - - - - 2 nd parameter 1 1 - modules manufacturer[7:0] xx description this read byte identifies the lcd modules manufacturer. it is specified by display supplier and for xx is defined as xxhex. restriction - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id1[7:0]=0x00h define by customer flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.247- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.52 read id2 (dbh) rdid2 (read id2) dbh dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 0 1 1 db 1 st parameter 1 1 - xx xx xx xx xx xx xx xx xx 2 nd parameter 1 1 - - lcd module/driver version [6:0] - description this read byte is used to track the lcd module/driver version. it is defined by display supplier and changes each time a revision is made to the display, material or construction specifications. see table: id byte value v[7:0] version changes 80h 81h 82h 83h 84h 85h x= don't care restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id2[6:0]=0x00h define by customer flow chart legend command parameter display action mode sequential transfer seriali/fmode ( p/sx=low) readid2 send2 nd p arameter readid2 dummyread send2 nd parameter host display paralleli/fmode ( p/sx=high) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.248- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.53 read id3 (dch) rdid3 (read id3) dch dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 1 0 0 dc 1 st parameter 1 1 - xx xx xx xx xx xx xx xx xx 2 nd parameter 1 1 - lcd module/driver id[7:0] xx description this read byte identifies the lcd module/driver. it is specified by display supplier and for this lcd project module is defined as xxhex. restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default default value otp value id3[7:0]=0x00h define by customer flow chart for truly only http://www..net/ datasheet pdf - http://www..net/
-p.249- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.54 setosc: set internal oscillator (b0h) setosc( set internal oscillator) b0h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 1 1 0 0 dc 1 st parameter 1 1 - - - - - - - - osc _en - 2 nd parameter 1 1 - - - - - uadj[3:0] - description this command is used to set internal oscillator related setting osc_en : enable internal oscillator, high active. uadj[3:0]: for user to adjust osc frequency, default is 15 mhz. uadj internal oscillator frequency 0 0 0 0 28.0% 0 0 0 1 34.8% 0 0 1 0 41.5% 0 0 1 1 48.1% 0 1 0 0 54.7% 0 1 0 1 61.3% 0 1 1 0 67.8% 0 1 1 1 74.4% 1 0 0 0 80.6% 1 0 0 1 87.2% 1 0 1 0 93.5% 1 0 1 1 100.0% 1 1 0 0 106.4% 1 1 0 1 112.7% 1 1 1 0 119.4% 1 1 1 1 125.8% restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset osc_en=0, uadj[3:0]= 1011 uadj[3:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.250- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.55 setpower: set power (b1h) setpower( set power related setting) b1h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 0 1 b1 1 st parameter 1 1 - vbia s _en vsn_ en vsp_ en vgl_ en vgh_ en lvgl _en vddd n_hz stb - 2 nd parameter 1 1 - - - - - - - - dstb - 3 rd parameter 1 1 - - fs1[2:0] - ap[2:0] - 4 th parameter 1 1 - - - - - bt[3:0] - 5 th parameter 1 1 - dt[1:0] - - dcdiv[3:0] - 6 th parameter 1 1 - - - - btp[4:0] - 7 th parameter 1 1 - - - - btn[4:0] - 8 th parameter 1 1 - vrhp[7:0] - 9 th parameter 1 1 - vrhn[7:0] - 10 th parameter 1 1 - - - vrmp[5:0] - 11 th parameter 1 1 - - - vrmn[5:0] - 12 th parameter 1 1 - - - dd_tu vpnl _en - vbs[2:0] - 13 th parameter 1 1 - - dc86_div[3:0] xdk1 xdk0 auto _xdk - 14 th parameter 1 1 - - dtps[2:0] - dtns[2:0] - 15 th parameter 1 1 - a_dc[1:0] a_dtp[2:0] a_dtn[2:0] - 16 th parameter 1 1 - b_dc[1:0] b_dtp[2:0] b_dtn[2:0] - 17 th parameter 1 1 - c_dc[1:0] c_dtp[2:0] c_dtn[2:0] - 18 th parameter 1 1 - d_dc[1:0] d_dtp[2:0] d_dtn[2:0] - 19 th parameter 1 1 - e_dc[1:0] e_dtp[2:0] e_dtn[2:0] - description this command is used to set related setting of power. dstb: when dstb = 1, the HX8369-A into the deep_standby mode, where all display operation stops, suspend all the internal operations including the internal r-c oscillator. during the standby mode, only the following process can be executed. 1. exit the standby mode (dstb = 0) in the deep standby mode, the gram data and register content may be lost. for preventing this, they have to reset again after the deep standby mode cancel. stb: when slp = 1, the HX8369-A enters the standby mode, where all display operation stops, suspend all the internal operations. but the internal r-c oscillator stop or not is determined by osc_en bit. to minimize the standby power, please set osc_en to 0. during the standby mode, only the following process can be executed. a. exit the standby (sleep) mode (slp = 0) b. enable or disable the oscillation c. software reset vsp_en: on/off the operation of vsp circuit. vsp_en operation of vsp dc/dc circuit 0 off 1 on vsn_en: on/off the operation of vsn circuit. vsn_en operation of vsn dc/dc circuit 0 off 1 on vgh_en: on/off the operation of vgh charge bump circuit. vgh_en operation of vgh charge bump circuit 0 off 1 on for truly only http://www..net/ datasheet pdf - http://www..net/
-p.251- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 vgl_en operation of vgl charge bump circuit 0 off 1 on lvgl_en : on/off the operation of lvgl charge bump circuit. lvgl_en operation of lvgl charge bump circuit 0 off 1 on bt3 bt2 bt1 bt0 vgh vgl 0 0 0 0 2*(vsp-vsn) vdddn-1*(vsp-vsn) 0 0 0 1 2*(vsp-vsn) -1*(vsp-vsn) 0 0 1 0 2*(vsp-vsn) vdd3-1*(vsp-vsn) 0 0 1 1 (vsp-vsn)+(vdd3-vsn) vdddn-1*(vsp-vsn) 0 1 0 0 (vsp-vsn)+(vdd3-vsn) -1*(vsp-vsn) 0 1 0 1 (vsp-vsn)+(vdd3-vsn) vdd3-1*(vsp-vsn) 0 1 1 0 (vsp-vsn)+(vsp-vssd) vdddn-1*(vsp-vsn) 0 1 1 1 (vsp-vsn)+(vsp-vssd) -1*(vsp-vsn) 1 0 0 0 (vsp-vsn)+(vsp-vssd) vdd3-1*(vsp-vsn) 1 0 0 1 (vdd3-vsn)+(vsp-vssd) vdddn-1*(vsp-vsn) 1 0 1 0 (vdd3-vsn)+(vsp-vssd) -1*(vsp-vsn) 1 0 1 1 (vdd3-vsn)+(vsp-vssd) vdd3-1*(vsp-vsn) 1 1 0 0 (vsp-vsn) vdddn-1*(vsp-vsn) 1 1 0 1 (vsp-vsn) -1*(vsp-vsn) 1 1 1 0 (vsp-vsn) vdd3-1*(vsp-vsn) 1 1 1 1 2*(vsp-vssd) -2*(vsp-vssd) fs1[2:0]: set the operating frequency of the step-up circuit for vgh and vgl voltage generation. fs12 fs11 fs10 operation frequency of step-up circuit 0 0 0 inhibit 0 0 1 fosc/64 0 1 0 fosc/128 0 1 1 fosc/256 1 0 0 fosc/512 1 0 1 fosc/1024 1 1 0 fosc/2048 1 1 1 fosc/4096 vdddn_hz: choose external or internal vdddn power. vdddn_hz=0, vdddn= -2.5v. vdddn_hz=1, vdddn output hz. (for external vdddn.) dcdiv[3:0]: set the normal operate frequency of dc/dc converter circuit during normal mode. for pfm circuit: set the operate frequency of dc/dc converter circuit for pfm design. (pccs[1:0]=00, pccs[1:0]=01, pccs[1:0]=10) dcdiv3 dcdiv2 dcdiv1 dcdiv0 normal operate frequency of dc/dc converter 0 0 0 0 fosc / 1 0 0 0 1 fosc / 2 0 0 1 0 fosc / 3 0 0 1 1 fosc / 4 0 1 0 0 fosc / 5 0 1 0 1 fosc / 6 0 1 1 0 fosc / 7 0 1 1 1 fosc / 8 1 0 0 0 fosc / 1 1 0 0 1 fosc / 2 1 0 1 0 fosc / 3 1 0 1 1 fosc / 4 1 1 0 0 fosc / 5 1 1 0 1 fosc / 6 1 1 1 0 fosc / 7 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.252- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 1 1 1 fosc / 8 dt[1:0]: delay time of power on and power off sequence. dt1 dt0 delay time of power on and power off sequence on (ms) 0 0 5ms 0 1 10ms 1 0 15ms 1 1 20ms dtps[2:0]: set the soft start operating duty cycle of dc/dc circuit. (pfm dc/dc circuit). 1 duty cycle = 1 m clock dtps2 dtps1 dtps0 soft start operating duty cycle of dc/dc circuit circuit 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 8 dtns[2:0]: set the soft start operating duty cycle of dc/dc circuit. (pfm dc/dc circuit). 1 duty cycle = 1 m clock dtns2 dtns1 dtns0 soft start operating duty cycle of dc/dc circuit circuit 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 8 btp[4:0]: switch the output factor for dc/dc circuit for vsp voltage generation. the lcd drive voltage level vsp can be selected according to the characteristic of liquid crystal which panel used. btp4 btp3 btp2 btp1 btp0 vsp 0 0 0 0 0 3.01 0 0 0 0 1 3.15 0 0 0 1 0 3.29 0 0 0 1 1 3.46 0 0 1 0 0 3.60 0 0 1 0 1 3.74 0 0 1 1 0 3.91 0 0 1 1 1 4.05 0 1 0 0 0 4.19 0 1 0 0 1 4.36 0 1 0 1 0 4.50 0 1 0 1 1 4.64 0 1 1 0 0 4.81 0 1 1 0 1 4.95 0 1 1 1 0 5.09 0 1 1 1 1 5.26 1 0 0 0 0 5.40 1 0 0 0 1 5.54 1 0 0 1 0 5.71 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.253- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 0 0 1 1 inhibit ????? inhibit 1 1 1 1 1 inhibit btn[4:0]: switch the output factor of dc/dc circuit for vsn voltage generation. the lcd drive voltage level vsn can be selected according to the characteristic of liquid crystal which panel used. while using pfm type-c or hx5186-a mode (pccs1-0 = 10, pccs1-0 = 11), vsn is followed the btp[4:0] setting. pfm mode type-c : vsn = -vsp + 0.6v using hx5186-a charge pump mode : vsn = -vsp ap[2:0]: adjust the amount of fixed current from the fixed current source for the operational amplifier in the power supply circuit. when the amount of fixed current is increased, the lcd driving capacity and the display quality are high, but the current consumption is increased. this is a tradeoff, adjust the fixed current by considering both the display quality and the current consumption. during no display operation, when ap[2:0] = 000, the current consumption can be reduced by stopping the operations of operational amplifier and step-up circuit. ap2 ap1 ap0 constant current of operational amplifier 0 0 0 stop 0 0 1 0.5 m a 0 1 0 1 m a 0 1 1 1.5 m a 1 0 0 2 m a 1 0 1 2.5 m a 1 1 0 3 m a 1 1 1 3.5 m a vrhp[7:0]: vspr regulator output control setting for source data output driving. vrhp[7:0] vspr 0 0 0 0 0 0 0 0 3.488 0 0 0 0 0 0 0 1 3.516 0 0 0 0 0 0 1 0 3.544 0 0 0 0 0 0 1 1 3.572 0 0 0 0 0 1 0 0 3.600 0 0 0 0 0 1 0 1 3.628 0 0 0 0 0 1 1 0 3.656 0 0 0 0 0 1 1 1 3.684 0 0 0 0 1 0 0 0 3.713 0 0 0 0 1 0 0 1 3.741 0 0 0 0 1 0 1 0 3.769 0 0 0 0 1 0 1 1 3.797 0 0 0 0 1 1 0 0 3.825 0 0 0 0 1 1 0 1 3.853 0 0 0 0 1 1 1 0 3.881 0 0 0 0 1 1 1 1 3.909 0 0 0 1 0 0 0 0 3.938 0 0 0 1 0 0 0 1 3.966 0 0 0 1 0 0 1 0 3.994 0 0 0 1 0 0 1 1 4.022 0 0 0 1 0 1 0 0 4.050 0 0 0 1 0 1 0 1 4.078 0 0 0 1 0 1 1 0 4.106 0 0 0 1 0 1 1 1 4.134 0 0 0 1 1 0 0 0 4.163 0 0 0 1 1 0 0 1 4.191 0 0 0 1 1 0 1 0 4.219 0 0 0 1 1 0 1 1 4.247 0 0 0 1 1 1 0 0 4.275 0 0 0 1 1 1 0 1 4.303 0 0 0 1 1 1 1 0 4.331 0 0 0 1 1 1 1 1 4.359 0 0 1 0 0 0 0 0 4.388 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.254- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 0 1 0 0 0 0 1 4.416 0 0 1 0 0 0 1 0 4.444 0 0 1 0 0 0 1 1 4.472 0 0 1 0 0 1 0 0 4.500 0 0 1 0 0 1 0 1 4.528 0 0 1 0 0 1 1 0 4.556 0 0 1 0 0 1 1 1 4.584 0 0 1 0 1 0 0 0 4.613 0 0 1 0 1 0 0 1 4.641 0 0 1 0 1 0 1 0 4.669 0 0 1 0 1 0 1 1 4.697 0 0 1 0 1 1 0 0 4.725 0 0 1 0 1 1 0 1 4.753 0 0 1 0 1 1 1 0 4.781 0 0 1 0 1 1 1 1 4.809 0 0 1 1 0 0 0 0 4.838 0 0 1 1 0 0 0 1 4.866 0 0 1 1 0 0 1 0 4.894 0 0 1 1 0 0 1 1 4.922 0 0 1 1 0 1 0 0 4.950 0 0 1 1 0 1 0 1 4.978 0 0 1 1 0 1 1 0 5.006 0 0 1 1 0 1 1 1 5.034 0 0 1 1 1 0 0 0 5.063 0 0 1 1 1 0 0 1 5.091 0 0 1 1 1 0 1 0 5.119 00111011 ~ 01111110 inhibit 0 1 1 1 1 1 1 1 vsp 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz vrhn[7:0]: vsnr regulator output control setting for source data output driving. vrhn[7:0] vsnr 0 0 0 0 0 0 0 0 -3.263 0 0 0 0 0 0 0 1 -3.291 0 0 0 0 0 0 1 0 -3.319 0 0 0 0 0 0 1 1 -3.347 0 0 0 0 0 1 0 0 -3.375 0 0 0 0 0 1 0 1 -3.403 0 0 0 0 0 1 1 0 -3.431 0 0 0 0 0 1 1 1 -3.459 0 0 0 0 1 0 0 0 -3.488 0 0 0 0 1 0 0 1 -3.516 0 0 0 0 1 0 1 0 -3.544 0 0 0 0 1 0 1 1 -3.572 0 0 0 0 1 1 0 0 -3.600 0 0 0 0 1 1 0 1 -3.628 0 0 0 0 1 1 1 0 -3.656 0 0 0 0 1 1 1 1 -3.684 0 0 0 1 0 0 0 0 -3.713 0 0 0 1 0 0 0 1 -3.741 0 0 0 1 0 0 1 0 -3.769 0 0 0 1 0 0 1 1 -3.797 0 0 0 1 0 1 0 0 -3.825 0 0 0 1 0 1 0 1 -3.853 0 0 0 1 0 1 1 0 -3.881 0 0 0 1 0 1 1 1 -3.909 0 0 0 1 1 0 0 0 -3.938 0 0 0 1 1 0 0 1 -3.966 0 0 0 1 1 0 1 0 -3.994 0 0 0 1 1 0 1 1 -4.022 0 0 0 1 1 1 0 0 -4.050 0 0 0 1 1 1 0 1 -4.078 0 0 0 1 1 1 1 0 -4.106 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.255- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 0 0 1 1 1 1 1 -4.134 0 0 1 0 0 0 0 0 -4.163 0 0 1 0 0 0 0 1 -4.191 0 0 1 0 0 0 1 0 -4.219 0 0 1 0 0 0 1 1 -4.247 0 0 1 0 0 1 0 0 -4.275 0 0 1 0 0 1 0 1 -4.303 0 0 1 0 0 1 1 0 -4.331 0 0 1 0 0 1 1 1 -4.359 0 0 1 0 1 0 0 0 -4.388 0 0 1 0 1 0 0 1 -4.416 0 0 1 0 1 0 1 0 -4.444 0 0 1 0 1 0 1 1 -4.472 0 0 1 0 1 1 0 0 -4.500 0 0 1 0 1 1 0 1 -4.528 0 0 1 0 1 1 1 0 -4.556 0 0 1 0 1 1 1 1 -4.584 0 0 1 1 0 0 0 0 -4.613 0 0 1 1 0 0 0 1 -4.641 0 0 1 1 0 0 1 0 -4.669 0 0 1 1 0 0 1 1 -4.697 0 0 1 1 0 1 0 0 -4.725 0 0 1 1 0 1 0 1 -4.753 0 0 1 1 0 1 1 0 -4.781 0 0 1 1 0 1 1 1 -4.809 0 0 1 1 1 0 0 0 -4.838 0 0 1 1 1 0 0 1 -4.866 0 0 1 1 1 0 1 0 -4.894 0 0 1 1 1 0 1 1 -4.922 0 0 1 1 1 1 0 0 -4.950 0 0 1 1 1 1 0 1 -4.978 0 0 1 1 1 1 1 0 -5.006 0 0 1 1 1 1 1 1 -5.034 0 1 0 0 0 0 0 0 -5.063 0 1 0 0 0 0 0 1 -5.091 0 1 0 0 0 0 1 0 -5.119 01000011 ~ 01111110 inhibit 0 1 1 1 1 1 1 1 vsn 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz vrmp[5:0]: the positive polarity gamma amplitude voltage setting (vspr-vgsp). vrmp[5:0] vspr-vgsp 0 0 0 0 0 0 2.588 0 0 0 0 0 1 2.644 0 0 0 0 1 0 2.700 0 0 0 0 1 1 2.756 0 0 0 1 0 0 2.813 0 0 0 1 0 1 2.869 0 0 0 1 1 0 2.925 0 0 0 1 1 1 2.981 0 0 1 0 0 0 3.038 0 0 1 0 0 1 3.094 0 0 1 0 1 0 3.150 0 0 1 0 1 1 3.206 0 0 1 1 0 0 3.263 0 0 1 1 0 1 3.319 0 0 1 1 1 0 3.375 0 0 1 1 1 1 3.431 0 1 0 0 0 0 3.488 0 1 0 0 0 1 3.544 0 1 0 0 1 0 3.600 0 1 0 0 1 1 3.656 0 1 0 1 0 0 3.713 0 1 0 1 0 1 3.769 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.256- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 1 0 1 1 0 3.825 0 1 0 1 1 1 3.881 0 1 1 0 0 0 3.938 0 1 1 0 0 1 3.994 0 1 1 0 1 0 4.050 0 1 1 0 1 1 4.106 0 1 1 1 0 0 4.163 0 1 1 1 0 1 4.219 0 1 1 1 1 0 4.275 0 1 1 1 1 1 4.331 1 0 0 0 0 0 4.388 1 0 0 0 0 1 4.444 1 0 0 0 1 0 4.500 1 0 0 0 1 1 4.556 1 0 0 1 0 0 4.613 1 0 0 1 0 1 4.669 1 0 0 1 1 0 4.725 1 0 0 1 1 1 4.781 1 0 1 0 0 0 4.838 1 0 1 0 0 1 4.894 1 0 1 0 1 0 4.950 1 0 1 0 1 1 5.006 1 0 1 1 0 0 5.063 1 0 1 1 0 1 5.119 1 0 1 1 1 0 inhibit ????? inhibit 1 1 1 1 1 0 inhibit 1 1 1 1 1 1 vspr(vgsp=vssa) vrmn[5:0]: the negitive polarity gamma amplitude voltage setting (vsnr-vgsn). vrmn[5:0] vsnr-vgsn 0 0 0 0 0 0 -2.588 0 0 0 0 0 1 -2.644 0 0 0 0 1 0 -2.700 0 0 0 0 1 1 -2.756 0 0 0 1 0 0 -2.813 0 0 0 1 0 1 -2.869 0 0 0 1 1 0 -2.925 0 0 0 1 1 1 -2.981 0 0 1 0 0 0 -3.038 0 0 1 0 0 1 -3.094 0 0 1 0 1 0 -3.150 0 0 1 0 1 1 -3.206 0 0 1 1 0 0 -3.263 0 0 1 1 0 1 -3.319 0 0 1 1 1 0 -3.375 0 0 1 1 1 1 -3.431 0 1 0 0 0 0 -3.488 0 1 0 0 0 1 -3.544 0 1 0 0 1 0 -3.600 0 1 0 0 1 1 -3.656 0 1 0 1 0 0 -3.713 0 1 0 1 0 1 -3.769 0 1 0 1 1 0 -3.825 0 1 0 1 1 1 -3.881 0 1 1 0 0 0 -3.938 0 1 1 0 0 1 -3.994 0 1 1 0 1 0 -4.050 0 1 1 0 1 1 -4.106 0 1 1 1 0 0 -4.163 0 1 1 1 0 1 -4.219 0 1 1 1 1 0 -4.275 0 1 1 1 1 1 -4.331 1 0 0 0 0 0 -4.388 1 0 0 0 0 1 -4.444 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.257- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 0 0 0 1 0 -4.500 1 0 0 0 1 1 -4.556 1 0 0 1 0 0 -4.613 1 0 0 1 0 1 -4.669 1 0 0 1 1 0 -4.725 1 0 0 1 1 1 -4.781 1 0 1 0 0 0 -4.838 1 0 1 0 0 1 -4.894 1 0 1 0 1 0 -4.950 1 0 1 0 1 1 -5.006 1 0 1 1 0 0 -5.063 1 0 1 1 0 1 -5.119 1 0 1 1 1 0 inhibit ????? inhibit 1 1 1 1 1 0 inhibit 1 1 1 1 1 1 vsnr(vgsn=vssa) vbs[2:0]: set the vbias level. vbs2 vbs1 vbs0 vbias 0 0 0 inhibit 0 0 1 4.68 0 1 0 4.50 0 1 1 4.32 1 0 0 4.14 1 0 1 3.96 1 1 0 3.78 1 1 1 3.60 dc86_div[3:0]: frequency for charge pump mode (hx5186-a) dc86_div[3:0] frequency - charge pump mode (hx5186-a) 0000 fosc/2 0001 fosc/4 0010 fosc/8 0011 fosc/16 0100 fosc/24 0101 fosc/32 0110 fosc/40 0111 fosc/48 1000 fosc/56 1001 fosc/64 1010 fosc/72 1011 fosc/80 1100 fosc/88 1101 fosc/96 1110 fosc/104 1111 fosc/112 xdk[1:0]: setting hx5186-a xdk[1] xdk[0] hx5186-a or internal-charge pump 0 0 x1.5 pump 0 1 x2 pump 1 0 x3 pump 1 1 inhibited auto_xdk: auto xdk function enable, when using hx5186-a. auto_xdk=1 hx5186-a vdd3 x 1.5 > vsptarget x1.5 vdd3 x 2 > vsptarget x2 vdd3 x 2 < vsptarget x3 auto_xdk=0 depend on xdk[2:0] dd_tu: in-house function, and not open. vpnl_en: enable vpnl function. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.258- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 restriction setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset vbias_en=0, vsn_en=0, vsp_en=0, vgl_en=0, vgh_en=0, lvgl_en=0, vdddn_hz=0, stb=1, dstb=0, fs1[2:0]=011, ap[2:0]=100, bt[3:0]=111, dt[1:0] =00, dcdiv[3:0]=0000, btp[4:0]=01110, btn[4:0]=01110, vrhp[7:0]=0x21h, vrhn[7:0]=0x29h, vrmp[5:0]=0x19h, vrmn[5:0]=0x19h, dd_tu= 0, vpnl_en=0, vbs[2:0]=111, dc86_div[3:0]=0111, xdk1=0, xdk0=1, auto_xdk=0, dtps[2:0]=000, dtns[2:0]=001, a_dc[1:0]=11, a_dtp[2:0]=100, a_dtn[2:0]=110, b_dc[1:0]=11, b_dtp[2:0]=100, b_dtn[2:0]=110, c_dc[1:0]=11, c_dtp[2:0]=100, c_dtn[2:0]=110, d_dc[1:0]=11, d_dtp[2:0]=100, d_dtn[2:0]=110, e_dc[1:0]=11, e_dtp[2:0]=100, e_dtn[2:0]=110, fs1[2:0], ap[2:0], bt[3:0], dt[1:0], dcdiv[3:0], btp[4:0], btn[4:0], vrhp[7:0], vrhn[7:0], vrmp[5:0], vrmn[5:0], dd_tu, vpnl_en, vbs[2:0], dc86_div[3:0], xdk1, xdk0, auto_xdk, dtps[2:0], dtns[2:0], a_dc[1:0], a_dtp[2:0], a_dtn[2:0]. b_dc[1:0], b_dtp[2:0], b_dtn[2:0], c_dc[1:0], c_dtp[2:0], c_dtn[2:0], d_dc[1:0], d_dtp[2:0], d_dtn[2:0], e_dc[1:0], e_dtp[2:0], e_dtn[2:0], for truly only http://www..net/ datasheet pdf - http://www..net/
-p.259- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.56 setdisp: set display related register (b2h) setdisp( set display related register) b2h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 1 0 b2 1 st parameter 1 1 - - - - - - - d[1:0] 2 nd parameter 1 1 - - res_sel[2:0] rm dfr dm[1:0] 3 rd parameter 1 1 - bp [7:0] 4 th parameter 1 1 fp [7:0] 5 th parameter 1 1 - sap[3:0] - - - - 6 th parameter 1 1 - gen_on[7:0] 7 th parameter 1 1 - gen_off[7:0] 8 th parameter 1 1 - rtn[7:0] 9 th parameter 1 1 - - - - - tei[3:0] 10 th parameter 1 1 - - - - - - - tep[9:8] 11 th parameter 1 1 - tep[7:0] 12 th parameter 1 1 - bp_pe[7:0] 13 th parameter 1 1 - fp_pe[7:0] 14 th parameter 1 1 - rtn_pe[7:0] 15 th parameter 1 1 - - - - - - - - gon description this command is used to set display related register d1C0: d1 d0 source output HX8369-A internal display operations 0 0 vssd halt 0 1 inhibit inhibit 1 0 v255 operate 1 1 display operate res_sel[2:0] : resolution selection. res_sel 2 res_sel 1 res_sel 0 resolution 0 0 0 480rgbx864 0 0 1 480rgbx854 0 1 0 480rgbx800 0 1 1 480rgbx640 1 0 0 360 rgbx640 1 0 1 480rgbx720 1 1 0 setting disable 1 1 1 setting disable rm the bit is used to select an interface for the frame memory access operation. the frame memory is accessed only via the interface defined by rm bit. because the interface can be selected separately from display operation mode, writing data to the frame memory is possible via system interface when rm = 0, even in the dpi display operation. rm setting is enabled from the next frame. wait 1 frame to transfer data after setting rm interface for ram access 0 dbi interface (cpu) 1 dpi interface (rgb) dm[1:0] the bit is used to select display operation mode. the setting allows switching between display operation in synchronization with internal oscillation clock, vsync, or dip signal. note that switching between vsync and dpi operation is prohibited. dm 1 dm 0 display mode 0 0 internal oscillation clock 0 1 dpi signal 1 0 vsync signal for truly only http://www..net/ datasheet pdf - http://www..net/
-p.260- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 fp[7:0]: specify the amount of scan line for front porch (fp). bp[7:0] : specify the amount of scan line for back porch(bp). fp_pe[7:0]: specify the amount of scan line for front porch (fp) on partial idle mode. bp_pe[7:0] : specify the amount of scan line for back porch(bp) on partial idle mode. fp[7:0] / fp_pe[7:0] bp[7:0] / bp_pe[7:0] number of fp line number of bp line 8h00 inhibited 8h01 3 lines 8h02 4 lines 8h03 5 lines 8h04 6 lines 8h05 7 lines ??? ??? 8hfb 253 lines 8hfc 254 lines 8hfd 255 lines 8hfe 256 lines 8hff 257 lines sap3 sap2 sap1 sap0 fixed current of operational amplifier 0 0 0 0 0.5u 0 0 0 1 1u 0 0 1 0 1.5u 0 0 1 1 2u 0 1 0 0 2.5u 0 1 0 1 3u 0 1 1 0 3.5u 0 1 1 1 4u ???????????? 1 1 1 1 8u gen_on[7:0]: gamma op turned on timing and in-house function not open. gen_off[7:0]: gamma op turned off timing and in-house function not open. rtn[7:0]: a cycle time of line width, in-house funct ion not open. rtn_pe[7:0]: a cycle time of line width on partial idle mode, in-house function not open. rtn[7:0]/ rtn_pe[7:0] c lock per line 8h00 275 clocks 8h01 (275 + 1x2) 277 clocks 8h02 (275 + 2x2) 279 clocks 8h03 (275 + 3x2) 281 clocks ??? ??? 8hfd (275 + 253x2) 781 clocks 8hfe (275 + 254x2) 783 clocks 8hff (275 + 255x2) 785 clocks tei[3:0]: s ets the output interval of te signal according to the display data rewrite cycle and data transfer rate. tei3 tei2 tei1 tei0 output interval 0 0 0 0 1 frame 0 0 0 1 2 frames 0 0 1 0 3 frames ??????? ?? 1 1 1 0 15 frames for truly only http://www..net/ datasheet pdf - http://www..net/
-p.261- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 1 1 1 16 frames tep[9:0]: sets the output position of frame cycle signal. te can be used as the trigger signal for frame synchronous write operation. make sure the setting restriction 9h000 tep[9:0] bp+number of line +fp. tep[9:0] output position 10h000 0th line 10h001 1st line 10h002 2nd line 10h003 3rd line ??? ??? 10h35d 861th line 10h35e 862th line 10h35f 863th line restrictions setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset d[1:0]=00, res_sel[2:0]=001, rm=0, dfr=0, dm[1:0]=00 bp[7:0]=0x03h, fp[7:0]=0x03h, sap[3:0]=0111, gen_on=0x00h, gen_off=0xffh, rtn[7:0]=0x00h, tei[3:0] =0000,tep[9:0] =0x000h, bp_pe[7:0]=0x03h, fp_pe[7:0]=0x03h, rtn_pe[7:0]=0x00h, gon=1 res_sel[2:0], rm, dfr, dm[1:0] bp[7:0], fp[7:0], sap[3:0], gen_on, gen_off, rtn[7:0], tei[3:0], tep[9:0], bp_pe[7:0], fp_pe[7:0], rtn_pe[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.262- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.57 setrgbif: set rgb interface related register (b3h) setrgbif( set rgb interface related register) b3h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 0 1 1 b3 1 st parameter 1 1 - - - - - dpl hspl vspl epl - description this command is used to set rgb interface related register. epl: specify the polarity of de pin in rgb interface mode. epl de pin display 0 0 enable 0 1 disable 1 0 disable 1 1 enable vspl: the polarity of vs pin. when vspl=0, the vs pin is low active. when vspl=1, the vs pin is high active. hspl: the polarity of hs pin. when hspl=0, the hs pin is low active. when hspl=1, the hs pin is high active. dpl: the polarity of pclk pin. when dpl=0, the data is read on the rising edge of pclk signal. when dpl=1, the data is read on the falling edge of pclk signal. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset dpl=0,hspl=0,vspl=0,epl=1 dpl,hspl,vspl,epl for truly only http://www..net/ datasheet pdf - http://www..net/
-p.263- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.58 setcyc: set display waveform cycle (b4h) setcyc( set display waveform cycles) b4h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 0 0 1 0 0 b4 1 st parameter 1 1 - - - - - nw_pe[1:0] nw[1:0] - 2 nd parameter 1 1 - son[7:0] - 3 rd parameter 1 1 - soff[7:0] - 4 th parameter 1 1 - eqs[7:0] - 5 th parameter 1 1 - eqon[7:0] - description this command is used to get setting of display waveform cycles. nw[1:0] : inversion type setting. nw1 nw0 inversion type 0 0 column inversion 0 1 1-dot inversion 1 0 2-dot inversion 1 1 zig-zag inversion nw_pe[1:0] : inversion type setting on partial idle mode. nw_pe1 nw_pe0 inversion type 0 0 column inversion 0 1 1-dot inversion 1 0 2-dot inversion 1 1 zig-zag inversion son[7:0] : specify the valid source output start time. son [7:0] source output start time 0 0 0 0 0 0 0 0 inhibit 0 0 0 0 0 0 0 1 1 osc clock cycle 0 0 0 0 0 0 1 0 2 osc clock cycle 0 0 0 0 0 0 1 1 3 osc clock cycle 0 0 0 0 0 1 0 0 4 osc clock cycle for truly only http://www..net/ datasheet pdf - http://www..net/
-p.264- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 ????? ????? 0 0 0 0 1 1 1 1 15 osc clock cycle ????? ????? 1 1 1 1 1 0 1 0 250 osc clock cycle 1 1 1 1 1 0 1 1 251 osc clock cycle 1 1 1 1 1 1 0 0 252 osc clock cycle 1 1 1 1 1 1 0 1 253 osc clock cycle 1 1 1 1 1 1 1 0 254 osc clock cycle 1 1 1 1 1 1 1 1 255 osc clock cycle soff[7:0] : specify the valid source output end time. soff [7:0] source output end time 0 0 0 0 0 0 0 0 inhibit 0 0 0 0 0 0 0 1 1 osc clock cycle 0 0 0 0 0 0 1 0 2 osc clock cycle 0 0 0 0 0 0 1 1 3 osc clock cycle 0 0 0 0 0 1 0 0 4 osc clock cycle ????? ????? 1 0 0 0 0 0 1 0 130 osc clock cycle ????? ????? 1 1 1 1 1 0 1 0 250 osc clock cycle 1 1 1 1 1 0 1 1 251 osc clock cycle 1 1 1 1 1 1 0 0 252 osc clock cycle 1 1 1 1 1 1 0 1 253 osc clock cycle 1 1 1 1 1 1 1 0 254 osc clock cycle 1 1 1 1 1 1 1 1 255 osc clock cycle eqon[7:0] : specify the valid equalize output start time. (please note that the eqon[7:0] eqs[7:0]-1) eqon [7:0] gate output start time 0 0 0 0 0 0 0 0 inhibit 0 0 0 0 0 0 0 1 1 osc clock cycle 0 0 0 0 0 0 1 0 2 osc clock cycle 0 0 0 0 0 0 1 1 3 osc clock cycle 0 0 0 0 0 1 0 0 4 osc clock cycle ????? ????? 0 0 0 0 1 1 0 0 12 osc clock cycle ????? ????? 1 1 1 1 1 0 1 0 250 osc clock cycle 1 1 1 1 1 0 1 1 251 osc clock cycle 1 1 1 1 1 1 0 0 252 osc clock cycle 1 1 1 1 1 1 0 1 253 osc clock cycle 1 1 1 1 1 1 1 0 254 osc clock cycle 1 1 1 1 1 1 1 1 255 osc clock cycle eqs[7:0] : specify the equalize time of source output. (please note that the eqs[7:0] son-1). eqs [7:0] equalize time of source output 0 0 0 0 0 0 0 0 equalize function off 0 0 0 0 0 0 0 1 1 osc clock cycle 0 0 0 0 0 0 1 0 2 osc clock cycle 0 0 0 0 0 0 1 1 3 osc clock cycle 0 0 0 0 0 1 0 0 4 osc clock cycle 0 0 0 0 0 1 0 1 5 osc clock cycle 0 0 0 0 0 1 1 0 6 osc clock cycle ????? ????? 1 1 1 1 1 0 1 0 250 osc clock cycle 1 1 1 1 1 0 1 1 251 osc clock cycle for truly only http://www..net/ datasheet pdf - http://www..net/
-p.265- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 1 1 1 1 1 1 0 0 252 osc clock cycle 1 1 1 1 1 1 0 1 253 osc clock cycle 1 1 1 1 1 1 1 0 254 osc clock cycle 1 1 1 1 1 1 1 1 255 osc clock cycle restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset nw_pe[1:0]=00,nw[1:0]=00, son[7:0]=0x0fh,soff[7:0]=0x82h, eqs[7:0]=0x0ch, eqon[7:0]=0x03h nw_pe[1:0], nw[1:0], son[7:0], soff[7:0], eqs[7:0], eqon[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.266- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.59 setvcom: set vcom voltage (b6h) setvcom ( set vcom voltage) b6 h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 0 1 1 0 b6 1 st parameter 1 1 - vcmc_f[7:0] - 2 nd parameter 1 1 - vcmc_b[7:0] - description this command is used to set vcom voltage include vcom low and vcom high voltage. vcmc_f[7:0]: dc vcom voltage setting for forward scan. vcmc_b[7:0]: dc vcom voltage setting for backward scan. vcmc_f[7:0] / vcmc_b[7:0] d7 d6 d5 d4 d3 d2 d1 d0 vcom (v) 0 0 0 0 0 0 0 0 -2 0 0 0 0 0 0 0 1 -1.984 0 0 0 0 0 0 1 0 -1.968 0 0 0 0 0 0 1 1 -1.952 0 0 0 0 0 1 0 0 -1.936 0 0 0 0 0 1 0 1 -1.92 0 0 0 0 0 1 1 0 -1.904 0 0 0 0 0 1 1 1 -1.888 0 0 0 0 1 0 0 0 -1.872 0 0 0 0 1 0 0 1 -1.856 0 0 0 0 1 0 1 0 -1.84 0 0 0 0 1 0 1 1 -1.824 0 0 0 0 1 1 0 0 -1.808 0 0 0 0 1 1 0 1 -1.792 0 0 0 0 1 1 1 0 -1.776 0 0 0 0 1 1 1 1 -1.76 0 0 0 1 0 0 0 0 -1.744 0 0 0 1 0 0 0 1 -1.728 0 0 0 1 0 0 1 0 -1.712 0 0 0 1 0 0 1 1 -1.696 0 0 0 1 0 1 0 0 -1.68 0 0 0 1 0 1 0 1 -1.664 0 0 0 1 0 1 1 0 -1.648 0 0 0 1 0 1 1 1 -1.632 0 0 0 1 1 0 0 0 -1.616 0 0 0 1 1 0 0 1 -1.6 0 0 0 1 1 0 1 0 -1.584 0 0 0 1 1 0 1 1 -1.568 0 0 0 1 1 1 0 0 -1.552 0 0 0 1 1 1 0 1 -1.536 0 0 0 1 1 1 1 0 -1.52 0 0 0 1 1 1 1 1 -1.504 0 0 1 0 0 0 0 0 -1.488 0 0 1 0 0 0 0 1 -1.472 0 0 1 0 0 0 1 0 -1.456 0 0 1 0 0 0 1 1 -1.44 0 0 1 0 0 1 0 0 -1.424 0 0 1 0 0 1 0 1 -1.408 0 0 1 0 0 1 1 0 -1.392 0 0 1 0 0 1 1 1 -1.376 0 0 1 0 1 0 0 0 -1.36 0 0 1 0 1 0 0 1 -1.344 0 0 1 0 1 0 1 0 -1.328 0 0 1 0 1 0 1 1 -1.312 0 0 1 0 1 1 0 0 -1.296 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.267- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 0 1 0 1 1 0 1 -1.28 0 0 1 0 1 1 1 0 -1.264 0 0 1 0 1 1 1 1 -1.248 0 0 1 1 0 0 0 0 -1.232 0 0 1 1 0 0 0 1 -1.216 0 0 1 1 0 0 1 0 -1.2 0 0 1 1 0 0 1 1 -1.184 0 0 1 1 0 1 0 0 -1.168 0 0 1 1 0 1 0 1 -1.152 0 0 1 1 0 1 1 0 -1.136 0 0 1 1 0 1 1 1 -1.12 0 0 1 1 1 0 0 0 -1.104 0 0 1 1 1 0 0 1 -1.088 0 0 1 1 1 0 1 0 -1.072 0 0 1 1 1 0 1 1 -1.056 0 0 1 1 1 1 0 0 -1.04 0 0 1 1 1 1 0 1 -1.024 0 0 1 1 1 1 1 0 -1.008 0 0 1 1 1 1 1 1 -0.992 0 1 0 0 0 0 0 0 -0.976 0 1 0 0 0 0 0 1 -0.96 0 1 0 0 0 0 1 0 -0.944 0 1 0 0 0 0 1 1 -0.928 0 1 0 0 0 1 0 0 -0.912 0 1 0 0 0 1 0 1 -0.896 0 1 0 0 0 1 1 0 -0.88 0 1 0 0 0 1 1 1 -0.864 0 1 0 0 1 0 0 0 -0.848 0 1 0 0 1 0 0 1 -0.832 0 1 0 0 1 0 1 0 -0.816 0 1 0 0 1 0 1 1 -0.8 0 1 0 0 1 1 0 0 -0.784 0 1 0 0 1 1 0 1 -0.768 0 1 0 0 1 1 1 0 -0.752 0 1 0 0 1 1 1 1 -0.736 0 1 0 1 0 0 0 0 -0.72 0 1 0 1 0 0 0 1 -0.704 0 1 0 1 0 0 1 0 -0.688 0 1 0 1 0 0 1 1 -0.672 0 1 0 1 0 1 0 0 -0.656 0 1 0 1 0 1 0 1 -0.64 0 1 0 1 0 1 1 0 -0.624 0 1 0 1 0 1 1 1 -0.608 0 1 0 1 1 0 0 0 -0.592 0 1 0 1 1 0 0 1 -0.576 0 1 0 1 1 0 1 0 -0.56 0 1 0 1 1 0 1 1 -0.544 0 1 0 1 1 1 0 0 -0.528 0 1 0 1 1 1 0 1 -0.512 0 1 0 1 1 1 1 0 -0.496 0 1 0 1 1 1 1 1 -0.48 0 1 1 0 0 0 0 0 -0.464 0 1 1 0 0 0 0 1 -0.448 0 1 1 0 0 0 1 0 -0.432 0 1 1 0 0 0 1 1 -0.416 0 1 1 0 0 1 0 0 -0.4 0 1 1 0 0 1 0 1 -0.384 0 1 1 0 0 1 1 0 -0.368 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.268- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 1 1 0 0 1 1 1 -0.352 0 1 1 0 1 0 0 0 -0.336 0 1 1 0 1 0 0 1 -0.32 0 1 1 0 1 0 1 0 -0.304 0 1 1 0 1 0 1 1 -0.288 0 1 1 0 1 1 0 0 -0.272 0 1 1 0 1 1 0 1 -0.256 0 1 1 0 1 1 1 0 -0.24 0 1 1 0 1 1 1 1 -0.224 0 1 1 1 0 0 0 0 -0.208 0 1 1 1 0 0 0 1 -0.192 0 1 1 1 0 0 1 0 -0.176 0 1 1 1 0 0 1 1 -0.16 0 1 1 1 0 1 0 0 -0.144 0 1 1 1 0 1 0 1 -0.128 0 1 1 1 0 1 1 0 -0.112 0 1 1 1 0 1 1 1 -0.096 0 1 1 1 1 0 0 0 -0.08 0 1 1 1 1 0 0 1 -0.064 0 1 1 1 1 0 1 0 -0.048 0 1 1 1 1 0 1 1 -0.032 0 1 1 1 1 1 0 0 -0.016 01111101 ~ 01111101 inhibit 0 1 1 1 1 1 1 0 vcomr 0 1 1 1 1 1 1 1 vssa 10000000 ~ 11111110 inhibit 1 1 1 1 1 1 1 1 hz restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset vcmc_f[7:0]=0x5eh, vcmc_b[7:0]=0x5eh vcmc_f[7:0], vcmc_b[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.269- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.60 setextc: set extension command (b9h) setextc ( set extended command set) b9h dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 1 0 0 1 b9 1 st parameter 1 1 - extc1[7:0](ffh) - 2 nd parameter 1 1 - extc2[7:0](83h) - 3 rd parameter 1 1 - extc3[7:0](69h) - description this command is used to set extended command set access enable. extend cmd command description enable after command (b0h), must write 3 parameters (ffh,83h,69h) by order disable(default) after command(b0h), write 3 parameters (xxh,xxh,xxh) any value is all right, but can not be (ffh,83h,69h) restrictions - register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset extc1[7:0]=0x00h, extc2[7:0]=0x00h, extc3[7:0]=0x00h, n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.270- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.61 setmipi: (bah) setmipi ( set extended command set) bah dnc nrd nwr d15~d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 0 0 1 ba 1 st parameter 1 1 - dphycmd0[7:0] - 2 nd parameter 1 1 - dphycmd1[7:0] - 3 rd parameter 1 1 - dphycmd2[7:0] - 4 th parameter 1 1 - dsicmd0[7:0] - 5 th parameter 1 1 - dsicmd1[7:0] - 6 th parameter 1 1 - dsicmd2[7:0] - 7 th parameter 1 1 - dsicmd3[7:0] - 8 th parameter 1 1 - dphyotp0[7:0] - 9 th parameter 1 1 - dphyotp1[7:0] - 10 th parameter 1 1 - dphyotp2[7:0] - 11 th parameter 1 1 - dsiotp0[7:0] - 12 th parameter 1 1 - dsiotp1[7:0] - 13 th parameter 1 1 - - dsi_ini trdy - - - - - - - description in-house function and not open. command table r egister name hardware setting dphycmd0[7: 0]=0x00h default setting is fixed. dphycmd1[7: 0]=0xa0h default setting is fixed. dphycmd2[7: 0]=0xc6h default setting is fixed. register name hardware setting dsicmd0[7: 0]=0x00h default setting is fixed. dsicmd1[7: 0]=0x0ah default setting is fixed. dsicmd2[7: 0]=0x00h default setting is fixed. dsicmd3[7: 0]=0x10h default setting is fixed. in-house function and not open. otp table: r egister name dsi otp setting dphyotp0[7:0] default setting is fixed. dphyotp1[7:0] default setting is fixed. dphyotp2[7:0] default setting is fixed. dsi data lane number setting dsiotp0[7:0] (00)nw0 data lane number 0x10h one data lane mode 0x11h two data lane mode restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset dphycmd0[7:0]=0x00h, dphycmd1[7:0]=0xa0h, dphycmd2[7:0]=0xc6h, dsicmd0[7:0]=0x00h, dsicmd1[7:0]=0x0ah, dsicmd2[7:0]=0x00h, dsicmd3[7:0]=0x10h, dphyotp0[7:0]=0x30h, dphyotp0[7:0] dphyotp1[7:0] dphyotp2[7:0] dsiotp0[7:0] dsiotp1[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.271- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 dphyotp1[7:0]=0x6fh, dphyotp2[7:0]=0x02h, dsiotp0[7:0]=0x10h, dsiotp1[7:0]=0x18h, dsi_initrdy=1 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.272- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.62 setotp: set otp (bbh) setotp( set otp related setting) bbh dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 0 1 1 1 0 1 1 bb 1 st parameter 1 1 - otp_mask[7:0] (8'b0) - 2 nd parameter 1 1 - - - - - - - - otp_index[8] 3 rd parameter 1 1 - otp_index[7:0] - 4 th parameter 1 1 - otp_load_ disable otp_test otp_por otp_pwe otp_ptm[1:0] vpp_sel otp_prog - 5 th parameter 1 1 - otp_data[7:0] - description this command is used to set otp related setting. otp_mask[7:0]: bit programming mask, if 1, means this bit cant be programmed. otp_index[8:0]: set index of otp table for programming. otp_pwe: otp program write enable, if 1, means otp is able to be programmed. otp_prog: when set to 1, the register content of otp index is programmed. otp_load_disable : normally the internal registers are auto-loaded from otp when the slpout command is received. nevertheless, if this bit is set to 1, it will disable the auto loading function when the slpout command was received. in general, this bit is used when otp is not yet programmed. otp_ptm[1:0] : not open, internal use. vpp_sel: when written to 1, vpp voltage is fed to otp o tp_data[7:0]: read back the otp index data. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset otp_mask[7:0]=0x00h, otp_index[8:0]=0x1ffh, otp_load_ disable=0, otp_test=0, otp_por=0, otp_pwe=0, otp_ptm[1:0]=00, vpp_sel=0, otp_prog=0, otp_data[7:0]=xxh n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.273- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.63 setdgclut: set dgc lut (c1h) setdgclut ( set dgc lut) c1h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 0 0 0 1 c1 1 st parameter 1 1 - - - - - - - dith_opt dgc_en - 2 nd parameter 1 1 - d1[7:0] - : 1 1 - dn[7:0] - 127 th parameter 1 1 - d126[7:0] - description this command is used to set dgc lut. dith_opt: not open, internal use. dgc_en: enable the dgc function d1[7:0] ~ d126[7:0]: lut d7 d6 d5 d4 d3 d2 d1 d0 default 1 st r009 r008 r007 r006 r005 r004 r003 r002 00h 2 nd r019 r018 r017 r016 r015 r014 r013 r012 08h 3 rd r029 r028 r027 r026 r025 r024 r023 r022 10h : : : : : : : : : : : : : : : : : : : : 32 rd r319 r318 r317 r316 r315 r314 r313 r312 f8h 33 rd r329 r328 r327 r326 r325 r324 r323 r322 ffh 34 th r001 r000 r011 r010 r021 r020 r031 r030 00h 35 th r041 r040 r051 r050 r061 r060 r071 r070 00h : : : : : : : : : : : : : : : : : : : : 41 st r281 r280 r291 r290 r301 r300 r311 r310 00h 42 nd r321 r320 0 0 0 0 0 0 00h 43 rd g009 g008 g007 g006 g005 g004 g003 g002 00h 44 th g019 g018 g017 g016 g015 g014 g013 g012 08h 45 th g029 g028 g027 g026 g025 g024 g023 g022 10h : : : : : : : : : : : : : : : : : : : : 74 th g319 g318 g317 g316 g315 g314 g313 g312 f8h 75 th g329 g328 g327 g326 g325 g324 g323 g322 ffh 76 th g001 g000 g011 g010 g021 g020 g031 g030 00h 77 th g041 g040 g051 g050 g061 g060 g071 g070 00h : : : : : : : : : : : : : : : : : : : : 83 rd g281 g280 g291 g290 g301 g300 g311 g310 00h 84 th g321 g320 0 0 0 0 0 0 00h 85 th b009 b008 b007 b006 b005 b004 b003 b002 00h 86 th b019 b018 b017 b016 b015 b014 b013 b012 08h 87 th b029 b028 b027 b026 b025 b024 b023 b022 10h : : : : : : : : : : : : : : : : : : : : 116 th b319 b318 b317 b316 b315 b314 b313 b312 f8h 117 th b329 b328 b327 b326 b325 b324 b323 b322 ffh 118 th b001 b000 b011 b010 b021 b020 b031 b030 00h 119 th b041 b040 b051 b050 b061 b060 b071 b070 00h : : : : : : : : : : : : : : : : : : : : 125 th b281 b280 b291 b290 b301 b300 b311 b310 00h 126 th b321 b320 0 0 0 0 0 0 00h write d1[7:0] (r 1st), d43[7:0] (g 1st) and d85[7:0] (b 1st), but read is from d1[7:0], d2[7:0] and d3[7:0] restrictions setextc turn on to enable this command. register availability status availability idle mode off, sleep out yes idle mode on, sleep out yes sleep in or booster off yes for truly only http://www..net/ datasheet pdf - http://www..net/
-p.274- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 default status default value otp value power on sequence s/w reset h/w reset dith_opt dgc_en d1[7:0]~d126[7:0] dith_opt dgc_en d1[7:0]~d126[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.275- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.64 setid: set id (c3h) setid ( set id) c3h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 0 0 1 1 c3 1 st parameter 1 1 - id1[7:0] - 2 nd parameter 1 1 - 0 id2[6:0] - 3 rd parameter 1 1 - id3[7:0] - description this command is used to set id (rdah, rdbh, rdch) value. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset id1[7:0]=0x00h, id2[6:0]=0x00h, id3[7:0]=0x00h, id1[7:0], id2[6:0], id3[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.276- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.65 setpanel (cch) setpanel( set panel related register) cch dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 0 1 1 0 0 cc 1 st parameter 1 1 - - - - - ss_panel - rev_panel bgr_panel - description0 this command is used to set setting of panel related register and make panel module meets below spec from viewpoint of user bgr_panel : the order of dot color for module supplier, default value is stored in otp. if color filter of panel is type, setting bgr_panel = 1, if color filter of panel is type, setting bgr_panel = 0. this bit is to make panel module look like a type panel form the user viewpoint. ss_panel : specify the shift direction of source driver output. when ss_panel = 0, the shift direction from s1 to s1440 when ss_panel = 1, the shift direction from s1440 to s1. rev_panel: select the inversion of the display of all characters and graphics. this setting allows the display of the same data on both normally-white and normally-black panels. rev_panel = 1 normal-white panel rev_panel = 0 normal-black panel restrictions setextc turn on to enable this command register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset ss_panel=0, rev_pane=1, bgr_panel=0 ss_panel, rev_pane, bgr_panel for truly only http://www..net/ datasheet pdf - http://www..net/
-p.277- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.66 setgip (d5h) setgip d5h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 0 1 0 1 d5 1 st parameter 1 1 - - - - - shr_0[11:8] - 2 nd parameter 1 1 - shr_0[7:0] - 3 rd parameter 1 1 - - - - - shr_1[11:8] - 4 th parameter 1 1 - shr_1[7:0] - 5 th parameter 1 1 - spd[7:0] - 6 th parameter 1 1 - chr[7:0] - 7 th parameter 1 1 - con[7:0] - 8 th parameter 1 1 - coff[7:0] - 9 th parameter 1 1 - shp[3:0] scp[3:0] - 10 th parameter 1 1 - chp[3:0] ccp[3:0] 11 th parameter 1 1 - sos_1[4:0] sos_0[3:0] - 12 th parameter 1 1 - sos_3[4:0] sos_2[3:0] - 13 th parameter 1 1 - cos_1[4:0] cos_0[3:0] - 14 th parameter 1 1 - cos_3[4:0] cos_2[3:0] - 15 th parameter 1 1 - cos_5[4:0] cos_4[3:0] - 16 th parameter 1 1 - cos_7[4:0] cos_6[3:0] - 17 th parameter 1 1 - sos_1_ml[3:0] sos_0_ml[3:0] - 18 th parameter 1 1 - sos_3_ml[3:0] sos_2_ml[3:0] - 19 th parameter 1 1 - cos_1_ml[3:0] cos_0_ml[3:0] - 20 th parameter 1 1 - cos_3_ml[3:0] cos_2_ml[3:0] - 21 th parameter 1 1 - cos_5_ml[3:0] cos_4_ml[3:0] - 22 th parameter 1 1 - cos_7_ml[3:0] cos_6_ml[3:0] - 23 th parameter 1 1 - - - gto[5:0] - 24 th parameter 1 1 - gno[7:0] - 25 th parameter 1 1 - eq_delay[7:0] - 26 th parameter 1 1 - gip_opt[7:0] - description this command is used for gip timing output control. ~ ~ shr_0[11:0]:stv_0 hsync rise shr_0[11:0] start pulse 0 output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync for truly only http://www..net/ datasheet pdf - http://www..net/
-p.278- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xffeh 4094 x hsync 0xfffh 4095 x hsync shr_1[11:0]:stv_1 hsync rise shr_1[11:0] start pulse 1 output delay 0x000h 0 x hsync 0x001h 1 x hsync 0x002h 2 x hsync 0x003h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xffeh 4094 x hsync 0xfffh 4095 x hsync spd[7:0]: stv pulse delay spd[7:0] start pulse output delay 0x00h 0 x osc clk 0x01h 1 x osc clk 0x02h 2 x osc clk 0x03h 3 x osc clk 0x04h 4 x osc clk 0x05h 5 x osc clk ????? 0xfeh 254 x osc clk 0xffh 255 x osc clk chr[7:0]: ck hsync rise chr[7:0] start pulse 1 output delay 0x00h 0 x hsync 0x01h 1 x hsync 0x02h 2 x hsync 0x03h 3 x hsync 0x004h 4 x hsync 0x005h 5 x hsync ????? 0xfeh 254 x hsync 0xffh 255 x hsync con[7:0]: ck pulse delay con[7:0] ck pulse output delay 0x00h 0 x osc clk 0x01h 1 x osc clk 0x02h 2 x osc clk 0x03h 3 x osc clk 0x04h 4 x osc clk 0x05h 5 x osc clk ????? 0xfeh 254 x osc clk 0xffh 255 x osc clk note: avoid con[7:0] osc lck width > 1-line width coff[7:0]: ck pulse width coff[7:0] ck pulse output 0x00h inhibit 0x01h 1 x osc clk for truly only http://www..net/ datasheet pdf - http://www..net/
-p.279- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0x02h 2 x osc clk 0x03h 3 x osc clk 0x04h 4 x osc clk 0x05h 5 x osc clk ????? 0xfeh 254 x osc clk 0xffh 255 x osc clk note: coff[7:0] value must bigger than con[7:0] value shp[3:0]: width of stv high pulse shp3 shp2 shp1 shp0 start pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync scp[3:0]: a cycle of stv pulse scp3 scp2 scp1 scp0 start pulse cycle 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync chp[3:0]: width of ck high pulse chp3 chp2 chp1 chp0 ck pulse width 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync ccp[3:0]: a cycle of ck pulse ccp3 ccp2 ccp1 ccp0 ck pulse cycle 0 0 0 0 1 x hsync 0 0 0 1 2 x hsync 0 0 1 0 3 x hsync 0 0 1 1 4 x hsync 0 1 0 0 5 x hsync 0 1 0 1 6 x hsync ????? 1 1 1 0 15 x hsync 1 1 1 1 16 x hsync sos_0[3:0] for cgout9_l pulse selector sos_1[3:0] for cgout10_l pulse selector for truly only http://www..net/ datasheet pdf - http://www..net/
-p.280- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 sos_2[3:0] for cgout9_r pulse selector sos_3[3:0] for cgout10_r pulse selector sos_0/1/2/3[3] sos_0/1/2/3[2] sos_0/1/2/3[1] sos_0/1/2/3[0] signal type 0 0 0 0 stv-0 0 0 0 1 stv-1 0 0 1 0 stv-2 0 0 1 1 stv-3 0 1 0 0 ck-0 0 1 0 1 ck-1 0 1 1 0 ck-2 0 1 1 1 ck-3 1 0 0 0 ck-4 1 0 0 1 ck-5 1 0 1 0 ck-6 1 0 1 1 ck-7 1 1 0 0 inhibit 1 1 0 1 inhibit 1 1 1 0 inhibit 1 1 1 1 inhibit cos_0[3:0] for cgout5l pulse selector cos_1[3:0] for cgout6l pulse selector cos_2[3:0] for cgout7l pulse selector cos_3[3:0] for cgout8l pulse selector cos_4[3:0] for cgout5r pulse selector cos_5[3:0] for cgout6r pulse selector cos_6[3:0] for cgout7r pulse selector cos_7[3:0] for cgout8r pulse selector cos_0-7[3] cos_0-7[2] cos_0-7[1] cos_0-7[0] signal type 0 0 0 0 stv-0 0 0 0 1 stv-1 0 0 1 0 stv-2 0 0 1 1 stv-3 0 1 0 0 ck-0 0 1 0 1 ck-1 0 1 1 0 ck-2 0 1 1 1 ck-3 1 0 0 0 ck-4 1 0 0 1 ck-5 1 0 1 0 ck-6 1 0 1 1 ck-7 1 1 0 0 inhibit 1 1 0 1 inhibit 1 1 1 0 inhibit 1 1 1 1 inhibit once the r36h ml=1 the stv gate control signals are refered to the below registers: sos_0_ml[3:0] for cgout9_l pulse selector sos_1_ml[3:0] for cgout10_l pulse selector sos_2_ml[3:0] for cgout9_r pulse selector sos_3_ml[3:0] for cgout10_r pulse selector sos_0-3_ml[3] sos_0-3_ml[2] sos_0-3_ml[1] sos_0-3_ml[0] signal type 0 0 0 0 stv-0 0 0 0 1 stv-1 0 0 1 0 stv-2 0 0 1 1 stv-3 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.281- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 0 1 0 0 ck-0 0 1 0 1 ck-1 0 1 1 0 ck-2 0 1 1 1 ck-3 1 0 0 0 ck-4 1 0 0 1 ck-5 1 0 1 0 ck-6 1 0 1 1 ck-7 1 1 0 0 inhibit 1 1 0 1 inhibit 1 1 1 0 inhibit 1 1 1 1 inhibit once the r36h ml=1 the ck gate control signals are refered to the below registers: cos_0_ml[3:0] for cgout5l pulse selector cos_1_ml[3:0] for cgout6l pulse selector cos_2_ml[3:0] for cgout7l pulse selector cos_3_ml[3:0] for cgout8l pulse selector cos_4_ml[3:0] for cgout5r pulse selector cos_5_ml[3:0] for cgout6r pulse selector cos_6_ml[3:0] for cgout7r pulse selector cos_7_ml[3:0] for cgout8r pulse selector cos_0-7_ml[3] cos_0-7_ml[2] cos_0-7_ml[1] cos_0-7_ml[0] signal type 0 0 0 0 stv-0 0 0 0 1 stv-1 0 0 1 0 stv-2 0 0 1 1 stv-3 0 1 0 0 ck-0 0 1 0 1 ck-1 0 1 1 0 ck-2 0 1 1 1 ck-3 1 0 0 0 ck-4 1 0 0 1 ck-5 1 0 1 0 ck-6 1 0 1 1 ck-7 1 1 0 0 inhibit 1 1 0 1 inhibit 1 1 1 0 inhibit 1 1 1 1 inhibit for truly only http://www..net/ datasheet pdf - http://www..net/
-p.282- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 gto[5:0] gpwr toggle frequency 6h00 64 x frame 6h01 1 x frame 6h02 2 x frame 6h03 3 x frame ????? ????? 6h3d 61 x frame 6h3e 62 x frame 6h3f 63 x frame gno[7:0] gpwr non-overlap timing 8h00 0 8h01 1 x osc clk 8h02 2 x osc clk 8h03 3 x osc clk ????? ????? 8hfd 253 x osc clk 8hfe 254 x osc clk 8hff 255 x osc clk eq_delay[7:0] is in-house function not open. gip_opt[7:0]= 5'b0, stv_2_time, stv_gated, toggle_en stv_2_time : make shr_1 control the inner stv_1. in order to meet 2 stv pulses for bp and fp separately. stv_gated: ck will be off while stv on. toggle_en: ck will toggle while porch duration. default status default value otp value power on sequence s/w reset h/w reset shr_0[11:0]= 0x02h shr_1[11:0]= 0x01h spd[7:0]= 0x02h chr[7:0]= 0x03h con[7:0]= 0x20h coff[7:0]= 0x6cg scp[3:0]= 0x03h shp[3:0]= 0x00h ccp[3:0]= 0x03h chp[3:0]= 0x00h sos_0[3:0]= 0x00h sos_1[3:0]= 0x00h sos_2[3:0]= 0x00h sos_3[3:0]= 0x00h cos_0[3:0]= 0x00h cos_1[3:0]= 0x06h cos_2[3:0]= 0x04h cos_3[3:0]= 0x00h cos_4[3:0]= 0x01h cos_5[3:0]= 0x07h cos_6[3:0]= 0x05h cos_7[3:0]= 0x07h sos_0_ml[3:0]= 0x00h sos_1_ml[3:0]= 0x00h sos_2_ml[3:0]= 0x00h sos_3_ml[3:0]= 0x00h cos_0_ml[3:0]= 0x01h cos_1_ml[3:0]= 0x05h cos_2_ml[3:0]= 0x07h cos_3_ml[3:0]= 0x05h cos_4_ml[3:0]= 0x00h cos_5_ml[3:0]= 0x04h shr_0[11:0], shr_1[11:0] spd[7:0], chr[7:0] con[7:0], coff[7:0] scp[3:0], shp[3:0] ccp[3:0], chp[3:0] sos_0[3:0], sos_1[3:0] sos_2[3:0], sos_3[3:0] cos_0[3:0], cos_1[3:0] cos_2[3:0], cos_3[3:0] cos_4[3:0], cos_5[3:0] cos_6[3:0], cos_7[3:0] sos_0_ml[3:0] sos_1_ml[3:0] sos_2_ml[3:0] sos_3_ml[3:0] cos_0_ml[3:0] cos_1_ml[3:0] cos_2_ml[3:0] cos_3_ml[3:0] cos_4_ml[3:0] cos_5_ml[3:0] cos_6_ml[3:0] cos_7_ml[3:0] gto[5:0], gno[7:0] eq_delay[7:0] gip_opt[7:0] for truly only http://www..net/ datasheet pdf - http://www..net/
-p.283- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 cos_6_ml[3:0]= 0x06h cos_7_ml[3:0]= 0x04h gto[5:0]= 0x01h gno[7:0]= 0x0ch eq_delay[7:0]= 0x0ch gip_opt[7:0]= 0x00h for truly only http://www..net/ datasheet pdf - http://www..net/
-p.284- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.67 settpsnr (d8h) settpsnr (set the temp senor control) d8h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 0 1 0 1 0 1 d5 1 st parameter 1 1 - - - - tsraw[4:0] (read only) 2 nd parameter 1 1 - - - - ts_os2[4:0] - 3 rd parameter 1 1 - bt_p2[3:0] bt_p1[3:0] - 4 th parameter 1 1 - bt_p4[3:0] bt_p3[3:0] - 5 th parameter 1 1 - - - - d0[4:0] - 6 th parameter 1 1 - ts_g[2:0] i0[4:0] - 7 th parameter 1 1 - - ts_os1[4:3] d1[4:0] - 8 th parameter 1 1 - ts_os1[2:0] i1[4:0] - 9 th parameter 1 1 - pore rer[1:0] d2[4:0] - 10 th parameter 1 1 - - tf_on tson i2[4:0] - description this command is used for the temperature senor control. tson : temp. sensor on/off function. 1 = on 0 = off (default); vgh level is controlled by only bt_p1[1:0] tf_ on : median filter on/off function. 1 = on (default) 0 = off temp. sensor variation = under +/- 3 degree tsraw[4:0] temp.( ) 00000 -18.55 ~ -20.00 00001 -15.65 ~ -18.55 00010 -12.74 ~ -15.65 00011 -9.84 ~ -12.74 00100 -6.94 ~ -9.84 00101 -4.03 ~ -6.94 00110 -1.13 ~ -4.03 00111 1.77 ~ -1.13 01000 4.68 ~ 1.77 01001 7.58 ~ 4.68 01010 10.48 ~ 7.58 01011 13.39 ~ 10.48 01100 16.29 ~ 13.39 01101 19.19 ~ 16.29 01110 22.10 ~ 19.19 01111 25.00 ~ 22.10 for truly only http://www..net/ datasheet pdf - http://www..net/
-p.285- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 10000 27.90 ~ 25.00 10001 30.81 ~ 27.90 10010 33.71 ~ 30.81 10011 36.61 ~ 33.71 10100 39.52 ~ 36.61 10101 42.42 ~ 39.52 10110 45.32 ~ 42.42 10111 48.23 ~ 45.32 11000 51.13 ~ 48.23 11001 54.03 ~ 51.13 11010 56.93 ~ 54.03 11011 59.84 ~ 56.93 11100 62.74 ~ 59.84 11101 65.64 ~ 62.74 11110 68.55 ~ 65.64 11111 70.00 ~ 68.55 ts_g[2:0] : gain control of temp sensor output. ts_g[2:0] gain range 000 0.8125 001 0.8750 010 0.9375 011 1 100 1.0625 101 1.1250 110 1.1875 111 1.2500 (step=0.0625) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.286- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 ts_os1[4:0] & ts_os2 [4:0]: offset control of temp sensor output temp. -20 00000 11111 tsraw[4:0] 70 ts_os1[4:0] / ts_os2[4:0] temp.( ) 00000 -54 00001 -51 00010 -48 00011 -45 .. .. 10010 0 .. .. 11100 30 11101 33 11110 36 11111 39 rer[1:0] : refresh rate of tsraw[4:0] rer[1:0] refresh rate 00 every 4 vsync 01 every 6 vsync 10 every 60 vsync 11 setting disabled vsync tsraw[3:0] tsraw 1 [3:0] tsraw 2 [3:0] s864 s1 porch pore: the point of refresh rate pore description 0 start of vertical porch 1 end of vertical porch for truly only http://www..net/ datasheet pdf - http://www..net/
-p.287- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 bt : vgh pumping control 10 40 d0[4:0] i1[4:0] d1[4:0] tempsensoroutput tsraw[4:0] vgh i0[4:0] x5 x7 x6 4 step phase1 phase2 phase3 phase4 i2[4:0] d 2[4:0] 25 x4 * i0~2&d0~2isneededforhysterisis bt_p1[3:0] : vgh control at phase 1 b t_p2[3:0] : vgh control at phase 2 bt_p3[3:0] : vgh control at phase 3 bt_p4[3:0] : vgh control at phase 4 bt_p1[3:0]/ bt_p2[3:0]/ bt_p3[3:0]/ bt_p4[3:0] vgh vgl 0000 2*(vsp-vsn) vdddn-1*(vsp-vsn) 0001 2*(vsp-vsn) -1*(vsp-vsn) 0010 2*(vsp-vsn) vdd3-1*(vsp-vsn) 0011 (vsp-vsn)+(vdd3-vsn) vdddn-1*(vsp-vsn) 0100 (vsp-vsn)+(vdd3-vsn) -1*(vsp-vsn) 0101 (vsp-vsn)+(vdd3-vsn) vdd3-1*(vsp-vsn) 0110 (vsp-vsn)+(vsp-vssd) vdddn-1*(vsp-vsn) 0111 (vsp-vsn)+(vsp-vssd) -1*(vsp-vsn) 1000 (vsp-vsn)+(vsp-vssd) vdd3-1*(vsp-vsn) 1001 (vdd3-vsn)+(vsp-vssd) vdddn-1*(vsp-vsn) 1010 (vdd3-vsn)+(vsp-vssd) -1*(vsp-vsn) 1011 (vdd3-vsn)+(vsp-vssd) vdd3-1*(vsp-vsn) 1100 (vsp-vsn) vdddn-1*(vsp-vsn) 1101 (vsp-vsn) -1*(vsp-vsn) 1110 (vsp-vsn) vdd3-1*(vsp-vsn) 1111 2*(vsp-vssd) -2*(vsp-vssd) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.288- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 i0 [4:0] : set the lower boundary of the phase 1, 2 d0 [4:0] : set the higher boundary of the phase 1, 2 i1 [4:0] : set the lower boundary of the phase 2, 3 d1 [4:0] : set the higher boundary of the phase 2, 3 i2 [4:0] : set the lower boundary of the phase 3, 4 d2 [4:0] : set the higher boundary of the phase 3, 4 boundary of the phase: io,do,i1,d1,i2,d2[4:0] temp.( ) 00000 -20 00001 -17 00010 -14 00011 -11 00100 -8 ----- ----- ----- ----- 11100 64 11101 67 11110 70 11111 disabled restrictions setextc turn on to enable this command. register availability status availability idle mode off, sleep out yes idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset ts_os1[4:0]=0x0ah, ts_os2[4:0]=0x12h, bt_p1[3:0]=4b0100, bt_p2[3:0]=4b0111, bt_p3[3:0]=4b0111, bt_p4[3:0]=4b1010, d0[4:0]=0x0ch, d1[4:0]= 0x17h, d2[4:0]= 0x17h, i0[4:0]= 0x0ah, i1[4:0]= 0x15h, i2[4:0]= 0x15h, pore=0, rer=2b00, tf_on=1, tson=0, ts_os1[4:0], ts_os2[4:0], bt_p1[3:0], bt_p2[3:0], bt_p3[3:0], bt_p4[3:0], d0[4:0], d1[4:0], d2[4:0], i0[4:0], i1[4:0], i2[4:0], pore, rer, tf_on, tson for truly only http://www..net/ datasheet pdf - http://www..net/
-p.289- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.68 setgamma: set gamma curve related setting (e0h) setgammar ( set gamma curve related setting ) e0h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 0 0 0 0 e0 1 st parameter g1_vrp0[5:0] 2 nd parameter g1_vrp1[5:0] 3 rd parameter g1_vrp2[5:0] 4 th parameter g1_vrp3[5:0] 5 th parameter g1_vrp4[5:0] 6 th parameter g1_vrp5[5:0] 7 th parameter g1_prp0[6:0] 8 th parameter g1_prp1[6:0] 9 th parameter g1_cgmp0 [1:0] - g1_ pkp0[4:0] 10 th parameter g1_cgmp1 [1:0] - g1_pkp1[4:0] 11 th parameter g1_cgmp2 [1:0] - g1_pkp2[4:0] 12 th parameter g1_cgmp3 [1:0] - g1_pkp3[4:0] 13 th parameter g1_cgmp5 g1_cgmp4 - g1_pkp4[4:0] 14 th parameter - - - g1_pkp5[4:0] 15 th parameter - - - g1_pkp6[4:0] 16 th parameter - - - g1_pkp7[4:0] 17 th parameter - - - g1_pkp8[4:0] 18 th parameter - - g1_vrn0[5:0] 19 th parameter - - g1_vrn1[5:0] 20 th parameter - - g1_vrn2[5:0] 21 th parameter - - g1_vrn3[5:0] 22 th parameter - - g1_vrn4[5:0] 23 th parameter - - g1_vrn5[5:0] 24 th parameter - g1_prn0[6:0] 25 th parameter - g1_prn1[6:0] 26 th parameter g1_cgmn0 [1:0] - g1_pkn0[4:0] 27 th parameter g1_cgmn1 [1:0] - g1_pkn1[4:0] 28 th parameter g1_cgmn2 [1:0] - g1_pkn2[4:0] 29 th parameter g1_cgmn3 [1:0] - g1_pkn3[4:0] 30 th parameter g1_cgmn5 g1_cgmn4 - g1_pkn4[4:0] 31 th parameter - - - g1_pkn5[4:0] 32 th parameter - - - g1_pkn6[4:0] 33 th parameter - - - g1_pkn7[4:0] 34 th parameter - - - g1_pkn8[4:0] description register groups positive polarity negative polarity description g1_prp0 6-0 g1_prn0 6-0 variable resistor (prp/n0) for center adjustment center adjustment g1_prp1 6-0 g1_prn1 6-0 variable resistor (prp/n1)for center adjustment g1_pkp0 4-0 g1_pkn0 4-0 32-to-1 selector (voltage level of grayscale 3) g1_pkp1 4-0 g1_pkn1 4-0 32-to-1 selector (voltage level of grayscale 7) g1_pkp2 4-0 g1_pkn2 4-0 32-to-1 selector (voltage level of grayscale 19) g1_pkp3 4-0 g1_pkn3 4-0 32-to-1 selector (voltage level of grayscale 25) g1_pkp4 4-0 g1_pkn4 4-0 32-to- 1 selector (voltage level of grayscale 32 for positive polarity and grayscale 31 for negative polarity) g1_pkp5 4-0 g1_pkn5 4-0 32-to-1 selector (voltage level of grayscale 38) g1_pkp6 4-0 g1_pkn6 4-0 32-to-1 selector (voltage level of grayscale 44) g1_pkp7 4-0 g1_pkn7 4-0 32-to-1 selector (voltage level of grayscale 56) macro adjustment g1_pkp8 4-0 g1_pkn8 4-0 32-to-1 selector (voltage level of grayscale 60) g1_vrp0 5-0 g1_vrn0 5-0 variable resistor (vrp/n0)for offset adjustment g1_vrp1 5-0 g1_vrn1 5-0 variable resistor (vrp/n1)for offset adjustment offset adjustment g1_vrp2 5-0 g1_vrn2 5-0 variable resistor (vrp/n2)for offset adjustment for truly only http://www..net/ datasheet pdf - http://www..net/
-p.290- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 g1_ vrp3 5-0 g1_vrn3 5-0 variable resistor (vrp/n3)for offset adjustment g1_vrp4 5-0 g1_vrn4 5-0 variable resistor (vrp/n4)for offset adjustment g1_vrp5 5-0 g1_vrn5 5-0 variable resistor (vrp/n5)for offset adjustment g1_cgmp/n0: select to change gamma resistor stream. g1_cgmp/n1: select to change gamma resistor stream. g1_cgmp/n2: select to change gamma resistor stream. g1_cgmp/n3: select to change gamma resistor stream. please refer to figure 5.31. g1_cgmp/n4: select to change gamma resistor stream. please refer to figure 5.31. g1_cgmp/n5: select to change gamma resistor stream. please refer to figure 5.31. restriction setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset g1_vrp0[5:0]=0x00h, g1_vrp1[5:0]=0x18h, g1_vrp2[5:0]=0x1fh, g1_vrp3[5:0]=0x3fh, g1_vrp4[5:0]=0x3fh, g1_vrp5[5:0]=0x3fh, g1_prp0[6:0]=0x33h, g1_prp1[6:0]=0x57h, g1_cgmp0[1:0]=00, g1_cgmp1[1:0]=00, g1_cgmp2[1:0]=00, g1_cgmp3[1:0]=00, g1_cgmp4=0, g1_cgmp5=0, g1_ pkp0[4:0]=0x07h, g1_ pkp1[4:0]=0x0dh, g1_ pkp2[4:0]=0x0fh, g1_ pkp3[4:0]=0x13h, g1_ pkp4[4:0]=0x16h, g1_ pkp5[4:0]=0x14h, g1_ pkp6[4:0]=0x16h, g1_ pkp7[4:0]=0x18h, g1_ pkp8[4:0]=0x1fh, g1_vrn0[5:0]=0x00h, g1_vrn1[5:0]=0x18h, g1_vrn2[5:0]=0x1fh, g1_vrn3[5:0]=0x3fh, g1_vrn4[5:0]=0x3fh, g1_vrn5[5:0]=0x3fh, g1_ pkn0[4:0]=0x07h, g1_ pkn1[4:0]=0x0dh, g1_ pkn2[4:0]=0x0fh, g1_ pkn3[4:0]=0x13h, g1_ pkn4[4:0]=0x16h, g1_ pkn5[4:0]=0x14h, g1_ pkn6[4:0]=0x16h, g1_ pkn7[4:0]=0x18h, g1_ pkn8[4:0]=0x1fh, g1_cgmn0[1:0]=00, g1_cgmn1[1:0]=00, g1_cgmn2[1:0]=00, g1_cgmn3[1:0]=00, g1_cgmn4=0, g1_cgmn5=0, g1_vrp0[5:0], g1_vrp1[5:0], g1_vrp2[5:0], g1_vrp3[5:0], g1_vrp4[5:0], g1_vrp5[5:0], g1_prp0[6:0], g1_prp1[6:0], g1_cgmp0[1:0], g1_cgmp1[1:0], g1_cgmp2[1:0], g1_cgmp3[1:0], g1_cgmp4, g1_cgmp5, g1_ pkp0[4:0], g1_ pkp1[4:0], g1_ pkp2[4:0], g1_ pkp3[4:0], g1_ pkp4[4:0], g1_ pkp5[4:0], g1_ pkp6[4:0], g1_ pkp7[4:0], g1_ pkp8[4:0], g1_vrn0[5:0], g1_vrn1[5:0], g1_vrn2[5:0], g1_vrn3[5:0], g1_vrn4[5:0], g1_vrn5[5:0], g1_ pkn0[4:0], g1_ pkn1[4:0], g1_ pkn2[4:0], g1_ pkn3[4:0], g1_ pkn4[4:0], g1_ pkn5[4:0], g1_ pkn6[4:0], g1_ pkn7[4:0], g1_ pkn8[4:0], g1_cgmn0[1:0], g1_cgmn1[1:0], g1_cgmn2[1:0], g1_cgmn3[1:0], g1_cgmn4, g1_cgmn5. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.291- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.69 setotpkey (e9h) setotpkey e9h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 0 1 0 0 1 e9 1 st parameter 1 1 - otp_key0[7:0] 00h 2 nd parameter 1 1 - otp_key1[7:0] 00h description this command is used to set otp key to enter or leave otp program mode. otp_key0[7:0] otp_key1[7:0] description note otp_key0[7:0] = 0xaah otp_key1[7:0] = 0x55h enter otp program mode otp_key0[7:0] = 0x00h otp_key1[7:0] = 0x00h leave otp program mode other value invalid 1. if hx8369- a operate on otp program mode, then keep on otp program mode. 2. if HX8369-A operate on non-otp program mode, then keep on non-otp program mode. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset otp_key0[7:0]=0x00h, otp_key1[7:0]=0x00h n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.292- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.70 gethxid (f4h) gethxic f4h dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 0 1 0 0 f4 1 st parameter 1 1 - himax id[7:0] - 2 nd parameter 1 1 - version[7:0] - description this command is used to get lcd id and version. restrictions setextc turn on to enable this command. register availability status availability normal mode on, idle mode off, sleep out yes normal mode on, idle mode on, sleep out yes partial mode on, idle mode off, sleep out yes partial mode on, idle mode on, sleep out yes sleep in yes default status default value otp value power on sequence s/w reset h/w reset himax id[7:0] = 0x69h version[7:0] = 0x02h n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.293- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.71 setcncd/getcncd (fdh) setcncd/getcncd (set/get continue command) fdh dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 1 1 0 1 fd 1 st parameter 1 1 - wr_cmd_cn[7:0] - description this function is use to instead of register-content interface mode. the parameter for setcncd will continue to read from the last command address automatically. restrictions setextc turn on to enable this command register availability status availability idle mode off, sleep out yes idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset n/a n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.294- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.72 set spi read index (feh) set spi read index (set spi read command address) feh dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 1 1 1 0 fe 1 st parameter 1 1 - cmd_add[7:0] - description set spi read command address for user define command. restrictions setextc turn on to enable this command register availability status availability idle mode off, sleep out yes idle mode on, sleep out yes default status default value otp value power on sequence s/w reset h/w reset cmd_add[7:0]=0x00h n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.295- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 6.2.73 getspiread : : : : read command data (ffh) getmpuread (read command data) ffh dnc nrd nwr d15-d8 d7 d6 d5 d4 d3 d2 d1 d0 hex command 0 1 - 1 1 1 1 1 1 1 1 ff 1 st parameter 1 1 - cmd_data1[7:0] - : 1 1 - : - n th parameter 1 1 - cmd_datan[7:0] - description read spi command data for user define command. restrictions setextc turn on to enable this command. register availability status availability idle mode off, sleep out yes idle mode on, sleep out yes sleep in or booster off yes default status default value otp value power on sequence s/w reset h/w reset n/a n/a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.296- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 7. power supply 7.1 power supply setup 7.1.1 architecture 1 with pfm circuit note: if not use lvgl, please connect the vgl and lvgl together. figure 7.1: power supply with pfm circuit for truly only http://www..net/ datasheet pdf - http://www..net/
-p.297- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 7.1.2 architecture 2 with hx5186-a note: if not use lvgl, please connect the vgl and lvgl together. figure 7.2: power supply with hx5186-a for truly only http://www..net/ datasheet pdf - http://www..net/
-p.298- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 7.2 voltage configuration the HX8369-A has an internal power supply circuit to drive tftlcd panel. please set up each voltage output according to the lcd panel. name function set up value note vref reference voltage from internal band gap circuit 1.8v - vsp dc/dc converter circuit output 4.7v ~ 5.5v do not exceed 6 v vsn dc/dc converter circuit output -4.7v ~ -5.5v do not exceed 6v vspc dc/dc converter circuit output 4.7v ~ 5.5v do not exceed 6 v vsnc dc/dc converter circuit output -4.7v ~ -5.5v do not exceed 6v vspr reference voltage for gamma circuit 3.5v ~ (vsp C 0.5v) reference register vsnr reference voltage for gamma circuit -3.5v ~ (vsn + 0.5v) reference register vdddn logic power supply -2.5v - vgh positive gate driver output voltage level +9v ~ +20v depend on vsp and vsn vgl negative gate driver output voltage level -6v ~ -13.5v depend on vsp and vsn lvgl gip most negative voltage level vgl-vdd3 depend on vsp and vsn vcom vcom dc voltage -2v ~ 0v - dsi_ldo analog power for mipi dsi circuit 1.2v ~ 1.3v - pad name connection typical component value vcom connect to capacitor (max 6v): vcom ---(-)----| |--- (+)----- vssa 2.2 f vgh connect to capacitor (max 25v): vgh ---(+)----| |--- (-)----- vssa 1.0 f connect to capacitor (max 16v): vgl ---(+)----| |--- (-)----- vssa 1.0 f vgl connect to schottky diode(vr 30v): vssa ---(-)---- ? --- (+)---- vgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) c24ap - c24an connect to capacitor (max 16v): c24ap ---(+)----| |--- (-)-----c24an 1.0 f c23ap - c23an connect to capacitor (max 16v): c23ap ---(+)----| |--- (-)-----c23an 1.0 f c22ap - c22an connect to capacitor (max 16v): c22ap ---(+)----| |--- (-)-----c22an 1.0 f c21ap - c21an connect to capacitor (max 16v): c21ap ---(+)----| |--- (-)-----c21an 1.0 f c41ap C c41an connect to capacitor (max 16v): c41ap ---(+)----| |--- (-)-----c41an 1.0 f vspr connect to capacitor (max 10v): vspr ---(+)----| |--- (-)-----vssa 1.0 f vsnr connect to capacitor (max 10v): vsnr ---(+)----| |--- (-)-----vssa 1.0 f vddd connect to capacitor (max 6v): vddd ---(+)----| |--- (-)-----vssa 1.0 f vdddn connect to capacitor (max 6v): vdddn ---(+)----| |--- (-)-----vssa 1.0 f vref connect to capacitor (max 6v): vref ---(-)----| |--- (+)----- vssa 1.0 f vsp connect to capacitor (max 10v):vsp ---(+)----| |--- (-)-----vssa 2.2 f vsn connect to capacitor (max 10v):vsn ---(+)----| |--- (-)-----vssa 2.2 f vdd3 connect to capacitor (max 10v): vdd3 ---(+)----| |--- (-)-----vssa 1.0 f dsi_ldo connect to capacitor (max 6v): dsi_ldo ---(+)----| |--- (-)----dsi_vss 1.0 f connect to capacitor (max 16v): lvgl ---(-)----| |--- (+)----- vssa 1.0 f lvgl connect to schottky diode(vr 30v): vssa ---(-)---- ? --- (+)---- lvgl vf < 0.4v / 20ma @ 25 c, vr 30v (recommended diode: rb521s-30) table 7.1: adoptability of component for truly only http://www..net/ datasheet pdf - http://www..net/
-p.299- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8. electrical characteristics 8.1 absolute maximum ratings the absolute maximum ratings are list on table 8.1. when used out of the absolute maximum ratings, the lsi may be permanently damaged. using the lsi within the following electrical characteristics limit is strongly recommended for normal operation. if these electrical characteristic conditions are exceeded during normal operation, the lsi will malfunction and cause poor reliability. item symbol unit value note power supply voltage 1 vdd1~ vssd v -0.3 to +3.6 note (1),(2) power supply voltage 2 vdd2 ~ vssa v -0.3 to +5.5 note (1),(3) power supply voltage 3 vdd3 ~ vssa v -0.3 to +5.5 note (1) (4) power supply voltage 4 dsi_vcc ~ dsi_vss v -0.3 to +3.6 note (1) (5) power supply voltage 5 vsp ~ vssa v -0.3 to +6.6 note (6) power supply voltage 6 vssa ~ vsn v 0 to -6.6 note (7) power supply voltage 7 vgh ~ vssa v -0.3 to +25 note (8) power supply voltage 8 vssa ~ vgl v 0 to -16 note (9) operating temperature topr c -40 to +85 note (10) storage temperature tstg c -55 to +110 note (11) note: (1) vdd1, vssd must be maintained. (2) to make sure vdd1 vssd. (3) to make sure vdd2 vssa. (4) to make sure vdd3 vssa. (5) to make sure dsi_vcc dsi_vss. (6) to make sure vsp vssa. (7) to make sure vssa vsn (8) to make sure vgh vssa. (9) to make sure vssa vgl vgh +|vgl| < 32v (10) for die and wafer products, specified up to +85 . (11) this temperature specifications apply to the tcp package. table 8.1: absolute maximum rating 8.2 esd protection level mode test condition criteria standard human body model c=100 pf, r=1.5 k q 2.0kv mil-std-883f method 3015.7 machine model c=200 pf, r=0.0 q 200v eia/jedec jesd22-a115-a table 8.2: esd protection level for truly only http://www..net/ datasheet pdf - http://www..net/
-p.300- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.3 dc characteristics (vdd2=2.3 ~ 4.8v, vdd3=2.3 ~ 4.8v, vdd1=1.65~3.3v, t a =-40 ~ 85 c) item symbol unit test condition min. typ. max. note input high voltage v ih v 0.7 v dd1 - vdd1 v input low voltage v il v vdd1= 1.65 ~ 3.3v vdd2= 2.3 ~ 3.3v vdd3= 2.3 ~ 3.3v 0 - 0.3 v dd1 v v ih v vpp v il v vpp 7.25v 7.5v 7.75v v output high voltage (sdo, cabc_pwm_out) v oh1 v i oh = -1.0 ma 0.8 v dd1 - vdd1 v output low voltage (sdo, cabc_pwm_out) v ol1 v vdd1= 1.65 ~ 2.4v i ol = 1.0 ma 0 - 0.2 v dd1 v vsync, hsync - - 1 ua i ih ua resx, dcx_scl, csx, rdx_e, wrx_dcx - - 1 ua db[230], sdi, dcx_scl - - 1 ua logic high level input current i ihd ua db[230] - - 1 ua vsync, hsync -1 - ua i il ua resx, dcx_scl, cs x, rdx_e, wrx_dcx -1 - ua db[230], sdi, dcx_scl -1 - ua logic low level input current i ild ua db[170] -1 - ua current consumption standby mode (vdd2/vdd3-vssd) i st(vdd) m a - 30 - ua current consumption standby mode ( vdd1C vssd ) i st(vdd1) m a vdd2/vdd3=2.8v, vdd1=1.8v t a =25 c - 1 - ua current consumption during deep-standby mode (vdd2/vdd3-vssd) i dp-st(vdd) m a - 5 - ua current consumption during deep-standby mode ( vdd1C vssd ) i dp-st(vdd1) m a vdd2/vdd3=2.8v, vdd1=1.8v t a =25 c - 1 - ua note: 1. the vpp pin is open on normal mode and in used while otp programming condition. 2. the gram data is eliminated under the deep standby mode. table 8.3: dc characteristic for truly only http://www..net/ datasheet pdf - http://www..net/
-p.301- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4 ac characteristics 8.4.1 dbi type a interface characteristics figure 8.1: dbi type a interface characteristics(clk-e mode) (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) signal symbol parameter min. max. unit description wrx_dcx or dcx_scl t ast t aht address setup time address hold time (write/read) 10 10 - - ns - system clock cycle time read register 100 790 ns - read gram 350 790 ns - write register 100 790 ns - write gram @ slpout 33 790 ns - csx or rdx_e t cycle write gram @ slpin 100 790 ns - db23-db0 t ds t dh t acc t oh data setup time data hold time read access time output disable time 15 25 10 10 - - - - ns for maximum cl=30pf for minimum cl=8pf note: the input signal rise time and fall time (tr, tf) is specified at 15 ns or less. logic high and low levels are specified as 30% and 70% of vdd1 for input signals. table 8.4: dbi type a interface characteristics for truly only http://www..net/ datasheet pdf - http://www..net/
-p.302- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.2 dbi type b interface characteristics figure 8.2: dbi type b interface characteristics (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) signal symbol parameter min. max. unit description dcx_scl t ast t aht address setup time address hold time (write/read) 10 10 - - ns - csx t cs t rcs t rcsfm t csf chip select setup time (write) chip select setup time (read id) chip select setup time (read fm) chip select wait time (write/read) 20 45 3 55 20 - - - ns - wrx_dcx t wc t wc t wc t wrh t wrl write cycle (write register) write cycle (write gram@slpout) write cycle (write gram@slpin) control pulse h duration control pulse l duration 100 33 100 15 15 790 790 790 630 160 ns - rdx_e t rc t rc t rdh t rdl read cycle (read register) read cycle (gram) control pulse h duration control pulse l duration 100 350 30 20 790 790 630 160 ns - db23-db0 t wds t wdh t racc t rdo data setup time data hold time read access time output disable time 15 25 10 10 - - - - ns for maximum c l =30pf for minimum c l =8pf note: the input signal rise time and fall time (tr, tf) is specified at 15 ns or less. logic high and low levels are specified as 30% and 70% of vdd1 for input signals. table 8.5: dbi type b interface characteristics for truly only http://www..net/ datasheet pdf - http://www..net/
-p.303- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.3 dbi type c interface characteristics figure 8.3: dbi type c interface characteristics (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a = 25c) signal symbol parameter min. max. unit description csx t css t csh chip select setup time (write) chip select setup time (read) 40 40 - - ns - wrx_dcx t ast t aht address setup time address hold time (write/read) 10 10 - - ns - dcx_scl (write) t wc t wrh t wrl write cycle control pulse h duration control pulse l duration 100 40 40 - - - ns - dcx_scl (read) t rc t rdh t rdl read cycle control pulse h duration control pulse l duration 150 60 60 - - - ns - sdi/sdo (input) t ds t dt data setup time data hold time 30 30 - - ns sdi/sdo (output) t racc t od read access time output disable time 10 10 - 50 ns for maximum c l =30pf for minimum c l =8pf note: the input signal rise time and fall time (tr, tf) is specified at 15 ns or less. logic high and low levels are specified as 30% and 70% of vdd1 for input signals. table 8.6: dbi type c interface characteristics for truly only http://www..net/ datasheet pdf - http://www..net/
-p.304- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.4 dpi interface characteristics dst dht vsst vsht hsst hsht pclkcyc pclklt pclkht vsync hsync pclk db[15:0], db[17:0], db[23:0], de figure 8.4: dpi interface characteristics resolution=480x800 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) parameter symbol condition min. typ. max. unit vertical sync. setup time vsst - 5 - - ns vertical sync. hold time vsht - 5 - - ns horizontal sync. setup time hsst - 5 - - ns horizontal sync. hold time hsht - 5 - - ns pixel clock cycle when rgb i/f is running pclkcyc vrr (5) = min . 50 hz max. 70 hz 31 (3) - 49.2 (4) ns pixel clock low time pclklt - 5 - - ns pixel clock high time pclkht - 5 - - ns data setup time db[23:0] dst - 5 - - ns data hold time db[23:0] dht - 5 - - ns note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for high state. (3) 32.2 mhz (4) 20.3 mhz (5) vrr : vertical refresh rate, equal to vsync frequency. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.305- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 resolution=480x854 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical sync. setup time vsst - 5 - - ns vertical sync. hold time vsht - 5 - - ns horizontal sync. setup time hsst - 5 - - ns horizontal sync. hold time hsht - 5 - - ns pixel clock cycle when rgb i/f is running dckcyc vrr (5) = min . 50 hz max. 70 hz 29.1 (note 3) - 46.2 (note 4) ns pixel clock low time dcklt - 5 - - ns pixel clock high time dckht - 5 - - ns data setup time db[23:0] dst - 5 - - ns data hold time db[23:0] dht - 5 - - ns note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for high state. (3) 34.3 mhz (4) 21.6 mhz table 8.7: dpi interface characteristics for truly only http://www..net/ datasheet pdf - http://www..net/
-p.306- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 vertical timings for rgb i/f vsync db[23:0] de hsync vs vfp vbl vp vbp vfp vdisp note3 note3 figure 8.5: vertical timings for rgb i/f resolution=480x854 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 860 - - line vertical low pulse width vs - 2 - note(4) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(4) line vertical data start point - vs+vbp 4 - note(4) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 854 - line vertical refresh rate vrr - 50 - 70 hz note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for highstate. (3) data lines can be set to high or low during blanking time C dont care. (4) the vs and vbp pulse width are related to asg/gi p stv and ckv timing. the stv and ckv must be set at corresponding position for lcd normal display. also refer to setion 6.2.66 setgip. resolution=480x800 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit vertical cycle vp - 806 - - line vertical low pulse width vs - 2 - note(4) line vertical front porch vfp - 2 - - line vertical back porch vbp - 2 - note(4) line vertical data start point - vs+vbp 4 - note(4) line vertical blanking period vbl vs+vbp+vfp 6 - - line vertical active area - vdisp - 800 - line vertical refresh rate vrr - 50 - 70 hz note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for highstate. (3) data lines can be set to high or low during blanking time C dont care. (4) the vs and vbp pulse width are related to asg/gi p stv and ckv timing. the stv and ckv must be set at corresponding position for lcd normal display. also refer to setion 6.2.66 setgip. table 8.8 vertical timings for rgb i/f for truly only http://www..net/ datasheet pdf - http://www..net/
-p.307- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 horizontal timings for rgb i/f figure 8.6: horizontal timing for rgb i/f resolution=480x854 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit hs cycle hp note 3 504 - 568 dck hs low pulse width hs - 5 - 78 dck horizontal back porch hbp - 5 - 78 dck horizontal front porch hfp - 5 - 78 dck 19 - 83 dck horizontal data start point - hs+hbp 700 - - ns horizontal blanking period hblk hs+hbp+hfp 24 - 88 dck horizontal active area hdisp - - 480 - dck 21.6 - 34.3 mhz pixel clock frequency when rgb i/f is running dck vrr = min. 50 hz C max. 70 hz 29.1 - 46.2 ns note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for high state. (3) hp is multiples of eight dck. (4)data lines can be set to high or low during blanking time C dont care. resolution=480x800 (vssa=0v, vdd1=1.8v, vdd2=2.8v, vdd3=2.8v, t a =25c) item symbol condition min. typ. max. unit hs cycle hp note 3 504 - 568 dck hs low pulse width hs - 5 - 78 dck horizontal back porch hbp - 5 - 78 dck horizontal front porch hfp - 5 - 78 dck 19 - 83 dck horizontal data start point - hs+hbp 700 - - ns horizontal blanking period hblk hs+hbp+hfp 24 - 88 dck horizontal active area hdisp - - 480 - dck 20.3 - 32.2 mhz pixel clock frequency when rgb i/f is running dck vrr = min. 50 hz C max. 70 hz 31 - 49.2 ns note: (1) signal rise and fall times are equal to or less than 20 ns. (2) input signals are measured by 0.30 x vdd1 for low state and 0.70 x vdd1 for high state. (3) hp is multiples of eight dck. (4)data lines can be set to high or low during blanking time C dont care. table 8.9 horizontal timings for rgb i/f for truly only http://www..net/ datasheet pdf - http://www..net/
-p.308- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.5 reset input timing figure 8.7: reset input timing symbol parameter related pins min. typ. max. note unit t resw reset low pulse width (1) resx 10 - - - s - - - 5 when reset is applied during sleep in mode ms t rest reset complete time (2) - - - 120 when reset is applied during sleep out mode ms note: (1) spike due to an electrostatic discharge on resx line does not cause irregular system reset according to the table below. resx pulse action shorter than 5 reset rejected longer than 10 s reset between 5 s and 10 s reset start (2) during the resetting period, the display will be blanked (the display is entering blanking sequence, which maximum time is 120 ms, when reset starts in sleep out Cmode. the display remains the blank state in sleep in Cmode) and then returns to default condition for h/w reset. (3) during reset complete time, id2 value in otp will be latched to internal register during this period. this loading is done every time when there is h/w reset complete time (trest) within 5ms after a rising edge of resx. (4) spike rejection also applies during a valid reset pulse as shown below: (5) when reset is applied during sleep in mode. (6) when reset is applied during sleep out mode. (7) it is necessary to wait 5msec after releasing resx before sending commands. also sleep out command cannot be sent for 120msec. table 8.10: reset timing t resw t rest resx internal status shorter than 5s normal operation resetting initial condition (default for h/w reset) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.309- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.6 mddi electrical characteristics 8.4.6.1 dc characteristic dc characteristic: parameter description min. typ. max. unit v it+ receiver differential input high threshold voltage. above this differential voltage the input signal shall be interpreted as a logic-one level. - 0 50 mv v it- receiver differential input low threshold voltage. below this differential voltage the input signal shall be interpreted as a logic-zero level. -50 0 - - v it+_hib receiver differential input high threshold voltage (offset for hibernation wake-up). above this differential voltage the input signal shall be interpreted as a logic-one level. - 100 125 mv v it-_hib receiver differential input low threshold voltage (offset for hibernation wake-up). below this differential voltage the input signal shall be interpreted as a logic-zero level. 75 100 - mv v input-range allowable receiver input voltage range with respect to client ground. 0. 5 - 1.2 v for truly only http://www..net/ datasheet pdf - http://www..net/
-p.310- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 8.4.6.2 ac characteristic ac characteristic: parameter description min. typ. max. unit 1/t bit mddi operate speed 50 350 400 mbps t skew-pair skew between positive and negative inputs of the differential receiver of the same differential pair (intra-pair skew) -0.05 0 0.05 ns t skew-diff peak delay skew between one differential pair and any other differential pair -0.45 t bit 0 0.45 t bit ns t rise-fall rise/fall time(20%-80% of swing) 200 - note (1) ps note : the maximum rise and fall time is either 35% of the interval to transmit one bit on one differential pair or 100 nsec, hichever is smaller. for truly only http://www..net/ datasheet pdf - http://www..net/
-p.311- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 wake-up ac characteristic: parameter description min. typ. max. unit t restart-high duration of host link restart high pulse 140 150 250 stb clock t restart-low duration of host link restart low pulse 50 50 50 stb clock t stb-data-enbl mddi_stb completely enabled to mddi_data0 enabled 0 - - sec t client-startup time for host to hold mddi_stb at logic-zero level after mddi_data0 reaches logic-high level 200 - - nsec for truly only http://www..net/ datasheet pdf - http://www..net/
-p.312- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 9. layout recommendation figure 9.1: layout recommendation for truly only http://www..net/ datasheet pdf - http://www..net/
-p.313- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 10. maximum layout resistance name type maximum series resistance unit vdd1 power supply 10 q vdd2 power supply 20 q vdd3 power supply 10 q vssd power supply 10 q vssa power supply 10 q dsi_vcc / mddi_vcc power supply 10 q dsi_vss / mddi_vss power supply 10 q vssac power supply 20 q vpp input 10 q pccs0, pccs1 input 50 q vcsw1, vcsw2 output 30 q bs[3:0] input 100 q rdx_e, wrx_dcx, dcx_scl, csx, resx input 100 q hsync, vsync, de, pclk input 100 q sdi input 100 q sdo output 100 q db[23:0] output 100 q cabc_pwm_out output 100 q vcom output 10 q dsi_d0p / mddi_d1p input + output 8 q dsi_d0n / mddi_d1n input + output 8 q dsi_clkp / mddi_stbp input 8 q dsi_clkn / mddi_stbn input 8 q dsi_d1p / mddi_d0p input 8 q dsi_d1n / mddi_d0n input 8 q vddd capacitor connection 5 q vdddn capacitor connection 50 q vsp, vsn capacitor connection 10 q vspc, vsnc capacitor connection 50 q vspr, vsnr capacitor connection 50 q vref capacitor connection 20 q vgl, lvgl capacitor connection 10 q vgh capacitor connection 10 q dsi_ldo/mddi_ldo capacitor connection 20 q dsi_ldo_enb input 100 q osc input 100 q c21ap,c21an,c22ap,c22an, c23ap,c23an,c24ap,c24an, c41ap,c41an, capacitor connection 10 q test[2:1] input 100 q te output 100 q vtestoutp, vtestoutn output 100 q vbias output 50 q vcomr input 100 q table 10.1: maximum layout resistance for truly only http://www..net/ datasheet pdf - http://www..net/
-p.314- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 11. ordering information part no. package HX8369-A000 pdxxx pd: mean cog xxx: mean chip thickness (m), (default: 250 m) 12. revision history version date description of changes 2009/08/26 1. new setup 2009/08/31 1. adds rgb interface access the gram function (page30) 2. update otp table (page 173~176) 3. adds temperature sensor control function (page 181) 4. update himax commands table (page 188~194) 2009/09/28 1. add on-chip otp program voltage generator(page10) 2. add bs[3:0]=1011, 3 wire interface + mddi video mode. (page 13) 3. te i/o pin define (page 14) 4. add s1441 i/o pin (page 14) 5. update pccs[1:0] setting (page 14) 6. update dbi type a, type b and type c ac timing (page 257~259) 7. update dpi ac timing.(page 260) 2009/10/27 1. update pin assignment (page 19) 2. update bump arrangement (page 28) 3. add temperature sensor control register (page 238 ~ 242) 4. update pfm circuit and hx5186-a application diagrams (page 253~254) 2009/10/29 1. update rtn, rtn_pe, fp_pe and bp_pe setting (page 218) 2. update absolute maximum rating vdd2 and vdd3 (page 254) 3. update bt[3:0] setting (page205) 2009/11/6 1. error typing. update 3ah interface format table (page 182) 2. error typing. update 0ch interface format table (page 150) 3. update table7.1 adoptablilty of component. (page253) 2009/11/12 1. update otp table (page 129) 2009/11/13 1. update mddi operate speed (page 274) 2009/11/26 1. update registers default values (page200~234) 2010/03/08 1. update 0xb2h fp[7:0] and bp[7:0] = 8h00 definition(page 212). 2. update 0xb1h btn[4:0] vsn definition(page 204). 2010/04/01 1. update otp index 0x47h (page 128) 2. update command list 0xb1h default (page 139) 3. error typing pclkcyc, pclklt and pclkht (page 246) 4. adds gamma resister stream description (page 113 and 114) 01 2010/04/09 1. error typing i/o pins. (page 26) for truly only http://www..net/ datasheet pdf - http://www..net/
-p.315- himax confidential this information contained herein is the exclusive property of himax and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of himax. july, 2010 HX8369-A 480rgbx864dots, tft mobile single chip driver data sheet preliminary v01 2010/04/23 1. update the chip thickness information.(page 17) 2. update register 2dh look up table description. (page 168) 3. add register bah setmipi dsi data lane number setting.(page 227) 4. add dcs write 05h and 15h description. (page55) 5. update dc characteristics information. (page246) 2010/04/30 1. error typing, change figure 5.32 to 5.31 (page235) 2. error typing, change maximum 256k colours to 16.7m colours.(page 182) 3. error typing, change sda to sdi and sdo. (page 40~42) 4. adds notice for rgb caputer mode only used in rgb 24-bit. (page 46) 5. add notice for gip description.(page 117) 2010/05/03 1. error typing, change nreset to resx.(page17) 2. error typing section 5.15(page153) 3. error typing, change pvss to vpp. (page 131,225 and 242) 4. add the i/o pin cabc_pwm_out in the table 5.22.(page 116) 5. update the otp table. (page 128 & 129) 2010/05/10 1. update figure sdi,sdo and resx(page 245 & 247) 2. update the revision date(all pages). 3. error typing, change sda to sdi and sdo. (page 13) 2010/5/14 1. adds vertical timings for rgb i/f(page249-250). 2. updates dpi interface characteristic(page247-248). 2010/5/19 1. update command list table.(page178-179) 2. update gamma stream description.(page117-155) 3. adds register d5hsetgip description.(page271-277) 4. adds register d8hsettpsnr description. (page278-282). 2010/5/20 1. update vertical rgb i/f timing note(4).(page301) 2010/5/28 1. update fs1[2:0]=000 setting is inhibited.(page 246). 2010/6/02 1. update csx trcs and trcsfm (page 297) 2010/7/13 1. adds the setion 5.194~ 5.197 otp programming examples.(page 174 C 177) for truly only http://www..net/ datasheet pdf - http://www..net/

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